virtuoso-cli 0.3.13

target/
Cargo.lock
.env
*.swp
*.swo
*~
.DS_Store
process_data/
sim/
.cadence/
plots/
# Async sim job output dirs (8-char UUID)
[0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f]/
libManager.log

# Spectre simulation artifacts
input.ahdlSimDB/
spectre.dc
*.pyc
__pycache__/
test_tb.ahdlSimDB/
test_tb.log

/0