virt_ic/chip/
gates.rs

1pub mod and;
2pub mod nand;
3pub mod nor;
4pub mod or;
5
6use std::time::Duration;
7
8pub use and::*;
9pub use nand::*;
10pub use nor::*;
11pub use or::*;
12
13use crate::{generate_chip, State};
14
15use super::{ChipBuilder, ChipRunner, ChipSet, Pin, PinId, PinType};
16
17/// # A chip with 6 bundled "NOT" gates
18///
19/// # Diagram
20/// ```
21///        ---__---
22///    A --|1   14|-- VCC
23///   !A --|2   13|-- D
24///    B --|3   12|-- !D
25///   !B --|4   11|-- E
26///    C --|5   10|-- !E
27///   !C --|6    9|-- F
28///  GND --|7    8|-- !F
29///        --------
30/// ```
31#[derive(Debug, Clone, Default)]
32#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
33pub struct NotGate {
34    pub vcc: Pin,
35    pub gnd: Pin,
36    pub a: Pin,
37    pub not_a: Pin,
38    pub b: Pin,
39    pub not_b: Pin,
40    pub c: Pin,
41    pub not_c: Pin,
42    pub d: Pin,
43    pub not_d: Pin,
44    pub e: Pin,
45    pub not_e: Pin,
46    pub f: Pin,
47    pub not_f: Pin,
48}
49impl NotGate {
50    pub const VCC: PinId = 14;
51    pub const GND: PinId = 7;
52    pub const A: PinId = 1;
53    pub const NOT_A: PinId = 2;
54    pub const B: PinId = 3;
55    pub const NOT_B: PinId = 4;
56    pub const C: PinId = 5;
57    pub const NOT_C: PinId = 6;
58    pub const D: PinId = 13;
59    pub const NOT_D: PinId = 12;
60    pub const E: PinId = 11;
61    pub const NOT_E: PinId = 10;
62    pub const F: PinId = 9;
63    pub const NOT_F: PinId = 8;
64}
65impl ChipBuilder<ChipSet> for NotGate {
66    fn build() -> ChipSet {
67        ChipSet::NotGate(NotGate {
68            vcc: Pin::from(PinType::Input),
69            gnd: Pin::from(PinType::Output),
70            a: Pin::from(PinType::Input),
71            not_a: Pin::from(PinType::Output),
72            b: Pin::from(PinType::Input),
73            not_b: Pin::from(PinType::Output),
74            c: Pin::from(PinType::Input),
75            not_c: Pin::from(PinType::Output),
76            d: Pin::from(PinType::Input),
77            not_d: Pin::from(PinType::Output),
78            e: Pin::from(PinType::Input),
79            not_e: Pin::from(PinType::Output),
80            f: Pin::from(PinType::Input),
81            not_f: Pin::from(PinType::Output),
82        })
83    }
84}
85
86generate_chip!(
87    NotGate,
88    vcc: NotGate::VCC,
89    gnd: NotGate::GND,
90    a: NotGate::A,
91    not_a: NotGate::NOT_A,
92    b: NotGate::B,
93    not_b: NotGate::NOT_B,
94    c: NotGate::C,
95    not_c: NotGate::NOT_C,
96    d: NotGate::D,
97    not_d: NotGate::NOT_D,
98    e: NotGate::E,
99    not_e: NotGate::NOT_E,
100    f: NotGate::F,
101    not_f: NotGate::NOT_F
102);
103
104impl ChipRunner for NotGate {
105    fn run(&mut self, _: Duration) {
106        if self.vcc.state.as_logic(3.3) == State::High {
107            self.gnd.state = State::Low;
108            self.not_a.state = State::from(!bool::from(self.a.state.as_logic(3.3)));
109            self.not_b.state = State::from(!bool::from(self.b.state.as_logic(3.3)));
110            self.not_c.state = State::from(!bool::from(self.c.state.as_logic(3.3)));
111            self.not_d.state = State::from(!bool::from(self.d.state.as_logic(3.3)));
112            self.not_e.state = State::from(!bool::from(self.e.state.as_logic(3.3)));
113            self.not_f.state = State::from(!bool::from(self.f.state.as_logic(3.3)));
114        }
115    }
116}
virt_ic/chip/gates.rs

virt_ic/chip/
gates.rs
