veryl-simulator 0.20.0

A modern hardware description language
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69

use crate::FuncPtr;
use crate::HashMap;
use crate::HashSet;
use crate::ir::Config;
use crate::ir::ProtoStatement;
use crate::ir::VarId;
use crate::ir::VariableMeta;
use crate::ir::event::Event;
use crate::ir::statement::StmtDep;
use crate::ir::variable::VarOffset;
use crate::simulator_error::SimulatorError;
use veryl_analyzer::ir as air;

pub struct ScopeContext {
    pub variable_meta: HashMap<VarId, VariableMeta>,
    pub analyzer_context: veryl_analyzer::conv::Context,
    pub ff_table: air::FfTable,
}

/// A cached JIT-compiled function for a group of statements, along with
/// the variable offsets it reads/writes (used for dependency analysis).
pub struct JitCachedFunc {
    pub func: FuncPtr,
    pub input_offsets: Vec<VarOffset>,
    pub output_offsets: Vec<VarOffset>,
    /// Canonical (current) offsets for FF variables written by this function.
    pub ff_canonical_offsets: Vec<isize>,
    pub stmt_deps: Vec<StmtDep>,
    /// Original individual statements before JIT compilation.
    /// Stored in the cache so that subsequent instances can expand
    /// CompiledBlocks for fine-grained dependency analysis after
    /// applying offset deltas.
    pub original_stmts: Vec<ProtoStatement>,
}

/// Cache entry for a module type's JIT-compiled internal logic.
/// Stores the reference ff/comb start byte offsets so that subsequent
/// instances can compute a delta to reuse the same compiled code.
pub struct JitCacheEntry {
    pub ref_ff_start_bytes: isize,
    pub ref_comb_start_bytes: isize,
    pub event_funcs: HashMap<Event, JitCachedFunc>,
    pub comb_func: Option<JitCachedFunc>,
}

#[derive(Default)]
pub struct Context {
    pub config: Config,
    pub scope_contexts: Vec<ScopeContext>,
    pub binary: Vec<super::BinaryStorage>,
    pub ff_total_bytes: usize,
    pub comb_total_bytes: usize,
    pub pending_statements: Vec<ProtoStatement>,
    /// Keyed by `Arc<Component>` pointer so that distinct parameter
    /// specializations (distinct `Arc`s from the analyzer) do not collide.
    pub jit_cache: HashMap<*const air::Component, JitCacheEntry>,
    pub expanding_functions: HashSet<VarId>,
    pub in_initial: bool,
}

impl Context {
    pub fn scope(&mut self) -> &mut ScopeContext {
        self.scope_contexts.last_mut().unwrap()
    }
}

pub trait Conv<T>: Sized {
    fn conv(context: &mut Context, src: T) -> Result<Self, SimulatorError>;
}