uart/
uart.rs

1#[macro_use]
2extern crate verugent;
3
4use verugent::vcore::*;
5
6fn main() {
7    uart();
8}
9
10fn uart() {
11    let mut m = VModule::new("UART");
12
13    let rst = m.Input("RST", 1);
14
15    let txclk = m.Input("txclk", 1);
16    let ldtxdata = m.Input("ld_tx_data", 1);
17    let txdata = m.Input("tx_data", 8);
18    let txen = m.Input("tx_enable", 1);
19    let txo = m.Reg_Output("tx_out", 1);
20    let txemp = m.Reg_Output("tx_empty", 1);
21
22    let rxclk = m.Input("rxclk",1);
23    let ulrxdata = m.Input("uld_rx_data", 1);
24    let rxdata = m.Reg_Output("rx_data", 8);
25    let rxen = m.Input("rx_enable", 1);
26    let rxin = m.Input("rx_in", 1);
27    let rxemp = m.Reg_Output("rx_empty", 0);
28
29    let txreg = m.Reg("tx_reg", 8);
30    let txovrn = m.Reg("rx_over_run", 0);
31    let txcnt = m.Reg("tx_cnt", 4);
32    
33    let rxreg = m.Reg("rx_reg", 8);
34    let rxsmpl = m.Reg("rx_sample_cnt", 4);
35    let rxcnt = m.Reg("rx_cnt", 4);
36    let rxfrerr = m.Reg("rx_frame_err", 0);
37    let rxovrn = m.Reg("rx_over_run", 0);
38
39    let rxd1 = m.Reg("rx_d1", 1);
40    let rxd2 = m.Reg("rx_d2", 1);
41
42    let rxbsy = m.Reg("rx_busy", 1);
43
44    m.Always(Posedge(rxclk).Posedge(&rst).non()
45            .If(&rst, Form(F!(rxreg = 0))
46                     .Form(F!(rxdata = 0))
47                     .Form(F!(rxsmpl = 0))
48                     .Form(F!(rxcnt = 0))
49                     .Form(F!(rxfrerr = 0))
50                     .Form(F!(rxovrn = 0))
51                     .Form(F!(rxemp = 1))
52                     .Form(F!(rxd1 = 1))
53                     .Form(F!(rxd2 = 1))
54                     .Form(F!(rxbsy = 0))
55                )
56            .Else(Form(F!(rxd1 = rxin))
57                 .Form(F!(rxd2 = rxd1))
58                 .Form(If(ulrxdata, 
59                    Form(F!(rxdata = rxreg))
60                   .Form(F!(rxemp = 1))))
61                 .Form(If(&rxen, 
62                    Form(If(!rxbsy.land(rxd2.not()), 
63                        Form(F!(rxbsy = 1))
64                       .Form(F!(rxsmpl = 1))
65                       .Form(F!(rxcnt = 0))
66                    ))
67                   .Form(If(&rxbsy,
68                        Form(rxsmpl.sst(&rxsmpl + 1))
69                       .Form(If(F!(rxsmpl == 7),
70                            Form(If(F!(rxd2 == 1).land(F!(rxcnt == 0)),
71                                    Form(F!(rxbsy = 0)))
72                                .Else(Form(rxcnt.sst(&rxcnt + 1))
73                                     .Form(If(F!(rxcnt > 0).land(F!(rxcnt < 9)),
74                                        Form(rxreg.addr(&rxcnt - 1).sst(&rxd2))
75                                     ))
76                                     .Form(If(F!(rxcnt == 9), Form(F!(rxbsy = 0))
77                                        .Form(If(F!(rxd2 == 0), Form(F!(rxfrerr = 1)))
78                                                .Else(Form(F!(rxemp = 0))
79                                                     .Form(F!(rxfrerr = 0))
80                                                     .Form(F!(rxovrn = !rxemp))))
81                                     ))
82                                )
83                            ))
84                        ))
85                    )
86                    
87                ))
88            )
89            .If(rxen.not(), Form(F!(rxbsy = 0)))
90    );
91
92
93    m.Always(Posedge(txclk).Posedge(&rst).non()
94        .If(rst, 
95            Form(F!(txreg = 0))
96           .Form(F!(txemp = 1))
97           .Form(F!(txovrn = 0))
98           .Form(F!(txo = 1))
99           .Form(F!(txcnt = 0)))
100        .Else(
101            Form(If(ldtxdata,
102                Form(If(txemp.not(), Form(F!(txovrn = 0)))
103                    .Else(Form(F!(txreg = txdata))
104                         .Form(F!(txemp = 0)))
105                )
106            ))
107            .Form(If(txen.land(txemp.not()),Form(txcnt.sst(&txcnt + 1))
108                .Form(If(F!(txcnt == 0), Form(F!(txo = 0))))
109                .Form(If(F!(txcnt > 0).land(F!(txcnt < 9)), Form(txo.sst(txreg.addr(&txcnt + 1)))))
110                .Form(If(F!(txcnt == 9), Form(F!(txo = 1))
111                                        .Form(F!(txcnt = 0))
112                                        .Form(F!(txemp = 1))))
113            ))
114            .Form(If(txen.not(), Form(F!(txcnt = 0))))
115        )
116    );
117    m.endmodule();
118
119	m.genPrint();
120}
uart/uart.rs

uart/
uart.rs
