Module va416xx::uart0

UART Peripheral

Re-exports

• pub use irq_enb as irq_raw;
• pub use irq_enb as irq_end;
• pub use irq_enb as irq_clr;
• pub use IrqEnb as IrqRaw;
• pub use IrqEnb as IrqEnd;
• pub use IrqEnb as IrqClr;

Modules

• addr9
  Address9 Register
• addr9mask
  Address9 Mask Register
• clkscale
  Clock Scale Register
• ctrl
  Control Register
• data
  Data In/Out Register
• enable
  Enable Register
• fifo_clr
  Clear FIFO Register
• irq_enb
  IRQ Enable Register
• perid
  Peripheral ID Register
• rxfifoirqtrg
  Rx FIFO IRQ Trigger Level
• rxfifortstrg
  Rx FIFO RTS Trigger Level
• rxstatus
  Status Register
• state
  Internal STATE of UART Controller
• txbreak
  Break Transmit Register
• txfifoirqtrg
  Tx FIFO IRQ Trigger Level
• txstatus
  Status Register

Structs

• RegisterBlock
  Register block

Type Aliases

• Addr9
  ADDR9 (rw) register accessor: Address9 Register
• Addr9mask
  ADDR9MASK (rw) register accessor: Address9 Mask Register
• Clkscale
  CLKSCALE (rw) register accessor: Clock Scale Register
• Ctrl
  CTRL (rw) register accessor: Control Register
• Data
  DATA (rw) register accessor: Data In/Out Register
• Enable
  ENABLE (rw) register accessor: Enable Register
• FifoClr
  FIFO_CLR (w) register accessor: Clear FIFO Register
• IrqEnb
  IRQ_ENB (rw) register accessor: IRQ Enable Register
• Perid
  PERID (r) register accessor: Peripheral ID Register
• Rxfifoirqtrg
  RXFIFOIRQTRG (rw) register accessor: Rx FIFO IRQ Trigger Level
• Rxfifortstrg
  RXFIFORTSTRG (rw) register accessor: Rx FIFO RTS Trigger Level
• Rxstatus
  RXSTATUS (r) register accessor: Status Register
• State
  STATE (r) register accessor: Internal STATE of UART Controller
• Txbreak
  TXBREAK (w) register accessor: Break Transmit Register
• Txfifoirqtrg
  TXFIFOIRQTRG (rw) register accessor: Tx FIFO IRQ Trigger Level
• Txstatus
  TXSTATUS (r) register accessor: Status Register