va416xx/spi0/
fifo_clr.rs

1#[doc = "Register `FIFO_CLR` writer"]
2pub type W = crate::W<FifoClrSpec>;
3#[doc = "Field `RXFIFO` writer - Clear Rx FIFO"]
4pub type RxfifoW<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `TXFIFO` writer - Clear Tx FIFO"]
6pub type TxfifoW<'a, REG> = crate::BitWriter<'a, REG>;
7impl W {
8    #[doc = "Bit 0 - Clear Rx FIFO"]
9    #[inline(always)]
10    pub fn rxfifo(&mut self) -> RxfifoW<'_, FifoClrSpec> {
11        RxfifoW::new(self, 0)
12    }
13    #[doc = "Bit 1 - Clear Tx FIFO"]
14    #[inline(always)]
15    pub fn txfifo(&mut self) -> TxfifoW<'_, FifoClrSpec> {
16        TxfifoW::new(self, 1)
17    }
18}
19#[doc = "Clear FIFO Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
20pub struct FifoClrSpec;
21impl crate::RegisterSpec for FifoClrSpec {
22    type Ux = u32;
23}
24#[doc = "`write(|w| ..)` method takes [`fifo_clr::W`](W) writer structure"]
25impl crate::Writable for FifoClrSpec {
26    type Safety = crate::Unsafe;
27}
28#[doc = "`reset()` method sets FIFO_CLR to value 0"]
29impl crate::Resettable for FifoClrSpec {}
va416xx/spi0/fifo_clr.rs

va416xx/spi0/
fifo_clr.rs
