v853_pac/uart/
dma_req_en.rs

1#[doc = "Register `dma_req_en` reader"]
2pub struct R(crate::R<DMA_REQ_EN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DMA_REQ_EN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DMA_REQ_EN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DMA_REQ_EN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `dma_req_en` writer"]
17pub struct W(crate::W<DMA_REQ_EN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DMA_REQ_EN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DMA_REQ_EN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DMA_REQ_EN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "DMA Timeout Enable\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum TIMEOUT_ENABLE_A {
40    #[doc = "0: `0`"]
41    DISABLE = 0,
42    #[doc = "1: `1`"]
43    ENABLE = 1,
44}
45impl From<TIMEOUT_ENABLE_A> for bool {
46    #[inline(always)]
47    fn from(variant: TIMEOUT_ENABLE_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `timeout_enable` reader - DMA Timeout Enable"]
52pub type TIMEOUT_ENABLE_R = crate::BitReader<TIMEOUT_ENABLE_A>;
53impl TIMEOUT_ENABLE_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> TIMEOUT_ENABLE_A {
57        match self.bits {
58            false => TIMEOUT_ENABLE_A::DISABLE,
59            true => TIMEOUT_ENABLE_A::ENABLE,
60        }
61    }
62    #[doc = "Checks if the value of the field is `DISABLE`"]
63    #[inline(always)]
64    pub fn is_disable(&self) -> bool {
65        *self == TIMEOUT_ENABLE_A::DISABLE
66    }
67    #[doc = "Checks if the value of the field is `ENABLE`"]
68    #[inline(always)]
69    pub fn is_enable(&self) -> bool {
70        *self == TIMEOUT_ENABLE_A::ENABLE
71    }
72}
73#[doc = "Field `timeout_enable` writer - DMA Timeout Enable"]
74pub type TIMEOUT_ENABLE_W<'a, const O: u8> =
75    crate::BitWriter<'a, u32, DMA_REQ_EN_SPEC, TIMEOUT_ENABLE_A, O>;
76impl<'a, const O: u8> TIMEOUT_ENABLE_W<'a, O> {
77    #[doc = "`0`"]
78    #[inline(always)]
79    pub fn disable(self) -> &'a mut W {
80        self.variant(TIMEOUT_ENABLE_A::DISABLE)
81    }
82    #[doc = "`1`"]
83    #[inline(always)]
84    pub fn enable(self) -> &'a mut W {
85        self.variant(TIMEOUT_ENABLE_A::ENABLE)
86    }
87}
88#[doc = "DMA TX REQ Enable\n\nValue on reset: 0"]
89#[derive(Clone, Copy, Debug, PartialEq)]
90pub enum TX_REQ_ENABLE_A {
91    #[doc = "0: `0`"]
92    DISABLE = 0,
93    #[doc = "1: `1`"]
94    ENABLE = 1,
95}
96impl From<TX_REQ_ENABLE_A> for bool {
97    #[inline(always)]
98    fn from(variant: TX_REQ_ENABLE_A) -> Self {
99        variant as u8 != 0
100    }
101}
102#[doc = "Field `tx_req_enable` reader - DMA TX REQ Enable"]
103pub type TX_REQ_ENABLE_R = crate::BitReader<TX_REQ_ENABLE_A>;
104impl TX_REQ_ENABLE_R {
105    #[doc = "Get enumerated values variant"]
106    #[inline(always)]
107    pub fn variant(&self) -> TX_REQ_ENABLE_A {
108        match self.bits {
109            false => TX_REQ_ENABLE_A::DISABLE,
110            true => TX_REQ_ENABLE_A::ENABLE,
111        }
112    }
113    #[doc = "Checks if the value of the field is `DISABLE`"]
114    #[inline(always)]
115    pub fn is_disable(&self) -> bool {
116        *self == TX_REQ_ENABLE_A::DISABLE
117    }
118    #[doc = "Checks if the value of the field is `ENABLE`"]
119    #[inline(always)]
120    pub fn is_enable(&self) -> bool {
121        *self == TX_REQ_ENABLE_A::ENABLE
122    }
123}
124#[doc = "Field `tx_req_enable` writer - DMA TX REQ Enable"]
125pub type TX_REQ_ENABLE_W<'a, const O: u8> =
126    crate::BitWriter<'a, u32, DMA_REQ_EN_SPEC, TX_REQ_ENABLE_A, O>;
127impl<'a, const O: u8> TX_REQ_ENABLE_W<'a, O> {
128    #[doc = "`0`"]
129    #[inline(always)]
130    pub fn disable(self) -> &'a mut W {
131        self.variant(TX_REQ_ENABLE_A::DISABLE)
132    }
133    #[doc = "`1`"]
134    #[inline(always)]
135    pub fn enable(self) -> &'a mut W {
136        self.variant(TX_REQ_ENABLE_A::ENABLE)
137    }
138}
139#[doc = "DMA RX REQ Enable\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq)]
141pub enum RX_REQ_ENABLE_A {
142    #[doc = "0: `0`"]
143    DISABLE = 0,
144    #[doc = "1: `1`"]
145    ENABLE = 1,
146}
147impl From<RX_REQ_ENABLE_A> for bool {
148    #[inline(always)]
149    fn from(variant: RX_REQ_ENABLE_A) -> Self {
150        variant as u8 != 0
151    }
152}
153#[doc = "Field `rx_req_enable` reader - DMA RX REQ Enable"]
154pub type RX_REQ_ENABLE_R = crate::BitReader<RX_REQ_ENABLE_A>;
155impl RX_REQ_ENABLE_R {
156    #[doc = "Get enumerated values variant"]
157    #[inline(always)]
158    pub fn variant(&self) -> RX_REQ_ENABLE_A {
159        match self.bits {
160            false => RX_REQ_ENABLE_A::DISABLE,
161            true => RX_REQ_ENABLE_A::ENABLE,
162        }
163    }
164    #[doc = "Checks if the value of the field is `DISABLE`"]
165    #[inline(always)]
166    pub fn is_disable(&self) -> bool {
167        *self == RX_REQ_ENABLE_A::DISABLE
168    }
169    #[doc = "Checks if the value of the field is `ENABLE`"]
170    #[inline(always)]
171    pub fn is_enable(&self) -> bool {
172        *self == RX_REQ_ENABLE_A::ENABLE
173    }
174}
175#[doc = "Field `rx_req_enable` writer - DMA RX REQ Enable"]
176pub type RX_REQ_ENABLE_W<'a, const O: u8> =
177    crate::BitWriter<'a, u32, DMA_REQ_EN_SPEC, RX_REQ_ENABLE_A, O>;
178impl<'a, const O: u8> RX_REQ_ENABLE_W<'a, O> {
179    #[doc = "`0`"]
180    #[inline(always)]
181    pub fn disable(self) -> &'a mut W {
182        self.variant(RX_REQ_ENABLE_A::DISABLE)
183    }
184    #[doc = "`1`"]
185    #[inline(always)]
186    pub fn enable(self) -> &'a mut W {
187        self.variant(RX_REQ_ENABLE_A::ENABLE)
188    }
189}
190impl R {
191    #[doc = "Bit 2 - DMA Timeout Enable"]
192    #[inline(always)]
193    pub fn timeout_enable(&self) -> TIMEOUT_ENABLE_R {
194        TIMEOUT_ENABLE_R::new(((self.bits >> 2) & 1) != 0)
195    }
196    #[doc = "Bit 1 - DMA TX REQ Enable"]
197    #[inline(always)]
198    pub fn tx_req_enable(&self) -> TX_REQ_ENABLE_R {
199        TX_REQ_ENABLE_R::new(((self.bits >> 1) & 1) != 0)
200    }
201    #[doc = "Bit 0 - DMA RX REQ Enable"]
202    #[inline(always)]
203    pub fn rx_req_enable(&self) -> RX_REQ_ENABLE_R {
204        RX_REQ_ENABLE_R::new((self.bits & 1) != 0)
205    }
206}
207impl W {
208    #[doc = "Bit 2 - DMA Timeout Enable"]
209    #[inline(always)]
210    pub fn timeout_enable(&mut self) -> TIMEOUT_ENABLE_W<2> {
211        TIMEOUT_ENABLE_W::new(self)
212    }
213    #[doc = "Bit 1 - DMA TX REQ Enable"]
214    #[inline(always)]
215    pub fn tx_req_enable(&mut self) -> TX_REQ_ENABLE_W<1> {
216        TX_REQ_ENABLE_W::new(self)
217    }
218    #[doc = "Bit 0 - DMA RX REQ Enable"]
219    #[inline(always)]
220    pub fn rx_req_enable(&mut self) -> RX_REQ_ENABLE_W<0> {
221        RX_REQ_ENABLE_W::new(self)
222    }
223    #[doc = "Writes raw bits to the register."]
224    #[inline(always)]
225    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
226        self.0.bits(bits);
227        self
228    }
229}
230#[doc = "UART DMA Request Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_req_en](index.html) module"]
231pub struct DMA_REQ_EN_SPEC;
232impl crate::RegisterSpec for DMA_REQ_EN_SPEC {
233    type Ux = u32;
234}
235#[doc = "`read()` method returns [dma_req_en::R](R) reader structure"]
236impl crate::Readable for DMA_REQ_EN_SPEC {
237    type Reader = R;
238}
239#[doc = "`write(|w| ..)` method takes [dma_req_en::W](W) writer structure"]
240impl crate::Writable for DMA_REQ_EN_SPEC {
241    type Writer = W;
242}
243#[doc = "`reset()` method sets dma_req_en to value 0"]
244impl crate::Resettable for DMA_REQ_EN_SPEC {
245    #[inline(always)]
246    fn reset_value() -> Self::Ux {
247        0
248    }
249}
v853_pac/uart/dma_req_en.rs

v853_pac/uart/
dma_req_en.rs
