1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 _reserved_0_dll: [u8; 0x04],
5 _reserved_1_dlh: [u8; 0x04],
6 _reserved_2_fcr: [u8; 0x04],
7 #[doc = "0x0c - UART Line Control Register"]
8 pub lcr: crate::Reg<lcr::LCR_SPEC>,
9 #[doc = "0x10 - UART Modem Control Register"]
10 pub mcr: crate::Reg<mcr::MCR_SPEC>,
11 #[doc = "0x14 - UART Line Status Register"]
12 pub lsr: crate::Reg<lsr::LSR_SPEC>,
13 #[doc = "0x18 - UART Modem Status Register"]
14 pub msr: crate::Reg<msr::MSR_SPEC>,
15 #[doc = "0x1c - UART Scratch Register"]
16 pub sch: crate::Reg<sch::SCH_SPEC>,
17 _reserved8: [u8; 0x5c],
18 #[doc = "0x7c - UART Status Register"]
19 pub usr: crate::Reg<usr::USR_SPEC>,
20 #[doc = "0x80 - UART Transmit FIFO Level Register"]
21 pub tfl: crate::Reg<tfl::TFL_SPEC>,
22 #[doc = "0x84 - UART Receive FIFO Level Register"]
23 pub rfl: crate::Reg<rfl::RFL_SPEC>,
24 #[doc = "0x88 - UART DMA Handshake Configuration Register"]
25 pub hsk: crate::Reg<hsk::HSK_SPEC>,
26 #[doc = "0x8c - UART DMA Request Enable Register"]
27 pub dma_req_en: crate::Reg<dma_req_en::DMA_REQ_EN_SPEC>,
28 _reserved13: [u8; 0x14],
29 #[doc = "0xa4 - UART Halt TX Register"]
30 pub halt: crate::Reg<halt::HALT_SPEC>,
31 _reserved14: [u8; 0x08],
32 #[doc = "0xb0 - UART Debug DLL Register"]
33 pub dbg_dll: crate::Reg<dbg_dll::DBG_DLL_SPEC>,
34 #[doc = "0xb4 - UART Debug DLH Register"]
35 pub dbg_dlh: crate::Reg<dbg_dlh::DBG_DLH_SPEC>,
36 _reserved16: [u8; 0x38],
37 #[doc = "0xf0 - UART FIFO Clock Control Register"]
38 pub fcc: crate::Reg<fcc::FCC_SPEC>,
39}
40impl RegisterBlock {
41 #[doc = "0x00 - UART Divisor Latch Low Register"]
42 #[inline(always)]
43 pub fn dll(&self) -> &crate::Reg<dll::DLL_SPEC> {
44 unsafe {
45 &*(((self as *const Self) as *const u8).add(0usize) as *const crate::Reg<dll::DLL_SPEC>)
46 }
47 }
48 #[doc = "0x00 - UART Transmit Holding Register"]
49 #[inline(always)]
50 pub fn thr(&self) -> &crate::Reg<thr::THR_SPEC> {
51 unsafe {
52 &*(((self as *const Self) as *const u8).add(0usize) as *const crate::Reg<thr::THR_SPEC>)
53 }
54 }
55 #[doc = "0x00 - UART Receive Buffer Register"]
56 #[inline(always)]
57 pub fn rbr(&self) -> &crate::Reg<rbr::RBR_SPEC> {
58 unsafe {
59 &*(((self as *const Self) as *const u8).add(0usize) as *const crate::Reg<rbr::RBR_SPEC>)
60 }
61 }
62 #[doc = "0x04 - UART Interrupt Enable Register"]
63 #[inline(always)]
64 pub fn ier(&self) -> &crate::Reg<ier::IER_SPEC> {
65 unsafe {
66 &*(((self as *const Self) as *const u8).add(4usize) as *const crate::Reg<ier::IER_SPEC>)
67 }
68 }
69 #[doc = "0x04 - UART Divisor Latch High Register"]
70 #[inline(always)]
71 pub fn dlh(&self) -> &crate::Reg<dlh::DLH_SPEC> {
72 unsafe {
73 &*(((self as *const Self) as *const u8).add(4usize) as *const crate::Reg<dlh::DLH_SPEC>)
74 }
75 }
76 #[doc = "0x08 - UART FIFO Control Register"]
77 #[inline(always)]
78 pub fn fcr(&self) -> &crate::Reg<fcr::FCR_SPEC> {
79 unsafe {
80 &*(((self as *const Self) as *const u8).add(8usize) as *const crate::Reg<fcr::FCR_SPEC>)
81 }
82 }
83 #[doc = "0x08 - UART Interrupt Identity Register"]
84 #[inline(always)]
85 pub fn iir(&self) -> &crate::Reg<iir::IIR_SPEC> {
86 unsafe {
87 &*(((self as *const Self) as *const u8).add(8usize) as *const crate::Reg<iir::IIR_SPEC>)
88 }
89 }
90}
91#[doc = "rbr register accessor: an alias for `Reg<RBR_SPEC>`"]
92pub type RBR = crate::Reg<rbr::RBR_SPEC>;
93#[doc = "UART Receive Buffer Register"]
94pub mod rbr;
95#[doc = "thr register accessor: an alias for `Reg<THR_SPEC>`"]
96pub type THR = crate::Reg<thr::THR_SPEC>;
97#[doc = "UART Transmit Holding Register"]
98pub mod thr;
99#[doc = "dll register accessor: an alias for `Reg<DLL_SPEC>`"]
100pub type DLL = crate::Reg<dll::DLL_SPEC>;
101#[doc = "UART Divisor Latch Low Register"]
102pub mod dll;
103#[doc = "dlh register accessor: an alias for `Reg<DLH_SPEC>`"]
104pub type DLH = crate::Reg<dlh::DLH_SPEC>;
105#[doc = "UART Divisor Latch High Register"]
106pub mod dlh;
107#[doc = "ier register accessor: an alias for `Reg<IER_SPEC>`"]
108pub type IER = crate::Reg<ier::IER_SPEC>;
109#[doc = "UART Interrupt Enable Register"]
110pub mod ier;
111#[doc = "iir register accessor: an alias for `Reg<IIR_SPEC>`"]
112pub type IIR = crate::Reg<iir::IIR_SPEC>;
113#[doc = "UART Interrupt Identity Register"]
114pub mod iir;
115#[doc = "fcr register accessor: an alias for `Reg<FCR_SPEC>`"]
116pub type FCR = crate::Reg<fcr::FCR_SPEC>;
117#[doc = "UART FIFO Control Register"]
118pub mod fcr;
119#[doc = "lcr register accessor: an alias for `Reg<LCR_SPEC>`"]
120pub type LCR = crate::Reg<lcr::LCR_SPEC>;
121#[doc = "UART Line Control Register"]
122pub mod lcr;
123#[doc = "mcr register accessor: an alias for `Reg<MCR_SPEC>`"]
124pub type MCR = crate::Reg<mcr::MCR_SPEC>;
125#[doc = "UART Modem Control Register"]
126pub mod mcr;
127#[doc = "lsr register accessor: an alias for `Reg<LSR_SPEC>`"]
128pub type LSR = crate::Reg<lsr::LSR_SPEC>;
129#[doc = "UART Line Status Register"]
130pub mod lsr;
131#[doc = "msr register accessor: an alias for `Reg<MSR_SPEC>`"]
132pub type MSR = crate::Reg<msr::MSR_SPEC>;
133#[doc = "UART Modem Status Register"]
134pub mod msr;
135#[doc = "sch register accessor: an alias for `Reg<SCH_SPEC>`"]
136pub type SCH = crate::Reg<sch::SCH_SPEC>;
137#[doc = "UART Scratch Register"]
138pub mod sch;
139#[doc = "usr register accessor: an alias for `Reg<USR_SPEC>`"]
140pub type USR = crate::Reg<usr::USR_SPEC>;
141#[doc = "UART Status Register"]
142pub mod usr;
143#[doc = "tfl register accessor: an alias for `Reg<TFL_SPEC>`"]
144pub type TFL = crate::Reg<tfl::TFL_SPEC>;
145#[doc = "UART Transmit FIFO Level Register"]
146pub mod tfl;
147#[doc = "rfl register accessor: an alias for `Reg<RFL_SPEC>`"]
148pub type RFL = crate::Reg<rfl::RFL_SPEC>;
149#[doc = "UART Receive FIFO Level Register"]
150pub mod rfl;
151#[doc = "hsk register accessor: an alias for `Reg<HSK_SPEC>`"]
152pub type HSK = crate::Reg<hsk::HSK_SPEC>;
153#[doc = "UART DMA Handshake Configuration Register"]
154pub mod hsk;
155#[doc = "dma_req_en register accessor: an alias for `Reg<DMA_REQ_EN_SPEC>`"]
156pub type DMA_REQ_EN = crate::Reg<dma_req_en::DMA_REQ_EN_SPEC>;
157#[doc = "UART DMA Request Enable Register"]
158pub mod dma_req_en;
159#[doc = "halt register accessor: an alias for `Reg<HALT_SPEC>`"]
160pub type HALT = crate::Reg<halt::HALT_SPEC>;
161#[doc = "UART Halt TX Register"]
162pub mod halt;
163#[doc = "dbg_dll register accessor: an alias for `Reg<DBG_DLL_SPEC>`"]
164pub type DBG_DLL = crate::Reg<dbg_dll::DBG_DLL_SPEC>;
165#[doc = "UART Debug DLL Register"]
166pub mod dbg_dll;
167#[doc = "dbg_dlh register accessor: an alias for `Reg<DBG_DLH_SPEC>`"]
168pub type DBG_DLH = crate::Reg<dbg_dlh::DBG_DLH_SPEC>;
169#[doc = "UART Debug DLH Register"]
170pub mod dbg_dlh;
171#[doc = "fcc register accessor: an alias for `Reg<FCC_SPEC>`"]
172pub type FCC = crate::Reg<fcc::FCC_SPEC>;
173#[doc = "UART FIFO Clock Control Register"]
174pub mod fcc;