tokitai-operator 0.1.0

Verified DL kernel compiler: formally-checked GEMM, p-adic, sheaf, contract-carrying ops. Paper-artifact grade.
Documentation
use tokitai_operator::backend::conformance::CpuOracleConformanceSuite;
use tokitai_operator::backend::hardware::{HardwareTarget, MemorySpace};
use tokitai_operator::backend::memory::{
    BufferLayout, DeviceBuffer, TransferDirection, TransferFallbackReason, TransferPlan,
    TransferStatus,
};
use tokitai_operator::domain::{Domain, DomainId, PadicDomain};
use tokitai_operator::object::sheaf::Cover;
use tokitai_operator::object::{DeviceId, ObjectMeta, Representation, Shape};

#[test]
fn p182_cpu_dense_tensor_maps_to_host_device_buffer_without_changing_domain() {
    let meta = ObjectMeta::tensor(
        DomainId::new("integer"),
        Shape::from(vec![2, 3]),
        Representation::dense_cpu(),
    );
    let buffer = DeviceBuffer::host_tensor("dense-i64", HardwareTarget::cpu_scalar(), meta, 8)
        .with_oracle_fixture("dense_i64_add_reduce");

    assert_eq!(buffer.memory_space, MemorySpace::Host);
    assert_eq!(buffer.layout, BufferLayout::Contiguous { element_count: 6 });
    assert_eq!(buffer.byte_len, Some(48));
    assert_eq!(buffer.meta.domain.0, "integer");
    assert_eq!(
        buffer.oracle_fixture.as_deref(),
        Some("dense_i64_add_reduce")
    );
    assert!(buffer.is_host_accessible());
}

#[test]
fn p182_padic_and_sheaf_witnesses_remain_representable_as_buffer_metadata() {
    let q5 = PadicDomain::new(5, 3).unwrap();
    let padic_meta = ObjectMeta::tensor(
        q5.id(),
        Shape::from(vec![4]),
        Representation::DenseTensor {
            layout: tokitai_operator::object::Layout::PadicLimbArray,
            device: DeviceId::cpu(),
        },
    );
    let padic_buffer =
        DeviceBuffer::host_tensor("padic", HardwareTarget::cpu_scalar(), padic_meta, 16)
            .with_oracle_fixture("padic_valuation_skip_sum_products");
    assert_eq!(
        padic_buffer.layout,
        BufferLayout::PadicLimbArray {
            element_count: 4,
            precision_digits: 3
        }
    );
    assert_eq!(
        padic_buffer.oracle_fixture.as_deref(),
        Some("padic_valuation_skip_sum_products")
    );

    let cover = Cover::new("U", ["A", "B"]);
    let sheaf_meta = ObjectMeta::tensor(
        DomainId::new(format!("cover:{}", cover.target.0)),
        Shape::from(vec![cover.opens.len()]),
        Representation::CoverIndexedSection {
            device: DeviceId::cpu(),
        },
    );
    let sheaf_buffer =
        DeviceBuffer::host_tensor("sheaf", HardwareTarget::cpu_scalar(), sheaf_meta, 8)
            .with_oracle_fixture("sheaf_finite_site_glue");
    assert_eq!(
        sheaf_buffer.layout,
        BufferLayout::CoverIndexed {
            open_count: cover.opens.len()
        }
    );
    assert_eq!(
        sheaf_buffer.oracle_fixture.as_deref(),
        Some("sheaf_finite_site_glue")
    );
}

#[test]
fn p182_transfer_plan_records_noop_host_transfer_for_cpu_oracle_fixture() {
    let report = CpuOracleConformanceSuite::new().run_all().unwrap();
    let fixture = report
        .fixtures
        .iter()
        .find(|fixture| fixture.name == "dense_i64_add_reduce")
        .unwrap();
    let meta = ObjectMeta::tensor(
        DomainId::new("integer"),
        Shape::from(vec![4]),
        Representation::dense_cpu(),
    );
    let source = DeviceBuffer::host_tensor("src", HardwareTarget::cpu_scalar(), meta.clone(), 8)
        .with_oracle_fixture(&fixture.name);
    let destination = DeviceBuffer::host_tensor("dst", HardwareTarget::cpu_scalar(), meta, 8)
        .with_oracle_fixture(&fixture.name);
    let transfer = TransferPlan::plan(source, destination);

    assert_eq!(transfer.direction, TransferDirection::HostToHost);
    assert_eq!(transfer.status, TransferStatus::NoOp);
    assert!(transfer.preserves_semantics);
    assert!(transfer.reason.is_none());
    transfer.require_supported().unwrap();
}

#[test]
fn p182_transfer_plan_rejects_unimplemented_host_to_device_path_explicitly() {
    let meta = ObjectMeta::tensor(
        DomainId::new("integer"),
        Shape::from(vec![2]),
        Representation::dense_cpu(),
    );
    let source = DeviceBuffer::host_tensor("src", HardwareTarget::cpu_scalar(), meta.clone(), 8);
    let mut destination = DeviceBuffer::host_tensor("dst", HardwareTarget::cpu_scalar(), meta, 8);
    destination.memory_space = MemorySpace::Device;

    let transfer = TransferPlan::plan(source, destination);
    assert_eq!(transfer.direction, TransferDirection::HostToDevice);
    assert!(matches!(
        transfer.status,
        TransferStatus::Unsupported(TransferFallbackReason::MissingDeviceMemory {
            source: MemorySpace::Host,
            destination: MemorySpace::Device
        })
    ));
    assert!(!transfer.preserves_semantics);
    assert!(
        transfer
            .require_supported()
            .unwrap_err()
            .to_string()
            .contains("missing device-memory implementation")
    );
}