1#[doc = "Reader of register CTL"]
2pub type R = crate::R<u32, super::CTL>;
3#[doc = "Writer for register CTL"]
4pub type W = crate::W<u32, super::CTL>;
5#[doc = "Register CTL `reset()`'s with value 0"]
6impl crate::ResetValue for super::CTL {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `UARTEN`"]
14pub type UARTEN_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `UARTEN`"]
16pub struct UARTEN_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> UARTEN_W<'a> {
20 #[doc = r"Sets the field bit"]
21 #[inline(always)]
22 pub fn set_bit(self) -> &'a mut W {
23 self.bit(true)
24 }
25 #[doc = r"Clears the field bit"]
26 #[inline(always)]
27 pub fn clear_bit(self) -> &'a mut W {
28 self.bit(false)
29 }
30 #[doc = r"Writes raw bits to the field"]
31 #[inline(always)]
32 pub fn bit(self, value: bool) -> &'a mut W {
33 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34 self.w
35 }
36}
37#[doc = "Reader of field `SIREN`"]
38pub type SIREN_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `SIREN`"]
40pub struct SIREN_W<'a> {
41 w: &'a mut W,
42}
43impl<'a> SIREN_W<'a> {
44 #[doc = r"Sets the field bit"]
45 #[inline(always)]
46 pub fn set_bit(self) -> &'a mut W {
47 self.bit(true)
48 }
49 #[doc = r"Clears the field bit"]
50 #[inline(always)]
51 pub fn clear_bit(self) -> &'a mut W {
52 self.bit(false)
53 }
54 #[doc = r"Writes raw bits to the field"]
55 #[inline(always)]
56 pub fn bit(self, value: bool) -> &'a mut W {
57 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
58 self.w
59 }
60}
61#[doc = "Reader of field `SIRLP`"]
62pub type SIRLP_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `SIRLP`"]
64pub struct SIRLP_W<'a> {
65 w: &'a mut W,
66}
67impl<'a> SIRLP_W<'a> {
68 #[doc = r"Sets the field bit"]
69 #[inline(always)]
70 pub fn set_bit(self) -> &'a mut W {
71 self.bit(true)
72 }
73 #[doc = r"Clears the field bit"]
74 #[inline(always)]
75 pub fn clear_bit(self) -> &'a mut W {
76 self.bit(false)
77 }
78 #[doc = r"Writes raw bits to the field"]
79 #[inline(always)]
80 pub fn bit(self, value: bool) -> &'a mut W {
81 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
82 self.w
83 }
84}
85#[doc = "Reader of field `SMART`"]
86pub type SMART_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `SMART`"]
88pub struct SMART_W<'a> {
89 w: &'a mut W,
90}
91impl<'a> SMART_W<'a> {
92 #[doc = r"Sets the field bit"]
93 #[inline(always)]
94 pub fn set_bit(self) -> &'a mut W {
95 self.bit(true)
96 }
97 #[doc = r"Clears the field bit"]
98 #[inline(always)]
99 pub fn clear_bit(self) -> &'a mut W {
100 self.bit(false)
101 }
102 #[doc = r"Writes raw bits to the field"]
103 #[inline(always)]
104 pub fn bit(self, value: bool) -> &'a mut W {
105 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
106 self.w
107 }
108}
109#[doc = "Reader of field `EOT`"]
110pub type EOT_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `EOT`"]
112pub struct EOT_W<'a> {
113 w: &'a mut W,
114}
115impl<'a> EOT_W<'a> {
116 #[doc = r"Sets the field bit"]
117 #[inline(always)]
118 pub fn set_bit(self) -> &'a mut W {
119 self.bit(true)
120 }
121 #[doc = r"Clears the field bit"]
122 #[inline(always)]
123 pub fn clear_bit(self) -> &'a mut W {
124 self.bit(false)
125 }
126 #[doc = r"Writes raw bits to the field"]
127 #[inline(always)]
128 pub fn bit(self, value: bool) -> &'a mut W {
129 self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
130 self.w
131 }
132}
133#[doc = "Reader of field `HSE`"]
134pub type HSE_R = crate::R<bool, bool>;
135#[doc = "Write proxy for field `HSE`"]
136pub struct HSE_W<'a> {
137 w: &'a mut W,
138}
139impl<'a> HSE_W<'a> {
140 #[doc = r"Sets the field bit"]
141 #[inline(always)]
142 pub fn set_bit(self) -> &'a mut W {
143 self.bit(true)
144 }
145 #[doc = r"Clears the field bit"]
146 #[inline(always)]
147 pub fn clear_bit(self) -> &'a mut W {
148 self.bit(false)
149 }
150 #[doc = r"Writes raw bits to the field"]
151 #[inline(always)]
152 pub fn bit(self, value: bool) -> &'a mut W {
153 self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
154 self.w
155 }
156}
157#[doc = "Reader of field `LBE`"]
158pub type LBE_R = crate::R<bool, bool>;
159#[doc = "Write proxy for field `LBE`"]
160pub struct LBE_W<'a> {
161 w: &'a mut W,
162}
163impl<'a> LBE_W<'a> {
164 #[doc = r"Sets the field bit"]
165 #[inline(always)]
166 pub fn set_bit(self) -> &'a mut W {
167 self.bit(true)
168 }
169 #[doc = r"Clears the field bit"]
170 #[inline(always)]
171 pub fn clear_bit(self) -> &'a mut W {
172 self.bit(false)
173 }
174 #[doc = r"Writes raw bits to the field"]
175 #[inline(always)]
176 pub fn bit(self, value: bool) -> &'a mut W {
177 self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
178 self.w
179 }
180}
181#[doc = "Reader of field `TXE`"]
182pub type TXE_R = crate::R<bool, bool>;
183#[doc = "Write proxy for field `TXE`"]
184pub struct TXE_W<'a> {
185 w: &'a mut W,
186}
187impl<'a> TXE_W<'a> {
188 #[doc = r"Sets the field bit"]
189 #[inline(always)]
190 pub fn set_bit(self) -> &'a mut W {
191 self.bit(true)
192 }
193 #[doc = r"Clears the field bit"]
194 #[inline(always)]
195 pub fn clear_bit(self) -> &'a mut W {
196 self.bit(false)
197 }
198 #[doc = r"Writes raw bits to the field"]
199 #[inline(always)]
200 pub fn bit(self, value: bool) -> &'a mut W {
201 self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
202 self.w
203 }
204}
205#[doc = "Reader of field `RXE`"]
206pub type RXE_R = crate::R<bool, bool>;
207#[doc = "Write proxy for field `RXE`"]
208pub struct RXE_W<'a> {
209 w: &'a mut W,
210}
211impl<'a> RXE_W<'a> {
212 #[doc = r"Sets the field bit"]
213 #[inline(always)]
214 pub fn set_bit(self) -> &'a mut W {
215 self.bit(true)
216 }
217 #[doc = r"Clears the field bit"]
218 #[inline(always)]
219 pub fn clear_bit(self) -> &'a mut W {
220 self.bit(false)
221 }
222 #[doc = r"Writes raw bits to the field"]
223 #[inline(always)]
224 pub fn bit(self, value: bool) -> &'a mut W {
225 self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
226 self.w
227 }
228}
229#[doc = "Reader of field `DTR`"]
230pub type DTR_R = crate::R<bool, bool>;
231#[doc = "Write proxy for field `DTR`"]
232pub struct DTR_W<'a> {
233 w: &'a mut W,
234}
235impl<'a> DTR_W<'a> {
236 #[doc = r"Sets the field bit"]
237 #[inline(always)]
238 pub fn set_bit(self) -> &'a mut W {
239 self.bit(true)
240 }
241 #[doc = r"Clears the field bit"]
242 #[inline(always)]
243 pub fn clear_bit(self) -> &'a mut W {
244 self.bit(false)
245 }
246 #[doc = r"Writes raw bits to the field"]
247 #[inline(always)]
248 pub fn bit(self, value: bool) -> &'a mut W {
249 self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
250 self.w
251 }
252}
253#[doc = "Reader of field `RTS`"]
254pub type RTS_R = crate::R<bool, bool>;
255#[doc = "Write proxy for field `RTS`"]
256pub struct RTS_W<'a> {
257 w: &'a mut W,
258}
259impl<'a> RTS_W<'a> {
260 #[doc = r"Sets the field bit"]
261 #[inline(always)]
262 pub fn set_bit(self) -> &'a mut W {
263 self.bit(true)
264 }
265 #[doc = r"Clears the field bit"]
266 #[inline(always)]
267 pub fn clear_bit(self) -> &'a mut W {
268 self.bit(false)
269 }
270 #[doc = r"Writes raw bits to the field"]
271 #[inline(always)]
272 pub fn bit(self, value: bool) -> &'a mut W {
273 self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
274 self.w
275 }
276}
277#[doc = "Reader of field `RTSEN`"]
278pub type RTSEN_R = crate::R<bool, bool>;
279#[doc = "Write proxy for field `RTSEN`"]
280pub struct RTSEN_W<'a> {
281 w: &'a mut W,
282}
283impl<'a> RTSEN_W<'a> {
284 #[doc = r"Sets the field bit"]
285 #[inline(always)]
286 pub fn set_bit(self) -> &'a mut W {
287 self.bit(true)
288 }
289 #[doc = r"Clears the field bit"]
290 #[inline(always)]
291 pub fn clear_bit(self) -> &'a mut W {
292 self.bit(false)
293 }
294 #[doc = r"Writes raw bits to the field"]
295 #[inline(always)]
296 pub fn bit(self, value: bool) -> &'a mut W {
297 self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
298 self.w
299 }
300}
301#[doc = "Reader of field `CTSEN`"]
302pub type CTSEN_R = crate::R<bool, bool>;
303#[doc = "Write proxy for field `CTSEN`"]
304pub struct CTSEN_W<'a> {
305 w: &'a mut W,
306}
307impl<'a> CTSEN_W<'a> {
308 #[doc = r"Sets the field bit"]
309 #[inline(always)]
310 pub fn set_bit(self) -> &'a mut W {
311 self.bit(true)
312 }
313 #[doc = r"Clears the field bit"]
314 #[inline(always)]
315 pub fn clear_bit(self) -> &'a mut W {
316 self.bit(false)
317 }
318 #[doc = r"Writes raw bits to the field"]
319 #[inline(always)]
320 pub fn bit(self, value: bool) -> &'a mut W {
321 self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
322 self.w
323 }
324}
325impl R {
326 #[doc = "Bit 0 - UART Enable"]
327 #[inline(always)]
328 pub fn uarten(&self) -> UARTEN_R {
329 UARTEN_R::new((self.bits & 0x01) != 0)
330 }
331 #[doc = "Bit 1 - UART SIR Enable"]
332 #[inline(always)]
333 pub fn siren(&self) -> SIREN_R {
334 SIREN_R::new(((self.bits >> 1) & 0x01) != 0)
335 }
336 #[doc = "Bit 2 - UART SIR Low-Power Mode"]
337 #[inline(always)]
338 pub fn sirlp(&self) -> SIRLP_R {
339 SIRLP_R::new(((self.bits >> 2) & 0x01) != 0)
340 }
341 #[doc = "Bit 3 - ISO 7816 Smart Card Support"]
342 #[inline(always)]
343 pub fn smart(&self) -> SMART_R {
344 SMART_R::new(((self.bits >> 3) & 0x01) != 0)
345 }
346 #[doc = "Bit 4 - End of Transmission"]
347 #[inline(always)]
348 pub fn eot(&self) -> EOT_R {
349 EOT_R::new(((self.bits >> 4) & 0x01) != 0)
350 }
351 #[doc = "Bit 5 - High-Speed Enable"]
352 #[inline(always)]
353 pub fn hse(&self) -> HSE_R {
354 HSE_R::new(((self.bits >> 5) & 0x01) != 0)
355 }
356 #[doc = "Bit 7 - UART Loop Back Enable"]
357 #[inline(always)]
358 pub fn lbe(&self) -> LBE_R {
359 LBE_R::new(((self.bits >> 7) & 0x01) != 0)
360 }
361 #[doc = "Bit 8 - UART Transmit Enable"]
362 #[inline(always)]
363 pub fn txe(&self) -> TXE_R {
364 TXE_R::new(((self.bits >> 8) & 0x01) != 0)
365 }
366 #[doc = "Bit 9 - UART Receive Enable"]
367 #[inline(always)]
368 pub fn rxe(&self) -> RXE_R {
369 RXE_R::new(((self.bits >> 9) & 0x01) != 0)
370 }
371 #[doc = "Bit 10 - Data Terminal Ready"]
372 #[inline(always)]
373 pub fn dtr(&self) -> DTR_R {
374 DTR_R::new(((self.bits >> 10) & 0x01) != 0)
375 }
376 #[doc = "Bit 11 - Request to Send"]
377 #[inline(always)]
378 pub fn rts(&self) -> RTS_R {
379 RTS_R::new(((self.bits >> 11) & 0x01) != 0)
380 }
381 #[doc = "Bit 14 - Enable Request to Send"]
382 #[inline(always)]
383 pub fn rtsen(&self) -> RTSEN_R {
384 RTSEN_R::new(((self.bits >> 14) & 0x01) != 0)
385 }
386 #[doc = "Bit 15 - Enable Clear To Send"]
387 #[inline(always)]
388 pub fn ctsen(&self) -> CTSEN_R {
389 CTSEN_R::new(((self.bits >> 15) & 0x01) != 0)
390 }
391}
392impl W {
393 #[doc = "Bit 0 - UART Enable"]
394 #[inline(always)]
395 pub fn uarten(&mut self) -> UARTEN_W {
396 UARTEN_W { w: self }
397 }
398 #[doc = "Bit 1 - UART SIR Enable"]
399 #[inline(always)]
400 pub fn siren(&mut self) -> SIREN_W {
401 SIREN_W { w: self }
402 }
403 #[doc = "Bit 2 - UART SIR Low-Power Mode"]
404 #[inline(always)]
405 pub fn sirlp(&mut self) -> SIRLP_W {
406 SIRLP_W { w: self }
407 }
408 #[doc = "Bit 3 - ISO 7816 Smart Card Support"]
409 #[inline(always)]
410 pub fn smart(&mut self) -> SMART_W {
411 SMART_W { w: self }
412 }
413 #[doc = "Bit 4 - End of Transmission"]
414 #[inline(always)]
415 pub fn eot(&mut self) -> EOT_W {
416 EOT_W { w: self }
417 }
418 #[doc = "Bit 5 - High-Speed Enable"]
419 #[inline(always)]
420 pub fn hse(&mut self) -> HSE_W {
421 HSE_W { w: self }
422 }
423 #[doc = "Bit 7 - UART Loop Back Enable"]
424 #[inline(always)]
425 pub fn lbe(&mut self) -> LBE_W {
426 LBE_W { w: self }
427 }
428 #[doc = "Bit 8 - UART Transmit Enable"]
429 #[inline(always)]
430 pub fn txe(&mut self) -> TXE_W {
431 TXE_W { w: self }
432 }
433 #[doc = "Bit 9 - UART Receive Enable"]
434 #[inline(always)]
435 pub fn rxe(&mut self) -> RXE_W {
436 RXE_W { w: self }
437 }
438 #[doc = "Bit 10 - Data Terminal Ready"]
439 #[inline(always)]
440 pub fn dtr(&mut self) -> DTR_W {
441 DTR_W { w: self }
442 }
443 #[doc = "Bit 11 - Request to Send"]
444 #[inline(always)]
445 pub fn rts(&mut self) -> RTS_W {
446 RTS_W { w: self }
447 }
448 #[doc = "Bit 14 - Enable Request to Send"]
449 #[inline(always)]
450 pub fn rtsen(&mut self) -> RTSEN_W {
451 RTSEN_W { w: self }
452 }
453 #[doc = "Bit 15 - Enable Clear To Send"]
454 #[inline(always)]
455 pub fn ctsen(&mut self) -> CTSEN_W {
456 CTSEN_W { w: self }
457 }
458}