tm4c129x/epi0/
hb16time3.rs

1#[doc = "Reader of register HB16TIME3"]
2pub type R = crate::R<u32, super::HB16TIME3>;
3#[doc = "Writer for register HB16TIME3"]
4pub type W = crate::W<u32, super::HB16TIME3>;
5#[doc = "Register HB16TIME3 `reset()`'s with value 0"]
6impl crate::ResetValue for super::HB16TIME3 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `RDWSM`"]
14pub type RDWSM_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `RDWSM`"]
16pub struct RDWSM_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> RDWSM_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34        self.w
35    }
36}
37#[doc = "Reader of field `WRWSM`"]
38pub type WRWSM_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `WRWSM`"]
40pub struct WRWSM_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> WRWSM_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
58        self.w
59    }
60}
61#[doc = "Reader of field `CAPWIDTH`"]
62pub type CAPWIDTH_R = crate::R<u8, u8>;
63#[doc = "Write proxy for field `CAPWIDTH`"]
64pub struct CAPWIDTH_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> CAPWIDTH_W<'a> {
68    #[doc = r"Writes raw bits to the field"]
69    #[inline(always)]
70    pub unsafe fn bits(self, value: u8) -> &'a mut W {
71        self.w.bits = (self.w.bits & !(0x03 << 12)) | (((value as u32) & 0x03) << 12);
72        self.w
73    }
74}
75#[doc = "PSRAM Row Size\n\nValue on reset: 0"]
76#[derive(Clone, Copy, Debug, PartialEq)]
77#[repr(u8)]
78pub enum PSRAMSZ_A {
79    #[doc = "0: No row size limitation"]
80    _0 = 0,
81    #[doc = "1: 128 B"]
82    _128B = 1,
83    #[doc = "2: 256 B"]
84    _256B = 2,
85    #[doc = "3: 512 B"]
86    _512B = 3,
87    #[doc = "4: 1024 B"]
88    _1KB = 4,
89    #[doc = "5: 2048 B"]
90    _2KB = 5,
91    #[doc = "6: 4096 B"]
92    _4KB = 6,
93    #[doc = "7: 8192 B"]
94    _8KB = 7,
95}
96impl From<PSRAMSZ_A> for u8 {
97    #[inline(always)]
98    fn from(variant: PSRAMSZ_A) -> Self {
99        variant as _
100    }
101}
102#[doc = "Reader of field `PSRAMSZ`"]
103pub type PSRAMSZ_R = crate::R<u8, PSRAMSZ_A>;
104impl PSRAMSZ_R {
105    #[doc = r"Get enumerated values variant"]
106    #[inline(always)]
107    pub fn variant(&self) -> PSRAMSZ_A {
108        match self.bits {
109            0 => PSRAMSZ_A::_0,
110            1 => PSRAMSZ_A::_128B,
111            2 => PSRAMSZ_A::_256B,
112            3 => PSRAMSZ_A::_512B,
113            4 => PSRAMSZ_A::_1KB,
114            5 => PSRAMSZ_A::_2KB,
115            6 => PSRAMSZ_A::_4KB,
116            7 => PSRAMSZ_A::_8KB,
117            _ => unreachable!(),
118        }
119    }
120    #[doc = "Checks if the value of the field is `_0`"]
121    #[inline(always)]
122    pub fn is_0(&self) -> bool {
123        *self == PSRAMSZ_A::_0
124    }
125    #[doc = "Checks if the value of the field is `_128B`"]
126    #[inline(always)]
127    pub fn is_128b(&self) -> bool {
128        *self == PSRAMSZ_A::_128B
129    }
130    #[doc = "Checks if the value of the field is `_256B`"]
131    #[inline(always)]
132    pub fn is_256b(&self) -> bool {
133        *self == PSRAMSZ_A::_256B
134    }
135    #[doc = "Checks if the value of the field is `_512B`"]
136    #[inline(always)]
137    pub fn is_512b(&self) -> bool {
138        *self == PSRAMSZ_A::_512B
139    }
140    #[doc = "Checks if the value of the field is `_1KB`"]
141    #[inline(always)]
142    pub fn is_1kb(&self) -> bool {
143        *self == PSRAMSZ_A::_1KB
144    }
145    #[doc = "Checks if the value of the field is `_2KB`"]
146    #[inline(always)]
147    pub fn is_2kb(&self) -> bool {
148        *self == PSRAMSZ_A::_2KB
149    }
150    #[doc = "Checks if the value of the field is `_4KB`"]
151    #[inline(always)]
152    pub fn is_4kb(&self) -> bool {
153        *self == PSRAMSZ_A::_4KB
154    }
155    #[doc = "Checks if the value of the field is `_8KB`"]
156    #[inline(always)]
157    pub fn is_8kb(&self) -> bool {
158        *self == PSRAMSZ_A::_8KB
159    }
160}
161#[doc = "Write proxy for field `PSRAMSZ`"]
162pub struct PSRAMSZ_W<'a> {
163    w: &'a mut W,
164}
165impl<'a> PSRAMSZ_W<'a> {
166    #[doc = r"Writes `variant` to the field"]
167    #[inline(always)]
168    pub fn variant(self, variant: PSRAMSZ_A) -> &'a mut W {
169        {
170            self.bits(variant.into())
171        }
172    }
173    #[doc = "No row size limitation"]
174    #[inline(always)]
175    pub fn _0(self) -> &'a mut W {
176        self.variant(PSRAMSZ_A::_0)
177    }
178    #[doc = "128 B"]
179    #[inline(always)]
180    pub fn _128b(self) -> &'a mut W {
181        self.variant(PSRAMSZ_A::_128B)
182    }
183    #[doc = "256 B"]
184    #[inline(always)]
185    pub fn _256b(self) -> &'a mut W {
186        self.variant(PSRAMSZ_A::_256B)
187    }
188    #[doc = "512 B"]
189    #[inline(always)]
190    pub fn _512b(self) -> &'a mut W {
191        self.variant(PSRAMSZ_A::_512B)
192    }
193    #[doc = "1024 B"]
194    #[inline(always)]
195    pub fn _1kb(self) -> &'a mut W {
196        self.variant(PSRAMSZ_A::_1KB)
197    }
198    #[doc = "2048 B"]
199    #[inline(always)]
200    pub fn _2kb(self) -> &'a mut W {
201        self.variant(PSRAMSZ_A::_2KB)
202    }
203    #[doc = "4096 B"]
204    #[inline(always)]
205    pub fn _4kb(self) -> &'a mut W {
206        self.variant(PSRAMSZ_A::_4KB)
207    }
208    #[doc = "8192 B"]
209    #[inline(always)]
210    pub fn _8kb(self) -> &'a mut W {
211        self.variant(PSRAMSZ_A::_8KB)
212    }
213    #[doc = r"Writes raw bits to the field"]
214    #[inline(always)]
215    pub fn bits(self, value: u8) -> &'a mut W {
216        self.w.bits = (self.w.bits & !(0x07 << 16)) | (((value as u32) & 0x07) << 16);
217        self.w
218    }
219}
220#[doc = "Reader of field `IRDYDLY`"]
221pub type IRDYDLY_R = crate::R<u8, u8>;
222#[doc = "Write proxy for field `IRDYDLY`"]
223pub struct IRDYDLY_W<'a> {
224    w: &'a mut W,
225}
226impl<'a> IRDYDLY_W<'a> {
227    #[doc = r"Writes raw bits to the field"]
228    #[inline(always)]
229    pub unsafe fn bits(self, value: u8) -> &'a mut W {
230        self.w.bits = (self.w.bits & !(0x03 << 24)) | (((value as u32) & 0x03) << 24);
231        self.w
232    }
233}
234impl R {
235    #[doc = "Bit 0 - CS2n Read Wait State Minus One"]
236    #[inline(always)]
237    pub fn rdwsm(&self) -> RDWSM_R {
238        RDWSM_R::new((self.bits & 0x01) != 0)
239    }
240    #[doc = "Bit 4 - CS2n Write Wait State Minus One"]
241    #[inline(always)]
242    pub fn wrwsm(&self) -> WRWSM_R {
243        WRWSM_R::new(((self.bits >> 4) & 0x01) != 0)
244    }
245    #[doc = "Bits 12:13 - CS2n Inter-transfer Capture Width"]
246    #[inline(always)]
247    pub fn capwidth(&self) -> CAPWIDTH_R {
248        CAPWIDTH_R::new(((self.bits >> 12) & 0x03) as u8)
249    }
250    #[doc = "Bits 16:18 - PSRAM Row Size"]
251    #[inline(always)]
252    pub fn psramsz(&self) -> PSRAMSZ_R {
253        PSRAMSZ_R::new(((self.bits >> 16) & 0x07) as u8)
254    }
255    #[doc = "Bits 24:25 - CS2n Input Ready Delay"]
256    #[inline(always)]
257    pub fn irdydly(&self) -> IRDYDLY_R {
258        IRDYDLY_R::new(((self.bits >> 24) & 0x03) as u8)
259    }
260}
261impl W {
262    #[doc = "Bit 0 - CS2n Read Wait State Minus One"]
263    #[inline(always)]
264    pub fn rdwsm(&mut self) -> RDWSM_W {
265        RDWSM_W { w: self }
266    }
267    #[doc = "Bit 4 - CS2n Write Wait State Minus One"]
268    #[inline(always)]
269    pub fn wrwsm(&mut self) -> WRWSM_W {
270        WRWSM_W { w: self }
271    }
272    #[doc = "Bits 12:13 - CS2n Inter-transfer Capture Width"]
273    #[inline(always)]
274    pub fn capwidth(&mut self) -> CAPWIDTH_W {
275        CAPWIDTH_W { w: self }
276    }
277    #[doc = "Bits 16:18 - PSRAM Row Size"]
278    #[inline(always)]
279    pub fn psramsz(&mut self) -> PSRAMSZ_W {
280        PSRAMSZ_W { w: self }
281    }
282    #[doc = "Bits 24:25 - CS2n Input Ready Delay"]
283    #[inline(always)]
284    pub fn irdydly(&mut self) -> IRDYDLY_W {
285        IRDYDLY_W { w: self }
286    }
287}
tm4c129x/epi0/hb16time3.rs

tm4c129x/epi0/
hb16time3.rs
