#[doc = "Reader of register DMABUSMOD"]
pub type R = crate::R<u32, super::DMABUSMOD>;
#[doc = "Writer for register DMABUSMOD"]
pub type W = crate::W<u32, super::DMABUSMOD>;
#[doc = "Register DMABUSMOD `reset()`'s with value 0"]
impl crate::ResetValue for super::DMABUSMOD {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Reader of field `SWR`"]
pub type SWR_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `SWR`"]
pub struct SWR_W<'a> {
w: &'a mut W,
}
impl<'a> SWR_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
#[doc = "Reader of field `DA`"]
pub type DA_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `DA`"]
pub struct DA_W<'a> {
w: &'a mut W,
}
impl<'a> DA_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "Reader of field `DSL`"]
pub type DSL_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `DSL`"]
pub struct DSL_W<'a> {
w: &'a mut W,
}
impl<'a> DSL_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x1f << 2)) | (((value as u32) & 0x1f) << 2);
self.w
}
}
#[doc = "Reader of field `ATDS`"]
pub type ATDS_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `ATDS`"]
pub struct ATDS_W<'a> {
w: &'a mut W,
}
impl<'a> ATDS_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
self.w
}
}
#[doc = "Reader of field `PBL`"]
pub type PBL_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `PBL`"]
pub struct PBL_W<'a> {
w: &'a mut W,
}
impl<'a> PBL_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x3f << 8)) | (((value as u32) & 0x3f) << 8);
self.w
}
}
#[doc = "Reader of field `PR`"]
pub type PR_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `PR`"]
pub struct PR_W<'a> {
w: &'a mut W,
}
impl<'a> PR_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 14)) | (((value as u32) & 0x03) << 14);
self.w
}
}
#[doc = "Reader of field `FB`"]
pub type FB_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `FB`"]
pub struct FB_W<'a> {
w: &'a mut W,
}
impl<'a> FB_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
self.w
}
}
#[doc = "Reader of field `RPBL`"]
pub type RPBL_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `RPBL`"]
pub struct RPBL_W<'a> {
w: &'a mut W,
}
impl<'a> RPBL_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x3f << 17)) | (((value as u32) & 0x3f) << 17);
self.w
}
}
#[doc = "Reader of field `USP`"]
pub type USP_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `USP`"]
pub struct USP_W<'a> {
w: &'a mut W,
}
impl<'a> USP_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
self.w
}
}
#[doc = "Reader of field `_8XPBL`"]
pub type _8XPBL_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `_8XPBL`"]
pub struct _8XPBL_W<'a> {
w: &'a mut W,
}
impl<'a> _8XPBL_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
self.w
}
}
#[doc = "Reader of field `AAL`"]
pub type AAL_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `AAL`"]
pub struct AAL_W<'a> {
w: &'a mut W,
}
impl<'a> AAL_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
self.w
}
}
#[doc = "Reader of field `MB`"]
pub type MB_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `MB`"]
pub struct MB_W<'a> {
w: &'a mut W,
}
impl<'a> MB_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
self.w
}
}
#[doc = "Reader of field `TXPR`"]
pub type TXPR_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `TXPR`"]
pub struct TXPR_W<'a> {
w: &'a mut W,
}
impl<'a> TXPR_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
self.w
}
}
#[doc = "Reader of field `RIB`"]
pub type RIB_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RIB`"]
pub struct RIB_W<'a> {
w: &'a mut W,
}
impl<'a> RIB_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
self.w
}
}
impl R {
#[doc = "Bit 0 - DMA Software Reset"]
#[inline(always)]
pub fn swr(&self) -> SWR_R {
SWR_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 1 - DMA Arbitration Scheme"]
#[inline(always)]
pub fn da(&self) -> DA_R {
DA_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bits 2:6 - Descriptor Skip Length"]
#[inline(always)]
pub fn dsl(&self) -> DSL_R {
DSL_R::new(((self.bits >> 2) & 0x1f) as u8)
}
#[doc = "Bit 7 - Alternate Descriptor Size"]
#[inline(always)]
pub fn atds(&self) -> ATDS_R {
ATDS_R::new(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bits 8:13 - Programmable Burst Length"]
#[inline(always)]
pub fn pbl(&self) -> PBL_R {
PBL_R::new(((self.bits >> 8) & 0x3f) as u8)
}
#[doc = "Bits 14:15 - Priority Ratio"]
#[inline(always)]
pub fn pr(&self) -> PR_R {
PR_R::new(((self.bits >> 14) & 0x03) as u8)
}
#[doc = "Bit 16 - Fixed Burst"]
#[inline(always)]
pub fn fb(&self) -> FB_R {
FB_R::new(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bits 17:22 - RX DMA Programmable Burst Length (PBL)"]
#[inline(always)]
pub fn rpbl(&self) -> RPBL_R {
RPBL_R::new(((self.bits >> 17) & 0x3f) as u8)
}
#[doc = "Bit 23 - Use Separate Programmable Burst Length (PBL)"]
#[inline(always)]
pub fn usp(&self) -> USP_R {
USP_R::new(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 24 - 8 x Programmable Burst Length (PBL) Mode"]
#[inline(always)]
pub fn _8xpbl(&self) -> _8XPBL_R {
_8XPBL_R::new(((self.bits >> 24) & 0x01) != 0)
}
#[doc = "Bit 25 - Address Aligned Beats"]
#[inline(always)]
pub fn aal(&self) -> AAL_R {
AAL_R::new(((self.bits >> 25) & 0x01) != 0)
}
#[doc = "Bit 26 - Mixed Burst"]
#[inline(always)]
pub fn mb(&self) -> MB_R {
MB_R::new(((self.bits >> 26) & 0x01) != 0)
}
#[doc = "Bit 27 - Transmit Priority"]
#[inline(always)]
pub fn txpr(&self) -> TXPR_R {
TXPR_R::new(((self.bits >> 27) & 0x01) != 0)
}
#[doc = "Bit 31 - Rebuild Burst"]
#[inline(always)]
pub fn rib(&self) -> RIB_R {
RIB_R::new(((self.bits >> 31) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 0 - DMA Software Reset"]
#[inline(always)]
pub fn swr(&mut self) -> SWR_W {
SWR_W { w: self }
}
#[doc = "Bit 1 - DMA Arbitration Scheme"]
#[inline(always)]
pub fn da(&mut self) -> DA_W {
DA_W { w: self }
}
#[doc = "Bits 2:6 - Descriptor Skip Length"]
#[inline(always)]
pub fn dsl(&mut self) -> DSL_W {
DSL_W { w: self }
}
#[doc = "Bit 7 - Alternate Descriptor Size"]
#[inline(always)]
pub fn atds(&mut self) -> ATDS_W {
ATDS_W { w: self }
}
#[doc = "Bits 8:13 - Programmable Burst Length"]
#[inline(always)]
pub fn pbl(&mut self) -> PBL_W {
PBL_W { w: self }
}
#[doc = "Bits 14:15 - Priority Ratio"]
#[inline(always)]
pub fn pr(&mut self) -> PR_W {
PR_W { w: self }
}
#[doc = "Bit 16 - Fixed Burst"]
#[inline(always)]
pub fn fb(&mut self) -> FB_W {
FB_W { w: self }
}
#[doc = "Bits 17:22 - RX DMA Programmable Burst Length (PBL)"]
#[inline(always)]
pub fn rpbl(&mut self) -> RPBL_W {
RPBL_W { w: self }
}
#[doc = "Bit 23 - Use Separate Programmable Burst Length (PBL)"]
#[inline(always)]
pub fn usp(&mut self) -> USP_W {
USP_W { w: self }
}
#[doc = "Bit 24 - 8 x Programmable Burst Length (PBL) Mode"]
#[inline(always)]
pub fn _8xpbl(&mut self) -> _8XPBL_W {
_8XPBL_W { w: self }
}
#[doc = "Bit 25 - Address Aligned Beats"]
#[inline(always)]
pub fn aal(&mut self) -> AAL_W {
AAL_W { w: self }
}
#[doc = "Bit 26 - Mixed Burst"]
#[inline(always)]
pub fn mb(&mut self) -> MB_W {
MB_W { w: self }
}
#[doc = "Bit 27 - Transmit Priority"]
#[inline(always)]
pub fn txpr(&mut self) -> TXPR_W {
TXPR_W { w: self }
}
#[doc = "Bit 31 - Rebuild Burst"]
#[inline(always)]
pub fn rib(&mut self) -> RIB_W {
RIB_W { w: self }
}
}