#[doc = "Reader of register CTL"]
pub type R = crate::R<u32, super::CTL>;
#[doc = "Writer for register CTL"]
pub type W = crate::W<u32, super::CTL>;
#[doc = "Register CTL `reset()`'s with value 0"]
impl crate::ResetValue for super::CTL {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Reader of field `UARTEN`"]
pub type UARTEN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `UARTEN`"]
pub struct UARTEN_W<'a> {
w: &'a mut W,
}
impl<'a> UARTEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
#[doc = "Reader of field `SIREN`"]
pub type SIREN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `SIREN`"]
pub struct SIREN_W<'a> {
w: &'a mut W,
}
impl<'a> SIREN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "Reader of field `SIRLP`"]
pub type SIRLP_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `SIRLP`"]
pub struct SIRLP_W<'a> {
w: &'a mut W,
}
impl<'a> SIRLP_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "Reader of field `SMART`"]
pub type SMART_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `SMART`"]
pub struct SMART_W<'a> {
w: &'a mut W,
}
impl<'a> SMART_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
self.w
}
}
#[doc = "Reader of field `EOT`"]
pub type EOT_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `EOT`"]
pub struct EOT_W<'a> {
w: &'a mut W,
}
impl<'a> EOT_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
self.w
}
}
#[doc = "Reader of field `HSE`"]
pub type HSE_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `HSE`"]
pub struct HSE_W<'a> {
w: &'a mut W,
}
impl<'a> HSE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
self.w
}
}
#[doc = "Reader of field `LBE`"]
pub type LBE_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `LBE`"]
pub struct LBE_W<'a> {
w: &'a mut W,
}
impl<'a> LBE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
self.w
}
}
#[doc = "Reader of field `TXE`"]
pub type TXE_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `TXE`"]
pub struct TXE_W<'a> {
w: &'a mut W,
}
impl<'a> TXE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
self.w
}
}
#[doc = "Reader of field `RXE`"]
pub type RXE_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RXE`"]
pub struct RXE_W<'a> {
w: &'a mut W,
}
impl<'a> RXE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
self.w
}
}
#[doc = "Reader of field `DTR`"]
pub type DTR_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `DTR`"]
pub struct DTR_W<'a> {
w: &'a mut W,
}
impl<'a> DTR_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
self.w
}
}
#[doc = "Reader of field `RTS`"]
pub type RTS_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RTS`"]
pub struct RTS_W<'a> {
w: &'a mut W,
}
impl<'a> RTS_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
self.w
}
}
#[doc = "Reader of field `RTSEN`"]
pub type RTSEN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `RTSEN`"]
pub struct RTSEN_W<'a> {
w: &'a mut W,
}
impl<'a> RTSEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
self.w
}
}
#[doc = "Reader of field `CTSEN`"]
pub type CTSEN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `CTSEN`"]
pub struct CTSEN_W<'a> {
w: &'a mut W,
}
impl<'a> CTSEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
self.w
}
}
impl R {
#[doc = "Bit 0 - UART Enable"]
#[inline(always)]
pub fn uarten(&self) -> UARTEN_R {
UARTEN_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 1 - UART SIR Enable"]
#[inline(always)]
pub fn siren(&self) -> SIREN_R {
SIREN_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 2 - UART SIR Low-Power Mode"]
#[inline(always)]
pub fn sirlp(&self) -> SIRLP_R {
SIRLP_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 3 - ISO 7816 Smart Card Support"]
#[inline(always)]
pub fn smart(&self) -> SMART_R {
SMART_R::new(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 4 - End of Transmission"]
#[inline(always)]
pub fn eot(&self) -> EOT_R {
EOT_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 5 - High-Speed Enable"]
#[inline(always)]
pub fn hse(&self) -> HSE_R {
HSE_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 7 - UART Loop Back Enable"]
#[inline(always)]
pub fn lbe(&self) -> LBE_R {
LBE_R::new(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bit 8 - UART Transmit Enable"]
#[inline(always)]
pub fn txe(&self) -> TXE_R {
TXE_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 9 - UART Receive Enable"]
#[inline(always)]
pub fn rxe(&self) -> RXE_R {
RXE_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 10 - Data Terminal Ready"]
#[inline(always)]
pub fn dtr(&self) -> DTR_R {
DTR_R::new(((self.bits >> 10) & 0x01) != 0)
}
#[doc = "Bit 11 - Request to Send"]
#[inline(always)]
pub fn rts(&self) -> RTS_R {
RTS_R::new(((self.bits >> 11) & 0x01) != 0)
}
#[doc = "Bit 14 - Enable Request to Send"]
#[inline(always)]
pub fn rtsen(&self) -> RTSEN_R {
RTSEN_R::new(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 15 - Enable Clear To Send"]
#[inline(always)]
pub fn ctsen(&self) -> CTSEN_R {
CTSEN_R::new(((self.bits >> 15) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 0 - UART Enable"]
#[inline(always)]
pub fn uarten(&mut self) -> UARTEN_W {
UARTEN_W { w: self }
}
#[doc = "Bit 1 - UART SIR Enable"]
#[inline(always)]
pub fn siren(&mut self) -> SIREN_W {
SIREN_W { w: self }
}
#[doc = "Bit 2 - UART SIR Low-Power Mode"]
#[inline(always)]
pub fn sirlp(&mut self) -> SIRLP_W {
SIRLP_W { w: self }
}
#[doc = "Bit 3 - ISO 7816 Smart Card Support"]
#[inline(always)]
pub fn smart(&mut self) -> SMART_W {
SMART_W { w: self }
}
#[doc = "Bit 4 - End of Transmission"]
#[inline(always)]
pub fn eot(&mut self) -> EOT_W {
EOT_W { w: self }
}
#[doc = "Bit 5 - High-Speed Enable"]
#[inline(always)]
pub fn hse(&mut self) -> HSE_W {
HSE_W { w: self }
}
#[doc = "Bit 7 - UART Loop Back Enable"]
#[inline(always)]
pub fn lbe(&mut self) -> LBE_W {
LBE_W { w: self }
}
#[doc = "Bit 8 - UART Transmit Enable"]
#[inline(always)]
pub fn txe(&mut self) -> TXE_W {
TXE_W { w: self }
}
#[doc = "Bit 9 - UART Receive Enable"]
#[inline(always)]
pub fn rxe(&mut self) -> RXE_W {
RXE_W { w: self }
}
#[doc = "Bit 10 - Data Terminal Ready"]
#[inline(always)]
pub fn dtr(&mut self) -> DTR_W {
DTR_W { w: self }
}
#[doc = "Bit 11 - Request to Send"]
#[inline(always)]
pub fn rts(&mut self) -> RTS_W {
RTS_W { w: self }
}
#[doc = "Bit 14 - Enable Request to Send"]
#[inline(always)]
pub fn rtsen(&mut self) -> RTSEN_W {
RTSEN_W { w: self }
}
#[doc = "Bit 15 - Enable Clear To Send"]
#[inline(always)]
pub fn ctsen(&mut self) -> CTSEN_W {
CTSEN_W { w: self }
}
}