tm4c123x/usb0/
devctl.rs

1#[doc = "Reader of register DEVCTL"]
2pub type R = crate::R<u8, super::DEVCTL>;
3#[doc = "Writer for register DEVCTL"]
4pub type W = crate::W<u8, super::DEVCTL>;
5#[doc = "Register DEVCTL `reset()`'s with value 0"]
6impl crate::ResetValue for super::DEVCTL {
7    type Type = u8;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `SESSION`"]
14pub type SESSION_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `SESSION`"]
16pub struct SESSION_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> SESSION_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !0x01) | ((value as u8) & 0x01);
34        self.w
35    }
36}
37#[doc = "Reader of field `HOSTREQ`"]
38pub type HOSTREQ_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `HOSTREQ`"]
40pub struct HOSTREQ_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> HOSTREQ_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u8) & 0x01) << 1);
58        self.w
59    }
60}
61#[doc = "Reader of field `HOST`"]
62pub type HOST_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `HOST`"]
64pub struct HOST_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> HOST_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u8) & 0x01) << 2);
82        self.w
83    }
84}
85#[doc = "VBUS Level (OTG only)\n\nValue on reset: 0"]
86#[derive(Clone, Copy, Debug, PartialEq)]
87#[repr(u8)]
88pub enum VBUS_A {
89    #[doc = "0: Below SessionEnd"]
90    NONE = 0,
91    #[doc = "1: Above SessionEnd, below AValid"]
92    SEND = 1,
93    #[doc = "2: Above AValid, below VBUSValid"]
94    AVALID = 2,
95    #[doc = "3: Above VBUSValid"]
96    VALID = 3,
97}
98impl From<VBUS_A> for u8 {
99    #[inline(always)]
100    fn from(variant: VBUS_A) -> Self {
101        variant as _
102    }
103}
104#[doc = "Reader of field `VBUS`"]
105pub type VBUS_R = crate::R<u8, VBUS_A>;
106impl VBUS_R {
107    #[doc = r"Get enumerated values variant"]
108    #[inline(always)]
109    pub fn variant(&self) -> VBUS_A {
110        match self.bits {
111            0 => VBUS_A::NONE,
112            1 => VBUS_A::SEND,
113            2 => VBUS_A::AVALID,
114            3 => VBUS_A::VALID,
115            _ => unreachable!(),
116        }
117    }
118    #[doc = "Checks if the value of the field is `NONE`"]
119    #[inline(always)]
120    pub fn is_none(&self) -> bool {
121        *self == VBUS_A::NONE
122    }
123    #[doc = "Checks if the value of the field is `SEND`"]
124    #[inline(always)]
125    pub fn is_send(&self) -> bool {
126        *self == VBUS_A::SEND
127    }
128    #[doc = "Checks if the value of the field is `AVALID`"]
129    #[inline(always)]
130    pub fn is_avalid(&self) -> bool {
131        *self == VBUS_A::AVALID
132    }
133    #[doc = "Checks if the value of the field is `VALID`"]
134    #[inline(always)]
135    pub fn is_valid(&self) -> bool {
136        *self == VBUS_A::VALID
137    }
138}
139#[doc = "Write proxy for field `VBUS`"]
140pub struct VBUS_W<'a> {
141    w: &'a mut W,
142}
143impl<'a> VBUS_W<'a> {
144    #[doc = r"Writes `variant` to the field"]
145    #[inline(always)]
146    pub fn variant(self, variant: VBUS_A) -> &'a mut W {
147        {
148            self.bits(variant.into())
149        }
150    }
151    #[doc = "Below SessionEnd"]
152    #[inline(always)]
153    pub fn none(self) -> &'a mut W {
154        self.variant(VBUS_A::NONE)
155    }
156    #[doc = "Above SessionEnd, below AValid"]
157    #[inline(always)]
158    pub fn send(self) -> &'a mut W {
159        self.variant(VBUS_A::SEND)
160    }
161    #[doc = "Above AValid, below VBUSValid"]
162    #[inline(always)]
163    pub fn avalid(self) -> &'a mut W {
164        self.variant(VBUS_A::AVALID)
165    }
166    #[doc = "Above VBUSValid"]
167    #[inline(always)]
168    pub fn valid(self) -> &'a mut W {
169        self.variant(VBUS_A::VALID)
170    }
171    #[doc = r"Writes raw bits to the field"]
172    #[inline(always)]
173    pub fn bits(self, value: u8) -> &'a mut W {
174        self.w.bits = (self.w.bits & !(0x03 << 3)) | (((value as u8) & 0x03) << 3);
175        self.w
176    }
177}
178#[doc = "Reader of field `LSDEV`"]
179pub type LSDEV_R = crate::R<bool, bool>;
180#[doc = "Write proxy for field `LSDEV`"]
181pub struct LSDEV_W<'a> {
182    w: &'a mut W,
183}
184impl<'a> LSDEV_W<'a> {
185    #[doc = r"Sets the field bit"]
186    #[inline(always)]
187    pub fn set_bit(self) -> &'a mut W {
188        self.bit(true)
189    }
190    #[doc = r"Clears the field bit"]
191    #[inline(always)]
192    pub fn clear_bit(self) -> &'a mut W {
193        self.bit(false)
194    }
195    #[doc = r"Writes raw bits to the field"]
196    #[inline(always)]
197    pub fn bit(self, value: bool) -> &'a mut W {
198        self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u8) & 0x01) << 5);
199        self.w
200    }
201}
202#[doc = "Reader of field `FSDEV`"]
203pub type FSDEV_R = crate::R<bool, bool>;
204#[doc = "Write proxy for field `FSDEV`"]
205pub struct FSDEV_W<'a> {
206    w: &'a mut W,
207}
208impl<'a> FSDEV_W<'a> {
209    #[doc = r"Sets the field bit"]
210    #[inline(always)]
211    pub fn set_bit(self) -> &'a mut W {
212        self.bit(true)
213    }
214    #[doc = r"Clears the field bit"]
215    #[inline(always)]
216    pub fn clear_bit(self) -> &'a mut W {
217        self.bit(false)
218    }
219    #[doc = r"Writes raw bits to the field"]
220    #[inline(always)]
221    pub fn bit(self, value: bool) -> &'a mut W {
222        self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u8) & 0x01) << 6);
223        self.w
224    }
225}
226#[doc = "Reader of field `DEV`"]
227pub type DEV_R = crate::R<bool, bool>;
228#[doc = "Write proxy for field `DEV`"]
229pub struct DEV_W<'a> {
230    w: &'a mut W,
231}
232impl<'a> DEV_W<'a> {
233    #[doc = r"Sets the field bit"]
234    #[inline(always)]
235    pub fn set_bit(self) -> &'a mut W {
236        self.bit(true)
237    }
238    #[doc = r"Clears the field bit"]
239    #[inline(always)]
240    pub fn clear_bit(self) -> &'a mut W {
241        self.bit(false)
242    }
243    #[doc = r"Writes raw bits to the field"]
244    #[inline(always)]
245    pub fn bit(self, value: bool) -> &'a mut W {
246        self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u8) & 0x01) << 7);
247        self.w
248    }
249}
250impl R {
251    #[doc = "Bit 0 - Session Start/End (OTG only)"]
252    #[inline(always)]
253    pub fn session(&self) -> SESSION_R {
254        SESSION_R::new((self.bits & 0x01) != 0)
255    }
256    #[doc = "Bit 1 - Host Request (OTG only)"]
257    #[inline(always)]
258    pub fn hostreq(&self) -> HOSTREQ_R {
259        HOSTREQ_R::new(((self.bits >> 1) & 0x01) != 0)
260    }
261    #[doc = "Bit 2 - Host Mode"]
262    #[inline(always)]
263    pub fn host(&self) -> HOST_R {
264        HOST_R::new(((self.bits >> 2) & 0x01) != 0)
265    }
266    #[doc = "Bits 3:4 - VBUS Level (OTG only)"]
267    #[inline(always)]
268    pub fn vbus(&self) -> VBUS_R {
269        VBUS_R::new(((self.bits >> 3) & 0x03) as u8)
270    }
271    #[doc = "Bit 5 - Low-Speed Device Detected"]
272    #[inline(always)]
273    pub fn lsdev(&self) -> LSDEV_R {
274        LSDEV_R::new(((self.bits >> 5) & 0x01) != 0)
275    }
276    #[doc = "Bit 6 - Full-Speed Device Detected"]
277    #[inline(always)]
278    pub fn fsdev(&self) -> FSDEV_R {
279        FSDEV_R::new(((self.bits >> 6) & 0x01) != 0)
280    }
281    #[doc = "Bit 7 - Device Mode (OTG only)"]
282    #[inline(always)]
283    pub fn dev(&self) -> DEV_R {
284        DEV_R::new(((self.bits >> 7) & 0x01) != 0)
285    }
286}
287impl W {
288    #[doc = "Bit 0 - Session Start/End (OTG only)"]
289    #[inline(always)]
290    pub fn session(&mut self) -> SESSION_W {
291        SESSION_W { w: self }
292    }
293    #[doc = "Bit 1 - Host Request (OTG only)"]
294    #[inline(always)]
295    pub fn hostreq(&mut self) -> HOSTREQ_W {
296        HOSTREQ_W { w: self }
297    }
298    #[doc = "Bit 2 - Host Mode"]
299    #[inline(always)]
300    pub fn host(&mut self) -> HOST_W {
301        HOST_W { w: self }
302    }
303    #[doc = "Bits 3:4 - VBUS Level (OTG only)"]
304    #[inline(always)]
305    pub fn vbus(&mut self) -> VBUS_W {
306        VBUS_W { w: self }
307    }
308    #[doc = "Bit 5 - Low-Speed Device Detected"]
309    #[inline(always)]
310    pub fn lsdev(&mut self) -> LSDEV_W {
311        LSDEV_W { w: self }
312    }
313    #[doc = "Bit 6 - Full-Speed Device Detected"]
314    #[inline(always)]
315    pub fn fsdev(&mut self) -> FSDEV_W {
316        FSDEV_W { w: self }
317    }
318    #[doc = "Bit 7 - Device Mode (OTG only)"]
319    #[inline(always)]
320    pub fn dev(&mut self) -> DEV_W {
321        DEV_W { w: self }
322    }
323}
tm4c123x/usb0/devctl.rs

tm4c123x/usb0/
devctl.rs
