1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - USB Device Functional Address"]
5 pub faddr: FADDR,
6 #[doc = "0x01 - USB Power"]
7 pub power: POWER,
8 #[doc = "0x02 - USB Transmit Interrupt Status"]
9 pub txis: TXIS,
10 #[doc = "0x04 - USB Receive Interrupt Status"]
11 pub rxis: RXIS,
12 #[doc = "0x06 - USB Transmit Interrupt Enable"]
13 pub txie: TXIE,
14 #[doc = "0x08 - USB Receive Interrupt Enable"]
15 pub rxie: RXIE,
16 #[doc = "0x0a - USB General Interrupt Status"]
17 pub is: IS,
18 #[doc = "0x0b - USB Interrupt Enable"]
19 pub ie: IE,
20 #[doc = "0x0c - USB Frame Value"]
21 pub frame: FRAME,
22 #[doc = "0x0e - USB Endpoint Index"]
23 pub epidx: EPIDX,
24 #[doc = "0x0f - USB Test Mode"]
25 pub test: TEST,
26 _reserved11: [u8; 16usize],
27 #[doc = "0x20 - USB FIFO Endpoint 0"]
28 pub fifo0: FIFO0,
29 #[doc = "0x24 - USB FIFO Endpoint 1"]
30 pub fifo1: FIFO1,
31 #[doc = "0x28 - USB FIFO Endpoint 2"]
32 pub fifo2: FIFO2,
33 #[doc = "0x2c - USB FIFO Endpoint 3"]
34 pub fifo3: FIFO3,
35 #[doc = "0x30 - USB FIFO Endpoint 4"]
36 pub fifo4: FIFO4,
37 #[doc = "0x34 - USB FIFO Endpoint 5"]
38 pub fifo5: FIFO5,
39 #[doc = "0x38 - USB FIFO Endpoint 6"]
40 pub fifo6: FIFO6,
41 #[doc = "0x3c - USB FIFO Endpoint 7"]
42 pub fifo7: FIFO7,
43 _reserved19: [u8; 32usize],
44 #[doc = "0x60 - USB Device Control"]
45 pub devctl: DEVCTL,
46 _reserved20: [u8; 1usize],
47 #[doc = "0x62 - USB Transmit Dynamic FIFO Sizing"]
48 pub txfifosz: TXFIFOSZ,
49 #[doc = "0x63 - USB Receive Dynamic FIFO Sizing"]
50 pub rxfifosz: RXFIFOSZ,
51 #[doc = "0x64 - USB Transmit FIFO Start Address"]
52 pub txfifoadd: TXFIFOADD,
53 #[doc = "0x66 - USB Receive FIFO Start Address"]
54 pub rxfifoadd: RXFIFOADD,
55 _reserved24: [u8; 18usize],
56 #[doc = "0x7a - USB Connect Timing"]
57 pub contim: CONTIM,
58 #[doc = "0x7b - USB OTG VBUS Pulse Timing"]
59 pub vplen: VPLEN,
60 _reserved26: [u8; 1usize],
61 #[doc = "0x7d - USB Full-Speed Last Transaction to End of Frame Timing"]
62 pub fseof: FSEOF,
63 #[doc = "0x7e - USB Low-Speed Last Transaction to End of Frame Timing"]
64 pub lseof: LSEOF,
65 _reserved28: [u8; 1usize],
66 #[doc = "0x80 - USB Transmit Functional Address Endpoint 0"]
67 pub txfuncaddr0: TXFUNCADDR0,
68 _reserved29: [u8; 1usize],
69 #[doc = "0x82 - USB Transmit Hub Address Endpoint 0"]
70 pub txhubaddr0: TXHUBADDR0,
71 #[doc = "0x83 - USB Transmit Hub Port Endpoint 0"]
72 pub txhubport0: TXHUBPORT0,
73 _reserved31: [u8; 4usize],
74 #[doc = "0x88 - USB Transmit Functional Address Endpoint 1"]
75 pub txfuncaddr1: TXFUNCADDR1,
76 _reserved32: [u8; 1usize],
77 #[doc = "0x8a - USB Transmit Hub Address Endpoint 1"]
78 pub txhubaddr1: TXHUBADDR1,
79 #[doc = "0x8b - USB Transmit Hub Port Endpoint 1"]
80 pub txhubport1: TXHUBPORT1,
81 #[doc = "0x8c - USB Receive Functional Address Endpoint 1"]
82 pub rxfuncaddr1: RXFUNCADDR1,
83 _reserved35: [u8; 1usize],
84 #[doc = "0x8e - USB Receive Hub Address Endpoint 1"]
85 pub rxhubaddr1: RXHUBADDR1,
86 #[doc = "0x8f - USB Receive Hub Port Endpoint 1"]
87 pub rxhubport1: RXHUBPORT1,
88 #[doc = "0x90 - USB Transmit Functional Address Endpoint 2"]
89 pub txfuncaddr2: TXFUNCADDR2,
90 _reserved38: [u8; 1usize],
91 #[doc = "0x92 - USB Transmit Hub Address Endpoint 2"]
92 pub txhubaddr2: TXHUBADDR2,
93 #[doc = "0x93 - USB Transmit Hub Port Endpoint 2"]
94 pub txhubport2: TXHUBPORT2,
95 #[doc = "0x94 - USB Receive Functional Address Endpoint 2"]
96 pub rxfuncaddr2: RXFUNCADDR2,
97 _reserved41: [u8; 1usize],
98 #[doc = "0x96 - USB Receive Hub Address Endpoint 2"]
99 pub rxhubaddr2: RXHUBADDR2,
100 #[doc = "0x97 - USB Receive Hub Port Endpoint 2"]
101 pub rxhubport2: RXHUBPORT2,
102 #[doc = "0x98 - USB Transmit Functional Address Endpoint 3"]
103 pub txfuncaddr3: TXFUNCADDR3,
104 _reserved44: [u8; 1usize],
105 #[doc = "0x9a - USB Transmit Hub Address Endpoint 3"]
106 pub txhubaddr3: TXHUBADDR3,
107 #[doc = "0x9b - USB Transmit Hub Port Endpoint 3"]
108 pub txhubport3: TXHUBPORT3,
109 #[doc = "0x9c - USB Receive Functional Address Endpoint 3"]
110 pub rxfuncaddr3: RXFUNCADDR3,
111 _reserved47: [u8; 1usize],
112 #[doc = "0x9e - USB Receive Hub Address Endpoint 3"]
113 pub rxhubaddr3: RXHUBADDR3,
114 #[doc = "0x9f - USB Receive Hub Port Endpoint 3"]
115 pub rxhubport3: RXHUBPORT3,
116 #[doc = "0xa0 - USB Transmit Functional Address Endpoint 4"]
117 pub txfuncaddr4: TXFUNCADDR4,
118 _reserved50: [u8; 1usize],
119 #[doc = "0xa2 - USB Transmit Hub Address Endpoint 4"]
120 pub txhubaddr4: TXHUBADDR4,
121 #[doc = "0xa3 - USB Transmit Hub Port Endpoint 4"]
122 pub txhubport4: TXHUBPORT4,
123 #[doc = "0xa4 - USB Receive Functional Address Endpoint 4"]
124 pub rxfuncaddr4: RXFUNCADDR4,
125 _reserved53: [u8; 1usize],
126 #[doc = "0xa6 - USB Receive Hub Address Endpoint 4"]
127 pub rxhubaddr4: RXHUBADDR4,
128 #[doc = "0xa7 - USB Receive Hub Port Endpoint 4"]
129 pub rxhubport4: RXHUBPORT4,
130 #[doc = "0xa8 - USB Transmit Functional Address Endpoint 5"]
131 pub txfuncaddr5: TXFUNCADDR5,
132 _reserved56: [u8; 1usize],
133 #[doc = "0xaa - USB Transmit Hub Address Endpoint 5"]
134 pub txhubaddr5: TXHUBADDR5,
135 #[doc = "0xab - USB Transmit Hub Port Endpoint 5"]
136 pub txhubport5: TXHUBPORT5,
137 #[doc = "0xac - USB Receive Functional Address Endpoint 5"]
138 pub rxfuncaddr5: RXFUNCADDR5,
139 _reserved59: [u8; 1usize],
140 #[doc = "0xae - USB Receive Hub Address Endpoint 5"]
141 pub rxhubaddr5: RXHUBADDR5,
142 #[doc = "0xaf - USB Receive Hub Port Endpoint 5"]
143 pub rxhubport5: RXHUBPORT5,
144 #[doc = "0xb0 - USB Transmit Functional Address Endpoint 6"]
145 pub txfuncaddr6: TXFUNCADDR6,
146 _reserved62: [u8; 1usize],
147 #[doc = "0xb2 - USB Transmit Hub Address Endpoint 6"]
148 pub txhubaddr6: TXHUBADDR6,
149 #[doc = "0xb3 - USB Transmit Hub Port Endpoint 6"]
150 pub txhubport6: TXHUBPORT6,
151 #[doc = "0xb4 - USB Receive Functional Address Endpoint 6"]
152 pub rxfuncaddr6: RXFUNCADDR6,
153 _reserved65: [u8; 1usize],
154 #[doc = "0xb6 - USB Receive Hub Address Endpoint 6"]
155 pub rxhubaddr6: RXHUBADDR6,
156 #[doc = "0xb7 - USB Receive Hub Port Endpoint 6"]
157 pub rxhubport6: RXHUBPORT6,
158 #[doc = "0xb8 - USB Transmit Functional Address Endpoint 7"]
159 pub txfuncaddr7: TXFUNCADDR7,
160 _reserved68: [u8; 1usize],
161 #[doc = "0xba - USB Transmit Hub Address Endpoint 7"]
162 pub txhubaddr7: TXHUBADDR7,
163 #[doc = "0xbb - USB Transmit Hub Port Endpoint 7"]
164 pub txhubport7: TXHUBPORT7,
165 #[doc = "0xbc - USB Receive Functional Address Endpoint 7"]
166 pub rxfuncaddr7: RXFUNCADDR7,
167 _reserved71: [u8; 1usize],
168 #[doc = "0xbe - USB Receive Hub Address Endpoint 7"]
169 pub rxhubaddr7: RXHUBADDR7,
170 #[doc = "0xbf - USB Receive Hub Port Endpoint 7"]
171 pub rxhubport7: RXHUBPORT7,
172 _reserved73: [u8; 66usize],
173 #[doc = "0x102 - USB Control and Status Endpoint 0 Low"]
174 pub csrl0: CSRL0,
175 #[doc = "0x103 - USB Control and Status Endpoint 0 High"]
176 pub csrh0: CSRH0,
177 _reserved75: [u8; 4usize],
178 #[doc = "0x108 - USB Receive Byte Count Endpoint 0"]
179 pub count0: COUNT0,
180 _reserved76: [u8; 1usize],
181 #[doc = "0x10a - USB Type Endpoint 0"]
182 pub type0: TYPE0,
183 #[doc = "0x10b - USB NAK Limit"]
184 pub naklmt: NAKLMT,
185 _reserved78: [u8; 4usize],
186 #[doc = "0x110 - USB Maximum Transmit Data Endpoint 1"]
187 pub txmaxp1: TXMAXP1,
188 #[doc = "0x112 - USB Transmit Control and Status Endpoint 1 Low"]
189 pub txcsrl1: TXCSRL1,
190 #[doc = "0x113 - USB Transmit Control and Status Endpoint 1 High"]
191 pub txcsrh1: TXCSRH1,
192 #[doc = "0x114 - USB Maximum Receive Data Endpoint 1"]
193 pub rxmaxp1: RXMAXP1,
194 #[doc = "0x116 - USB Receive Control and Status Endpoint 1 Low"]
195 pub rxcsrl1: RXCSRL1,
196 #[doc = "0x117 - USB Receive Control and Status Endpoint 1 High"]
197 pub rxcsrh1: RXCSRH1,
198 #[doc = "0x118 - USB Receive Byte Count Endpoint 1"]
199 pub rxcount1: RXCOUNT1,
200 #[doc = "0x11a - USB Host Transmit Configure Type Endpoint 1"]
201 pub txtype1: TXTYPE1,
202 #[doc = "0x11b - USB Host Transmit Interval Endpoint 1"]
203 pub txinterval1: TXINTERVAL1,
204 #[doc = "0x11c - USB Host Configure Receive Type Endpoint 1"]
205 pub rxtype1: RXTYPE1,
206 #[doc = "0x11d - USB Host Receive Polling Interval Endpoint 1"]
207 pub rxinterval1: RXINTERVAL1,
208 _reserved89: [u8; 2usize],
209 #[doc = "0x120 - USB Maximum Transmit Data Endpoint 2"]
210 pub txmaxp2: TXMAXP2,
211 #[doc = "0x122 - USB Transmit Control and Status Endpoint 2 Low"]
212 pub txcsrl2: TXCSRL2,
213 #[doc = "0x123 - USB Transmit Control and Status Endpoint 2 High"]
214 pub txcsrh2: TXCSRH2,
215 #[doc = "0x124 - USB Maximum Receive Data Endpoint 2"]
216 pub rxmaxp2: RXMAXP2,
217 #[doc = "0x126 - USB Receive Control and Status Endpoint 2 Low"]
218 pub rxcsrl2: RXCSRL2,
219 #[doc = "0x127 - USB Receive Control and Status Endpoint 2 High"]
220 pub rxcsrh2: RXCSRH2,
221 #[doc = "0x128 - USB Receive Byte Count Endpoint 2"]
222 pub rxcount2: RXCOUNT2,
223 #[doc = "0x12a - USB Host Transmit Configure Type Endpoint 2"]
224 pub txtype2: TXTYPE2,
225 #[doc = "0x12b - USB Host Transmit Interval Endpoint 2"]
226 pub txinterval2: TXINTERVAL2,
227 #[doc = "0x12c - USB Host Configure Receive Type Endpoint 2"]
228 pub rxtype2: RXTYPE2,
229 #[doc = "0x12d - USB Host Receive Polling Interval Endpoint 2"]
230 pub rxinterval2: RXINTERVAL2,
231 _reserved100: [u8; 2usize],
232 #[doc = "0x130 - USB Maximum Transmit Data Endpoint 3"]
233 pub txmaxp3: TXMAXP3,
234 #[doc = "0x132 - USB Transmit Control and Status Endpoint 3 Low"]
235 pub txcsrl3: TXCSRL3,
236 #[doc = "0x133 - USB Transmit Control and Status Endpoint 3 High"]
237 pub txcsrh3: TXCSRH3,
238 #[doc = "0x134 - USB Maximum Receive Data Endpoint 3"]
239 pub rxmaxp3: RXMAXP3,
240 #[doc = "0x136 - USB Receive Control and Status Endpoint 3 Low"]
241 pub rxcsrl3: RXCSRL3,
242 #[doc = "0x137 - USB Receive Control and Status Endpoint 3 High"]
243 pub rxcsrh3: RXCSRH3,
244 #[doc = "0x138 - USB Receive Byte Count Endpoint 3"]
245 pub rxcount3: RXCOUNT3,
246 #[doc = "0x13a - USB Host Transmit Configure Type Endpoint 3"]
247 pub txtype3: TXTYPE3,
248 #[doc = "0x13b - USB Host Transmit Interval Endpoint 3"]
249 pub txinterval3: TXINTERVAL3,
250 #[doc = "0x13c - USB Host Configure Receive Type Endpoint 3"]
251 pub rxtype3: RXTYPE3,
252 #[doc = "0x13d - USB Host Receive Polling Interval Endpoint 3"]
253 pub rxinterval3: RXINTERVAL3,
254 _reserved111: [u8; 2usize],
255 #[doc = "0x140 - USB Maximum Transmit Data Endpoint 4"]
256 pub txmaxp4: TXMAXP4,
257 #[doc = "0x142 - USB Transmit Control and Status Endpoint 4 Low"]
258 pub txcsrl4: TXCSRL4,
259 #[doc = "0x143 - USB Transmit Control and Status Endpoint 4 High"]
260 pub txcsrh4: TXCSRH4,
261 #[doc = "0x144 - USB Maximum Receive Data Endpoint 4"]
262 pub rxmaxp4: RXMAXP4,
263 #[doc = "0x146 - USB Receive Control and Status Endpoint 4 Low"]
264 pub rxcsrl4: RXCSRL4,
265 #[doc = "0x147 - USB Receive Control and Status Endpoint 4 High"]
266 pub rxcsrh4: RXCSRH4,
267 #[doc = "0x148 - USB Receive Byte Count Endpoint 4"]
268 pub rxcount4: RXCOUNT4,
269 #[doc = "0x14a - USB Host Transmit Configure Type Endpoint 4"]
270 pub txtype4: TXTYPE4,
271 #[doc = "0x14b - USB Host Transmit Interval Endpoint 4"]
272 pub txinterval4: TXINTERVAL4,
273 #[doc = "0x14c - USB Host Configure Receive Type Endpoint 4"]
274 pub rxtype4: RXTYPE4,
275 #[doc = "0x14d - USB Host Receive Polling Interval Endpoint 4"]
276 pub rxinterval4: RXINTERVAL4,
277 _reserved122: [u8; 2usize],
278 #[doc = "0x150 - USB Maximum Transmit Data Endpoint 5"]
279 pub txmaxp5: TXMAXP5,
280 #[doc = "0x152 - USB Transmit Control and Status Endpoint 5 Low"]
281 pub txcsrl5: TXCSRL5,
282 #[doc = "0x153 - USB Transmit Control and Status Endpoint 5 High"]
283 pub txcsrh5: TXCSRH5,
284 #[doc = "0x154 - USB Maximum Receive Data Endpoint 5"]
285 pub rxmaxp5: RXMAXP5,
286 #[doc = "0x156 - USB Receive Control and Status Endpoint 5 Low"]
287 pub rxcsrl5: RXCSRL5,
288 #[doc = "0x157 - USB Receive Control and Status Endpoint 5 High"]
289 pub rxcsrh5: RXCSRH5,
290 #[doc = "0x158 - USB Receive Byte Count Endpoint 5"]
291 pub rxcount5: RXCOUNT5,
292 #[doc = "0x15a - USB Host Transmit Configure Type Endpoint 5"]
293 pub txtype5: TXTYPE5,
294 #[doc = "0x15b - USB Host Transmit Interval Endpoint 5"]
295 pub txinterval5: TXINTERVAL5,
296 #[doc = "0x15c - USB Host Configure Receive Type Endpoint 5"]
297 pub rxtype5: RXTYPE5,
298 #[doc = "0x15d - USB Host Receive Polling Interval Endpoint 5"]
299 pub rxinterval5: RXINTERVAL5,
300 _reserved133: [u8; 2usize],
301 #[doc = "0x160 - USB Maximum Transmit Data Endpoint 6"]
302 pub txmaxp6: TXMAXP6,
303 #[doc = "0x162 - USB Transmit Control and Status Endpoint 6 Low"]
304 pub txcsrl6: TXCSRL6,
305 #[doc = "0x163 - USB Transmit Control and Status Endpoint 6 High"]
306 pub txcsrh6: TXCSRH6,
307 #[doc = "0x164 - USB Maximum Receive Data Endpoint 6"]
308 pub rxmaxp6: RXMAXP6,
309 #[doc = "0x166 - USB Receive Control and Status Endpoint 6 Low"]
310 pub rxcsrl6: RXCSRL6,
311 #[doc = "0x167 - USB Receive Control and Status Endpoint 6 High"]
312 pub rxcsrh6: RXCSRH6,
313 #[doc = "0x168 - USB Receive Byte Count Endpoint 6"]
314 pub rxcount6: RXCOUNT6,
315 #[doc = "0x16a - USB Host Transmit Configure Type Endpoint 6"]
316 pub txtype6: TXTYPE6,
317 #[doc = "0x16b - USB Host Transmit Interval Endpoint 6"]
318 pub txinterval6: TXINTERVAL6,
319 #[doc = "0x16c - USB Host Configure Receive Type Endpoint 6"]
320 pub rxtype6: RXTYPE6,
321 #[doc = "0x16d - USB Host Receive Polling Interval Endpoint 6"]
322 pub rxinterval6: RXINTERVAL6,
323 _reserved144: [u8; 2usize],
324 #[doc = "0x170 - USB Maximum Transmit Data Endpoint 7"]
325 pub txmaxp7: TXMAXP7,
326 #[doc = "0x172 - USB Transmit Control and Status Endpoint 7 Low"]
327 pub txcsrl7: TXCSRL7,
328 #[doc = "0x173 - USB Transmit Control and Status Endpoint 7 High"]
329 pub txcsrh7: TXCSRH7,
330 #[doc = "0x174 - USB Maximum Receive Data Endpoint 7"]
331 pub rxmaxp7: RXMAXP7,
332 #[doc = "0x176 - USB Receive Control and Status Endpoint 7 Low"]
333 pub rxcsrl7: RXCSRL7,
334 #[doc = "0x177 - USB Receive Control and Status Endpoint 7 High"]
335 pub rxcsrh7: RXCSRH7,
336 #[doc = "0x178 - USB Receive Byte Count Endpoint 7"]
337 pub rxcount7: RXCOUNT7,
338 #[doc = "0x17a - USB Host Transmit Configure Type Endpoint 7"]
339 pub txtype7: TXTYPE7,
340 #[doc = "0x17b - USB Host Transmit Interval Endpoint 7"]
341 pub txinterval7: TXINTERVAL7,
342 #[doc = "0x17c - USB Host Configure Receive Type Endpoint 7"]
343 pub rxtype7: RXTYPE7,
344 #[doc = "0x17d - USB Host Receive Polling Interval Endpoint 7"]
345 pub rxinterval7: RXINTERVAL7,
346 _reserved155: [u8; 390usize],
347 #[doc = "0x304 - USB Request Packet Count in Block Transfer Endpoint 1"]
348 pub rqpktcount1: RQPKTCOUNT1,
349 _reserved156: [u8; 2usize],
350 #[doc = "0x308 - USB Request Packet Count in Block Transfer Endpoint 2"]
351 pub rqpktcount2: RQPKTCOUNT2,
352 _reserved157: [u8; 2usize],
353 #[doc = "0x30c - USB Request Packet Count in Block Transfer Endpoint 3"]
354 pub rqpktcount3: RQPKTCOUNT3,
355 _reserved158: [u8; 2usize],
356 #[doc = "0x310 - USB Request Packet Count in Block Transfer Endpoint 4"]
357 pub rqpktcount4: RQPKTCOUNT4,
358 _reserved159: [u8; 2usize],
359 #[doc = "0x314 - USB Request Packet Count in Block Transfer Endpoint 5"]
360 pub rqpktcount5: RQPKTCOUNT5,
361 _reserved160: [u8; 2usize],
362 #[doc = "0x318 - USB Request Packet Count in Block Transfer Endpoint 6"]
363 pub rqpktcount6: RQPKTCOUNT6,
364 _reserved161: [u8; 2usize],
365 #[doc = "0x31c - USB Request Packet Count in Block Transfer Endpoint 7"]
366 pub rqpktcount7: RQPKTCOUNT7,
367 _reserved162: [u8; 34usize],
368 #[doc = "0x340 - USB Receive Double Packet Buffer Disable"]
369 pub rxdpktbufdis: RXDPKTBUFDIS,
370 #[doc = "0x342 - USB Transmit Double Packet Buffer Disable"]
371 pub txdpktbufdis: TXDPKTBUFDIS,
372 _reserved164: [u8; 188usize],
373 #[doc = "0x400 - USB External Power Control"]
374 pub epc: EPC,
375 #[doc = "0x404 - USB External Power Control Raw Interrupt Status"]
376 pub epcris: EPCRIS,
377 #[doc = "0x408 - USB External Power Control Interrupt Mask"]
378 pub epcim: EPCIM,
379 #[doc = "0x40c - USB External Power Control Interrupt Status and Clear"]
380 pub epcisc: EPCISC,
381 #[doc = "0x410 - USB Device RESUME Raw Interrupt Status"]
382 pub drris: DRRIS,
383 #[doc = "0x414 - USB Device RESUME Interrupt Mask"]
384 pub drim: DRIM,
385 #[doc = "0x418 - USB Device RESUME Interrupt Status and Clear"]
386 pub drisc: DRISC,
387 #[doc = "0x41c - USB General-Purpose Control and Status"]
388 pub gpcs: GPCS,
389 _reserved172: [u8; 16usize],
390 #[doc = "0x430 - USB VBUS Droop Control"]
391 pub vdc: VDC,
392 #[doc = "0x434 - USB VBUS Droop Control Raw Interrupt Status"]
393 pub vdcris: VDCRIS,
394 #[doc = "0x438 - USB VBUS Droop Control Interrupt Mask"]
395 pub vdcim: VDCIM,
396 #[doc = "0x43c - USB VBUS Droop Control Interrupt Status and Clear"]
397 pub vdcisc: VDCISC,
398 _reserved176: [u8; 4usize],
399 #[doc = "0x444 - USB ID Valid Detect Raw Interrupt Status"]
400 pub idvris: IDVRIS,
401 #[doc = "0x448 - USB ID Valid Detect Interrupt Mask"]
402 pub idvim: IDVIM,
403 #[doc = "0x44c - USB ID Valid Detect Interrupt Status and Clear"]
404 pub idvisc: IDVISC,
405 #[doc = "0x450 - USB DMA Select"]
406 pub dmasel: DMASEL,
407 _reserved180: [u8; 2924usize],
408 #[doc = "0xfc0 - USB Peripheral Properties"]
409 pub pp: PP,
410}
411#[doc = "USB Device Functional Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [faddr](faddr) module"]
412pub type FADDR = crate::Reg<u8, _FADDR>;
413#[allow(missing_docs)]
414#[doc(hidden)]
415pub struct _FADDR;
416#[doc = "`read()` method returns [faddr::R](faddr::R) reader structure"]
417impl crate::Readable for FADDR {}
418#[doc = "`write(|w| ..)` method takes [faddr::W](faddr::W) writer structure"]
419impl crate::Writable for FADDR {}
420#[doc = "USB Device Functional Address"]
421pub mod faddr;
422#[doc = "USB Power\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [power](power) module"]
423pub type POWER = crate::Reg<u8, _POWER>;
424#[allow(missing_docs)]
425#[doc(hidden)]
426pub struct _POWER;
427#[doc = "`read()` method returns [power::R](power::R) reader structure"]
428impl crate::Readable for POWER {}
429#[doc = "`write(|w| ..)` method takes [power::W](power::W) writer structure"]
430impl crate::Writable for POWER {}
431#[doc = "USB Power"]
432pub mod power;
433#[doc = "USB Transmit Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txis](txis) module"]
434pub type TXIS = crate::Reg<u16, _TXIS>;
435#[allow(missing_docs)]
436#[doc(hidden)]
437pub struct _TXIS;
438#[doc = "`read()` method returns [txis::R](txis::R) reader structure"]
439impl crate::Readable for TXIS {}
440#[doc = "USB Transmit Interrupt Status"]
441pub mod txis;
442#[doc = "USB Receive Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxis](rxis) module"]
443pub type RXIS = crate::Reg<u16, _RXIS>;
444#[allow(missing_docs)]
445#[doc(hidden)]
446pub struct _RXIS;
447#[doc = "`read()` method returns [rxis::R](rxis::R) reader structure"]
448impl crate::Readable for RXIS {}
449#[doc = "USB Receive Interrupt Status"]
450pub mod rxis;
451#[doc = "USB Transmit Interrupt Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txie](txie) module"]
452pub type TXIE = crate::Reg<u16, _TXIE>;
453#[allow(missing_docs)]
454#[doc(hidden)]
455pub struct _TXIE;
456#[doc = "`read()` method returns [txie::R](txie::R) reader structure"]
457impl crate::Readable for TXIE {}
458#[doc = "`write(|w| ..)` method takes [txie::W](txie::W) writer structure"]
459impl crate::Writable for TXIE {}
460#[doc = "USB Transmit Interrupt Enable"]
461pub mod txie;
462#[doc = "USB Receive Interrupt Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxie](rxie) module"]
463pub type RXIE = crate::Reg<u16, _RXIE>;
464#[allow(missing_docs)]
465#[doc(hidden)]
466pub struct _RXIE;
467#[doc = "`read()` method returns [rxie::R](rxie::R) reader structure"]
468impl crate::Readable for RXIE {}
469#[doc = "`write(|w| ..)` method takes [rxie::W](rxie::W) writer structure"]
470impl crate::Writable for RXIE {}
471#[doc = "USB Receive Interrupt Enable"]
472pub mod rxie;
473#[doc = "USB General Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [is](is) module"]
474pub type IS = crate::Reg<u8, _IS>;
475#[allow(missing_docs)]
476#[doc(hidden)]
477pub struct _IS;
478#[doc = "`read()` method returns [is::R](is::R) reader structure"]
479impl crate::Readable for IS {}
480#[doc = "USB General Interrupt Status"]
481pub mod is;
482#[doc = "USB Interrupt Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ie](ie) module"]
483pub type IE = crate::Reg<u8, _IE>;
484#[allow(missing_docs)]
485#[doc(hidden)]
486pub struct _IE;
487#[doc = "`read()` method returns [ie::R](ie::R) reader structure"]
488impl crate::Readable for IE {}
489#[doc = "`write(|w| ..)` method takes [ie::W](ie::W) writer structure"]
490impl crate::Writable for IE {}
491#[doc = "USB Interrupt Enable"]
492pub mod ie;
493#[doc = "USB Frame Value\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [frame](frame) module"]
494pub type FRAME = crate::Reg<u16, _FRAME>;
495#[allow(missing_docs)]
496#[doc(hidden)]
497pub struct _FRAME;
498#[doc = "`read()` method returns [frame::R](frame::R) reader structure"]
499impl crate::Readable for FRAME {}
500#[doc = "USB Frame Value"]
501pub mod frame;
502#[doc = "USB Endpoint Index\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [epidx](epidx) module"]
503pub type EPIDX = crate::Reg<u8, _EPIDX>;
504#[allow(missing_docs)]
505#[doc(hidden)]
506pub struct _EPIDX;
507#[doc = "`read()` method returns [epidx::R](epidx::R) reader structure"]
508impl crate::Readable for EPIDX {}
509#[doc = "`write(|w| ..)` method takes [epidx::W](epidx::W) writer structure"]
510impl crate::Writable for EPIDX {}
511#[doc = "USB Endpoint Index"]
512pub mod epidx;
513#[doc = "USB Test Mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [test](test) module"]
514pub type TEST = crate::Reg<u8, _TEST>;
515#[allow(missing_docs)]
516#[doc(hidden)]
517pub struct _TEST;
518#[doc = "`read()` method returns [test::R](test::R) reader structure"]
519impl crate::Readable for TEST {}
520#[doc = "`write(|w| ..)` method takes [test::W](test::W) writer structure"]
521impl crate::Writable for TEST {}
522#[doc = "USB Test Mode"]
523pub mod test;
524#[doc = "USB FIFO Endpoint 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo0](fifo0) module"]
525pub type FIFO0 = crate::Reg<u32, _FIFO0>;
526#[allow(missing_docs)]
527#[doc(hidden)]
528pub struct _FIFO0;
529#[doc = "`read()` method returns [fifo0::R](fifo0::R) reader structure"]
530impl crate::Readable for FIFO0 {}
531#[doc = "`write(|w| ..)` method takes [fifo0::W](fifo0::W) writer structure"]
532impl crate::Writable for FIFO0 {}
533#[doc = "USB FIFO Endpoint 0"]
534pub mod fifo0;
535#[doc = "USB FIFO Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo1](fifo1) module"]
536pub type FIFO1 = crate::Reg<u32, _FIFO1>;
537#[allow(missing_docs)]
538#[doc(hidden)]
539pub struct _FIFO1;
540#[doc = "`read()` method returns [fifo1::R](fifo1::R) reader structure"]
541impl crate::Readable for FIFO1 {}
542#[doc = "`write(|w| ..)` method takes [fifo1::W](fifo1::W) writer structure"]
543impl crate::Writable for FIFO1 {}
544#[doc = "USB FIFO Endpoint 1"]
545pub mod fifo1;
546#[doc = "USB FIFO Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo2](fifo2) module"]
547pub type FIFO2 = crate::Reg<u32, _FIFO2>;
548#[allow(missing_docs)]
549#[doc(hidden)]
550pub struct _FIFO2;
551#[doc = "`read()` method returns [fifo2::R](fifo2::R) reader structure"]
552impl crate::Readable for FIFO2 {}
553#[doc = "`write(|w| ..)` method takes [fifo2::W](fifo2::W) writer structure"]
554impl crate::Writable for FIFO2 {}
555#[doc = "USB FIFO Endpoint 2"]
556pub mod fifo2;
557#[doc = "USB FIFO Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo3](fifo3) module"]
558pub type FIFO3 = crate::Reg<u32, _FIFO3>;
559#[allow(missing_docs)]
560#[doc(hidden)]
561pub struct _FIFO3;
562#[doc = "`read()` method returns [fifo3::R](fifo3::R) reader structure"]
563impl crate::Readable for FIFO3 {}
564#[doc = "`write(|w| ..)` method takes [fifo3::W](fifo3::W) writer structure"]
565impl crate::Writable for FIFO3 {}
566#[doc = "USB FIFO Endpoint 3"]
567pub mod fifo3;
568#[doc = "USB FIFO Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo4](fifo4) module"]
569pub type FIFO4 = crate::Reg<u32, _FIFO4>;
570#[allow(missing_docs)]
571#[doc(hidden)]
572pub struct _FIFO4;
573#[doc = "`read()` method returns [fifo4::R](fifo4::R) reader structure"]
574impl crate::Readable for FIFO4 {}
575#[doc = "`write(|w| ..)` method takes [fifo4::W](fifo4::W) writer structure"]
576impl crate::Writable for FIFO4 {}
577#[doc = "USB FIFO Endpoint 4"]
578pub mod fifo4;
579#[doc = "USB FIFO Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo5](fifo5) module"]
580pub type FIFO5 = crate::Reg<u32, _FIFO5>;
581#[allow(missing_docs)]
582#[doc(hidden)]
583pub struct _FIFO5;
584#[doc = "`read()` method returns [fifo5::R](fifo5::R) reader structure"]
585impl crate::Readable for FIFO5 {}
586#[doc = "`write(|w| ..)` method takes [fifo5::W](fifo5::W) writer structure"]
587impl crate::Writable for FIFO5 {}
588#[doc = "USB FIFO Endpoint 5"]
589pub mod fifo5;
590#[doc = "USB FIFO Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo6](fifo6) module"]
591pub type FIFO6 = crate::Reg<u32, _FIFO6>;
592#[allow(missing_docs)]
593#[doc(hidden)]
594pub struct _FIFO6;
595#[doc = "`read()` method returns [fifo6::R](fifo6::R) reader structure"]
596impl crate::Readable for FIFO6 {}
597#[doc = "`write(|w| ..)` method takes [fifo6::W](fifo6::W) writer structure"]
598impl crate::Writable for FIFO6 {}
599#[doc = "USB FIFO Endpoint 6"]
600pub mod fifo6;
601#[doc = "USB FIFO Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo7](fifo7) module"]
602pub type FIFO7 = crate::Reg<u32, _FIFO7>;
603#[allow(missing_docs)]
604#[doc(hidden)]
605pub struct _FIFO7;
606#[doc = "`read()` method returns [fifo7::R](fifo7::R) reader structure"]
607impl crate::Readable for FIFO7 {}
608#[doc = "`write(|w| ..)` method takes [fifo7::W](fifo7::W) writer structure"]
609impl crate::Writable for FIFO7 {}
610#[doc = "USB FIFO Endpoint 7"]
611pub mod fifo7;
612#[doc = "USB Device Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [devctl](devctl) module"]
613pub type DEVCTL = crate::Reg<u8, _DEVCTL>;
614#[allow(missing_docs)]
615#[doc(hidden)]
616pub struct _DEVCTL;
617#[doc = "`read()` method returns [devctl::R](devctl::R) reader structure"]
618impl crate::Readable for DEVCTL {}
619#[doc = "`write(|w| ..)` method takes [devctl::W](devctl::W) writer structure"]
620impl crate::Writable for DEVCTL {}
621#[doc = "USB Device Control"]
622pub mod devctl;
623#[doc = "USB Transmit Dynamic FIFO Sizing\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txfifosz](txfifosz) module"]
624pub type TXFIFOSZ = crate::Reg<u8, _TXFIFOSZ>;
625#[allow(missing_docs)]
626#[doc(hidden)]
627pub struct _TXFIFOSZ;
628#[doc = "`read()` method returns [txfifosz::R](txfifosz::R) reader structure"]
629impl crate::Readable for TXFIFOSZ {}
630#[doc = "`write(|w| ..)` method takes [txfifosz::W](txfifosz::W) writer structure"]
631impl crate::Writable for TXFIFOSZ {}
632#[doc = "USB Transmit Dynamic FIFO Sizing"]
633pub mod txfifosz;
634#[doc = "USB Receive Dynamic FIFO Sizing\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfifosz](rxfifosz) module"]
635pub type RXFIFOSZ = crate::Reg<u8, _RXFIFOSZ>;
636#[allow(missing_docs)]
637#[doc(hidden)]
638pub struct _RXFIFOSZ;
639#[doc = "`read()` method returns [rxfifosz::R](rxfifosz::R) reader structure"]
640impl crate::Readable for RXFIFOSZ {}
641#[doc = "`write(|w| ..)` method takes [rxfifosz::W](rxfifosz::W) writer structure"]
642impl crate::Writable for RXFIFOSZ {}
643#[doc = "USB Receive Dynamic FIFO Sizing"]
644pub mod rxfifosz;
645#[doc = "USB Transmit FIFO Start Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txfifoadd](txfifoadd) module"]
646pub type TXFIFOADD = crate::Reg<u16, _TXFIFOADD>;
647#[allow(missing_docs)]
648#[doc(hidden)]
649pub struct _TXFIFOADD;
650#[doc = "`read()` method returns [txfifoadd::R](txfifoadd::R) reader structure"]
651impl crate::Readable for TXFIFOADD {}
652#[doc = "`write(|w| ..)` method takes [txfifoadd::W](txfifoadd::W) writer structure"]
653impl crate::Writable for TXFIFOADD {}
654#[doc = "USB Transmit FIFO Start Address"]
655pub mod txfifoadd;
656#[doc = "USB Receive FIFO Start Address\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfifoadd](rxfifoadd) module"]
657pub type RXFIFOADD = crate::Reg<u16, _RXFIFOADD>;
658#[allow(missing_docs)]
659#[doc(hidden)]
660pub struct _RXFIFOADD;
661#[doc = "`read()` method returns [rxfifoadd::R](rxfifoadd::R) reader structure"]
662impl crate::Readable for RXFIFOADD {}
663#[doc = "`write(|w| ..)` method takes [rxfifoadd::W](rxfifoadd::W) writer structure"]
664impl crate::Writable for RXFIFOADD {}
665#[doc = "USB Receive FIFO Start Address"]
666pub mod rxfifoadd;
667#[doc = "USB Connect Timing\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [contim](contim) module"]
668pub type CONTIM = crate::Reg<u8, _CONTIM>;
669#[allow(missing_docs)]
670#[doc(hidden)]
671pub struct _CONTIM;
672#[doc = "`read()` method returns [contim::R](contim::R) reader structure"]
673impl crate::Readable for CONTIM {}
674#[doc = "`write(|w| ..)` method takes [contim::W](contim::W) writer structure"]
675impl crate::Writable for CONTIM {}
676#[doc = "USB Connect Timing"]
677pub mod contim;
678#[doc = "USB OTG VBUS Pulse Timing\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vplen](vplen) module"]
679pub type VPLEN = crate::Reg<u8, _VPLEN>;
680#[allow(missing_docs)]
681#[doc(hidden)]
682pub struct _VPLEN;
683#[doc = "`read()` method returns [vplen::R](vplen::R) reader structure"]
684impl crate::Readable for VPLEN {}
685#[doc = "`write(|w| ..)` method takes [vplen::W](vplen::W) writer structure"]
686impl crate::Writable for VPLEN {}
687#[doc = "USB OTG VBUS Pulse Timing"]
688pub mod vplen;
689#[doc = "USB Full-Speed Last Transaction to End of Frame Timing\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fseof](fseof) module"]
690pub type FSEOF = crate::Reg<u8, _FSEOF>;
691#[allow(missing_docs)]
692#[doc(hidden)]
693pub struct _FSEOF;
694#[doc = "`read()` method returns [fseof::R](fseof::R) reader structure"]
695impl crate::Readable for FSEOF {}
696#[doc = "`write(|w| ..)` method takes [fseof::W](fseof::W) writer structure"]
697impl crate::Writable for FSEOF {}
698#[doc = "USB Full-Speed Last Transaction to End of Frame Timing"]
699pub mod fseof;
700#[doc = "USB Low-Speed Last Transaction to End of Frame Timing\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lseof](lseof) module"]
701pub type LSEOF = crate::Reg<u8, _LSEOF>;
702#[allow(missing_docs)]
703#[doc(hidden)]
704pub struct _LSEOF;
705#[doc = "`read()` method returns [lseof::R](lseof::R) reader structure"]
706impl crate::Readable for LSEOF {}
707#[doc = "`write(|w| ..)` method takes [lseof::W](lseof::W) writer structure"]
708impl crate::Writable for LSEOF {}
709#[doc = "USB Low-Speed Last Transaction to End of Frame Timing"]
710pub mod lseof;
711#[doc = "USB Transmit Functional Address Endpoint 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txfuncaddr0](txfuncaddr0) module"]
712pub type TXFUNCADDR0 = crate::Reg<u8, _TXFUNCADDR0>;
713#[allow(missing_docs)]
714#[doc(hidden)]
715pub struct _TXFUNCADDR0;
716#[doc = "`read()` method returns [txfuncaddr0::R](txfuncaddr0::R) reader structure"]
717impl crate::Readable for TXFUNCADDR0 {}
718#[doc = "`write(|w| ..)` method takes [txfuncaddr0::W](txfuncaddr0::W) writer structure"]
719impl crate::Writable for TXFUNCADDR0 {}
720#[doc = "USB Transmit Functional Address Endpoint 0"]
721pub mod txfuncaddr0;
722#[doc = "USB Transmit Hub Address Endpoint 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubaddr0](txhubaddr0) module"]
723pub type TXHUBADDR0 = crate::Reg<u8, _TXHUBADDR0>;
724#[allow(missing_docs)]
725#[doc(hidden)]
726pub struct _TXHUBADDR0;
727#[doc = "`read()` method returns [txhubaddr0::R](txhubaddr0::R) reader structure"]
728impl crate::Readable for TXHUBADDR0 {}
729#[doc = "`write(|w| ..)` method takes [txhubaddr0::W](txhubaddr0::W) writer structure"]
730impl crate::Writable for TXHUBADDR0 {}
731#[doc = "USB Transmit Hub Address Endpoint 0"]
732pub mod txhubaddr0;
733#[doc = "USB Transmit Hub Port Endpoint 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubport0](txhubport0) module"]
734pub type TXHUBPORT0 = crate::Reg<u8, _TXHUBPORT0>;
735#[allow(missing_docs)]
736#[doc(hidden)]
737pub struct _TXHUBPORT0;
738#[doc = "`read()` method returns [txhubport0::R](txhubport0::R) reader structure"]
739impl crate::Readable for TXHUBPORT0 {}
740#[doc = "`write(|w| ..)` method takes [txhubport0::W](txhubport0::W) writer structure"]
741impl crate::Writable for TXHUBPORT0 {}
742#[doc = "USB Transmit Hub Port Endpoint 0"]
743pub mod txhubport0;
744#[doc = "USB Transmit Functional Address Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txfuncaddr1](txfuncaddr1) module"]
745pub type TXFUNCADDR1 = crate::Reg<u8, _TXFUNCADDR1>;
746#[allow(missing_docs)]
747#[doc(hidden)]
748pub struct _TXFUNCADDR1;
749#[doc = "`read()` method returns [txfuncaddr1::R](txfuncaddr1::R) reader structure"]
750impl crate::Readable for TXFUNCADDR1 {}
751#[doc = "`write(|w| ..)` method takes [txfuncaddr1::W](txfuncaddr1::W) writer structure"]
752impl crate::Writable for TXFUNCADDR1 {}
753#[doc = "USB Transmit Functional Address Endpoint 1"]
754pub mod txfuncaddr1;
755#[doc = "USB Transmit Hub Address Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubaddr1](txhubaddr1) module"]
756pub type TXHUBADDR1 = crate::Reg<u8, _TXHUBADDR1>;
757#[allow(missing_docs)]
758#[doc(hidden)]
759pub struct _TXHUBADDR1;
760#[doc = "`read()` method returns [txhubaddr1::R](txhubaddr1::R) reader structure"]
761impl crate::Readable for TXHUBADDR1 {}
762#[doc = "`write(|w| ..)` method takes [txhubaddr1::W](txhubaddr1::W) writer structure"]
763impl crate::Writable for TXHUBADDR1 {}
764#[doc = "USB Transmit Hub Address Endpoint 1"]
765pub mod txhubaddr1;
766#[doc = "USB Transmit Hub Port Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubport1](txhubport1) module"]
767pub type TXHUBPORT1 = crate::Reg<u8, _TXHUBPORT1>;
768#[allow(missing_docs)]
769#[doc(hidden)]
770pub struct _TXHUBPORT1;
771#[doc = "`read()` method returns [txhubport1::R](txhubport1::R) reader structure"]
772impl crate::Readable for TXHUBPORT1 {}
773#[doc = "`write(|w| ..)` method takes [txhubport1::W](txhubport1::W) writer structure"]
774impl crate::Writable for TXHUBPORT1 {}
775#[doc = "USB Transmit Hub Port Endpoint 1"]
776pub mod txhubport1;
777#[doc = "USB Receive Functional Address Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfuncaddr1](rxfuncaddr1) module"]
778pub type RXFUNCADDR1 = crate::Reg<u8, _RXFUNCADDR1>;
779#[allow(missing_docs)]
780#[doc(hidden)]
781pub struct _RXFUNCADDR1;
782#[doc = "`read()` method returns [rxfuncaddr1::R](rxfuncaddr1::R) reader structure"]
783impl crate::Readable for RXFUNCADDR1 {}
784#[doc = "`write(|w| ..)` method takes [rxfuncaddr1::W](rxfuncaddr1::W) writer structure"]
785impl crate::Writable for RXFUNCADDR1 {}
786#[doc = "USB Receive Functional Address Endpoint 1"]
787pub mod rxfuncaddr1;
788#[doc = "USB Receive Hub Address Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxhubaddr1](rxhubaddr1) module"]
789pub type RXHUBADDR1 = crate::Reg<u8, _RXHUBADDR1>;
790#[allow(missing_docs)]
791#[doc(hidden)]
792pub struct _RXHUBADDR1;
793#[doc = "`read()` method returns [rxhubaddr1::R](rxhubaddr1::R) reader structure"]
794impl crate::Readable for RXHUBADDR1 {}
795#[doc = "`write(|w| ..)` method takes [rxhubaddr1::W](rxhubaddr1::W) writer structure"]
796impl crate::Writable for RXHUBADDR1 {}
797#[doc = "USB Receive Hub Address Endpoint 1"]
798pub mod rxhubaddr1;
799#[doc = "USB Receive Hub Port Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxhubport1](rxhubport1) module"]
800pub type RXHUBPORT1 = crate::Reg<u8, _RXHUBPORT1>;
801#[allow(missing_docs)]
802#[doc(hidden)]
803pub struct _RXHUBPORT1;
804#[doc = "`read()` method returns [rxhubport1::R](rxhubport1::R) reader structure"]
805impl crate::Readable for RXHUBPORT1 {}
806#[doc = "`write(|w| ..)` method takes [rxhubport1::W](rxhubport1::W) writer structure"]
807impl crate::Writable for RXHUBPORT1 {}
808#[doc = "USB Receive Hub Port Endpoint 1"]
809pub mod rxhubport1;
810#[doc = "USB Transmit Functional Address Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txfuncaddr2](txfuncaddr2) module"]
811pub type TXFUNCADDR2 = crate::Reg<u8, _TXFUNCADDR2>;
812#[allow(missing_docs)]
813#[doc(hidden)]
814pub struct _TXFUNCADDR2;
815#[doc = "`read()` method returns [txfuncaddr2::R](txfuncaddr2::R) reader structure"]
816impl crate::Readable for TXFUNCADDR2 {}
817#[doc = "`write(|w| ..)` method takes [txfuncaddr2::W](txfuncaddr2::W) writer structure"]
818impl crate::Writable for TXFUNCADDR2 {}
819#[doc = "USB Transmit Functional Address Endpoint 2"]
820pub mod txfuncaddr2;
821#[doc = "USB Transmit Hub Address Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubaddr2](txhubaddr2) module"]
822pub type TXHUBADDR2 = crate::Reg<u8, _TXHUBADDR2>;
823#[allow(missing_docs)]
824#[doc(hidden)]
825pub struct _TXHUBADDR2;
826#[doc = "`read()` method returns [txhubaddr2::R](txhubaddr2::R) reader structure"]
827impl crate::Readable for TXHUBADDR2 {}
828#[doc = "`write(|w| ..)` method takes [txhubaddr2::W](txhubaddr2::W) writer structure"]
829impl crate::Writable for TXHUBADDR2 {}
830#[doc = "USB Transmit Hub Address Endpoint 2"]
831pub mod txhubaddr2;
832#[doc = "USB Transmit Hub Port Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubport2](txhubport2) module"]
833pub type TXHUBPORT2 = crate::Reg<u8, _TXHUBPORT2>;
834#[allow(missing_docs)]
835#[doc(hidden)]
836pub struct _TXHUBPORT2;
837#[doc = "`read()` method returns [txhubport2::R](txhubport2::R) reader structure"]
838impl crate::Readable for TXHUBPORT2 {}
839#[doc = "`write(|w| ..)` method takes [txhubport2::W](txhubport2::W) writer structure"]
840impl crate::Writable for TXHUBPORT2 {}
841#[doc = "USB Transmit Hub Port Endpoint 2"]
842pub mod txhubport2;
843#[doc = "USB Receive Functional Address Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfuncaddr2](rxfuncaddr2) module"]
844pub type RXFUNCADDR2 = crate::Reg<u8, _RXFUNCADDR2>;
845#[allow(missing_docs)]
846#[doc(hidden)]
847pub struct _RXFUNCADDR2;
848#[doc = "`read()` method returns [rxfuncaddr2::R](rxfuncaddr2::R) reader structure"]
849impl crate::Readable for RXFUNCADDR2 {}
850#[doc = "`write(|w| ..)` method takes [rxfuncaddr2::W](rxfuncaddr2::W) writer structure"]
851impl crate::Writable for RXFUNCADDR2 {}
852#[doc = "USB Receive Functional Address Endpoint 2"]
853pub mod rxfuncaddr2;
854#[doc = "USB Receive Hub Address Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxhubaddr2](rxhubaddr2) module"]
855pub type RXHUBADDR2 = crate::Reg<u8, _RXHUBADDR2>;
856#[allow(missing_docs)]
857#[doc(hidden)]
858pub struct _RXHUBADDR2;
859#[doc = "`read()` method returns [rxhubaddr2::R](rxhubaddr2::R) reader structure"]
860impl crate::Readable for RXHUBADDR2 {}
861#[doc = "`write(|w| ..)` method takes [rxhubaddr2::W](rxhubaddr2::W) writer structure"]
862impl crate::Writable for RXHUBADDR2 {}
863#[doc = "USB Receive Hub Address Endpoint 2"]
864pub mod rxhubaddr2;
865#[doc = "USB Receive Hub Port Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxhubport2](rxhubport2) module"]
866pub type RXHUBPORT2 = crate::Reg<u8, _RXHUBPORT2>;
867#[allow(missing_docs)]
868#[doc(hidden)]
869pub struct _RXHUBPORT2;
870#[doc = "`read()` method returns [rxhubport2::R](rxhubport2::R) reader structure"]
871impl crate::Readable for RXHUBPORT2 {}
872#[doc = "`write(|w| ..)` method takes [rxhubport2::W](rxhubport2::W) writer structure"]
873impl crate::Writable for RXHUBPORT2 {}
874#[doc = "USB Receive Hub Port Endpoint 2"]
875pub mod rxhubport2;
876#[doc = "USB Transmit Functional Address Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txfuncaddr3](txfuncaddr3) module"]
877pub type TXFUNCADDR3 = crate::Reg<u8, _TXFUNCADDR3>;
878#[allow(missing_docs)]
879#[doc(hidden)]
880pub struct _TXFUNCADDR3;
881#[doc = "`read()` method returns [txfuncaddr3::R](txfuncaddr3::R) reader structure"]
882impl crate::Readable for TXFUNCADDR3 {}
883#[doc = "`write(|w| ..)` method takes [txfuncaddr3::W](txfuncaddr3::W) writer structure"]
884impl crate::Writable for TXFUNCADDR3 {}
885#[doc = "USB Transmit Functional Address Endpoint 3"]
886pub mod txfuncaddr3;
887#[doc = "USB Transmit Hub Address Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubaddr3](txhubaddr3) module"]
888pub type TXHUBADDR3 = crate::Reg<u8, _TXHUBADDR3>;
889#[allow(missing_docs)]
890#[doc(hidden)]
891pub struct _TXHUBADDR3;
892#[doc = "`read()` method returns [txhubaddr3::R](txhubaddr3::R) reader structure"]
893impl crate::Readable for TXHUBADDR3 {}
894#[doc = "`write(|w| ..)` method takes [txhubaddr3::W](txhubaddr3::W) writer structure"]
895impl crate::Writable for TXHUBADDR3 {}
896#[doc = "USB Transmit Hub Address Endpoint 3"]
897pub mod txhubaddr3;
898#[doc = "USB Transmit Hub Port Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubport3](txhubport3) module"]
899pub type TXHUBPORT3 = crate::Reg<u8, _TXHUBPORT3>;
900#[allow(missing_docs)]
901#[doc(hidden)]
902pub struct _TXHUBPORT3;
903#[doc = "`read()` method returns [txhubport3::R](txhubport3::R) reader structure"]
904impl crate::Readable for TXHUBPORT3 {}
905#[doc = "`write(|w| ..)` method takes [txhubport3::W](txhubport3::W) writer structure"]
906impl crate::Writable for TXHUBPORT3 {}
907#[doc = "USB Transmit Hub Port Endpoint 3"]
908pub mod txhubport3;
909#[doc = "USB Receive Functional Address Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfuncaddr3](rxfuncaddr3) module"]
910pub type RXFUNCADDR3 = crate::Reg<u8, _RXFUNCADDR3>;
911#[allow(missing_docs)]
912#[doc(hidden)]
913pub struct _RXFUNCADDR3;
914#[doc = "`read()` method returns [rxfuncaddr3::R](rxfuncaddr3::R) reader structure"]
915impl crate::Readable for RXFUNCADDR3 {}
916#[doc = "`write(|w| ..)` method takes [rxfuncaddr3::W](rxfuncaddr3::W) writer structure"]
917impl crate::Writable for RXFUNCADDR3 {}
918#[doc = "USB Receive Functional Address Endpoint 3"]
919pub mod rxfuncaddr3;
920#[doc = "USB Receive Hub Address Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxhubaddr3](rxhubaddr3) module"]
921pub type RXHUBADDR3 = crate::Reg<u8, _RXHUBADDR3>;
922#[allow(missing_docs)]
923#[doc(hidden)]
924pub struct _RXHUBADDR3;
925#[doc = "`read()` method returns [rxhubaddr3::R](rxhubaddr3::R) reader structure"]
926impl crate::Readable for RXHUBADDR3 {}
927#[doc = "`write(|w| ..)` method takes [rxhubaddr3::W](rxhubaddr3::W) writer structure"]
928impl crate::Writable for RXHUBADDR3 {}
929#[doc = "USB Receive Hub Address Endpoint 3"]
930pub mod rxhubaddr3;
931#[doc = "USB Receive Hub Port Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxhubport3](rxhubport3) module"]
932pub type RXHUBPORT3 = crate::Reg<u8, _RXHUBPORT3>;
933#[allow(missing_docs)]
934#[doc(hidden)]
935pub struct _RXHUBPORT3;
936#[doc = "`read()` method returns [rxhubport3::R](rxhubport3::R) reader structure"]
937impl crate::Readable for RXHUBPORT3 {}
938#[doc = "`write(|w| ..)` method takes [rxhubport3::W](rxhubport3::W) writer structure"]
939impl crate::Writable for RXHUBPORT3 {}
940#[doc = "USB Receive Hub Port Endpoint 3"]
941pub mod rxhubport3;
942#[doc = "USB Transmit Functional Address Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txfuncaddr4](txfuncaddr4) module"]
943pub type TXFUNCADDR4 = crate::Reg<u8, _TXFUNCADDR4>;
944#[allow(missing_docs)]
945#[doc(hidden)]
946pub struct _TXFUNCADDR4;
947#[doc = "`read()` method returns [txfuncaddr4::R](txfuncaddr4::R) reader structure"]
948impl crate::Readable for TXFUNCADDR4 {}
949#[doc = "`write(|w| ..)` method takes [txfuncaddr4::W](txfuncaddr4::W) writer structure"]
950impl crate::Writable for TXFUNCADDR4 {}
951#[doc = "USB Transmit Functional Address Endpoint 4"]
952pub mod txfuncaddr4;
953#[doc = "USB Transmit Hub Address Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubaddr4](txhubaddr4) module"]
954pub type TXHUBADDR4 = crate::Reg<u8, _TXHUBADDR4>;
955#[allow(missing_docs)]
956#[doc(hidden)]
957pub struct _TXHUBADDR4;
958#[doc = "`read()` method returns [txhubaddr4::R](txhubaddr4::R) reader structure"]
959impl crate::Readable for TXHUBADDR4 {}
960#[doc = "`write(|w| ..)` method takes [txhubaddr4::W](txhubaddr4::W) writer structure"]
961impl crate::Writable for TXHUBADDR4 {}
962#[doc = "USB Transmit Hub Address Endpoint 4"]
963pub mod txhubaddr4;
964#[doc = "USB Transmit Hub Port Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubport4](txhubport4) module"]
965pub type TXHUBPORT4 = crate::Reg<u8, _TXHUBPORT4>;
966#[allow(missing_docs)]
967#[doc(hidden)]
968pub struct _TXHUBPORT4;
969#[doc = "`read()` method returns [txhubport4::R](txhubport4::R) reader structure"]
970impl crate::Readable for TXHUBPORT4 {}
971#[doc = "`write(|w| ..)` method takes [txhubport4::W](txhubport4::W) writer structure"]
972impl crate::Writable for TXHUBPORT4 {}
973#[doc = "USB Transmit Hub Port Endpoint 4"]
974pub mod txhubport4;
975#[doc = "USB Receive Functional Address Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfuncaddr4](rxfuncaddr4) module"]
976pub type RXFUNCADDR4 = crate::Reg<u8, _RXFUNCADDR4>;
977#[allow(missing_docs)]
978#[doc(hidden)]
979pub struct _RXFUNCADDR4;
980#[doc = "`read()` method returns [rxfuncaddr4::R](rxfuncaddr4::R) reader structure"]
981impl crate::Readable for RXFUNCADDR4 {}
982#[doc = "`write(|w| ..)` method takes [rxfuncaddr4::W](rxfuncaddr4::W) writer structure"]
983impl crate::Writable for RXFUNCADDR4 {}
984#[doc = "USB Receive Functional Address Endpoint 4"]
985pub mod rxfuncaddr4;
986#[doc = "USB Receive Hub Address Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxhubaddr4](rxhubaddr4) module"]
987pub type RXHUBADDR4 = crate::Reg<u8, _RXHUBADDR4>;
988#[allow(missing_docs)]
989#[doc(hidden)]
990pub struct _RXHUBADDR4;
991#[doc = "`read()` method returns [rxhubaddr4::R](rxhubaddr4::R) reader structure"]
992impl crate::Readable for RXHUBADDR4 {}
993#[doc = "`write(|w| ..)` method takes [rxhubaddr4::W](rxhubaddr4::W) writer structure"]
994impl crate::Writable for RXHUBADDR4 {}
995#[doc = "USB Receive Hub Address Endpoint 4"]
996pub mod rxhubaddr4;
997#[doc = "USB Receive Hub Port Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxhubport4](rxhubport4) module"]
998pub type RXHUBPORT4 = crate::Reg<u8, _RXHUBPORT4>;
999#[allow(missing_docs)]
1000#[doc(hidden)]
1001pub struct _RXHUBPORT4;
1002#[doc = "`read()` method returns [rxhubport4::R](rxhubport4::R) reader structure"]
1003impl crate::Readable for RXHUBPORT4 {}
1004#[doc = "`write(|w| ..)` method takes [rxhubport4::W](rxhubport4::W) writer structure"]
1005impl crate::Writable for RXHUBPORT4 {}
1006#[doc = "USB Receive Hub Port Endpoint 4"]
1007pub mod rxhubport4;
1008#[doc = "USB Transmit Functional Address Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txfuncaddr5](txfuncaddr5) module"]
1009pub type TXFUNCADDR5 = crate::Reg<u8, _TXFUNCADDR5>;
1010#[allow(missing_docs)]
1011#[doc(hidden)]
1012pub struct _TXFUNCADDR5;
1013#[doc = "`read()` method returns [txfuncaddr5::R](txfuncaddr5::R) reader structure"]
1014impl crate::Readable for TXFUNCADDR5 {}
1015#[doc = "`write(|w| ..)` method takes [txfuncaddr5::W](txfuncaddr5::W) writer structure"]
1016impl crate::Writable for TXFUNCADDR5 {}
1017#[doc = "USB Transmit Functional Address Endpoint 5"]
1018pub mod txfuncaddr5;
1019#[doc = "USB Transmit Hub Address Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubaddr5](txhubaddr5) module"]
1020pub type TXHUBADDR5 = crate::Reg<u8, _TXHUBADDR5>;
1021#[allow(missing_docs)]
1022#[doc(hidden)]
1023pub struct _TXHUBADDR5;
1024#[doc = "`read()` method returns [txhubaddr5::R](txhubaddr5::R) reader structure"]
1025impl crate::Readable for TXHUBADDR5 {}
1026#[doc = "`write(|w| ..)` method takes [txhubaddr5::W](txhubaddr5::W) writer structure"]
1027impl crate::Writable for TXHUBADDR5 {}
1028#[doc = "USB Transmit Hub Address Endpoint 5"]
1029pub mod txhubaddr5;
1030#[doc = "USB Transmit Hub Port Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubport5](txhubport5) module"]
1031pub type TXHUBPORT5 = crate::Reg<u8, _TXHUBPORT5>;
1032#[allow(missing_docs)]
1033#[doc(hidden)]
1034pub struct _TXHUBPORT5;
1035#[doc = "`read()` method returns [txhubport5::R](txhubport5::R) reader structure"]
1036impl crate::Readable for TXHUBPORT5 {}
1037#[doc = "`write(|w| ..)` method takes [txhubport5::W](txhubport5::W) writer structure"]
1038impl crate::Writable for TXHUBPORT5 {}
1039#[doc = "USB Transmit Hub Port Endpoint 5"]
1040pub mod txhubport5;
1041#[doc = "USB Receive Functional Address Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfuncaddr5](rxfuncaddr5) module"]
1042pub type RXFUNCADDR5 = crate::Reg<u8, _RXFUNCADDR5>;
1043#[allow(missing_docs)]
1044#[doc(hidden)]
1045pub struct _RXFUNCADDR5;
1046#[doc = "`read()` method returns [rxfuncaddr5::R](rxfuncaddr5::R) reader structure"]
1047impl crate::Readable for RXFUNCADDR5 {}
1048#[doc = "`write(|w| ..)` method takes [rxfuncaddr5::W](rxfuncaddr5::W) writer structure"]
1049impl crate::Writable for RXFUNCADDR5 {}
1050#[doc = "USB Receive Functional Address Endpoint 5"]
1051pub mod rxfuncaddr5;
1052#[doc = "USB Receive Hub Address Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxhubaddr5](rxhubaddr5) module"]
1053pub type RXHUBADDR5 = crate::Reg<u8, _RXHUBADDR5>;
1054#[allow(missing_docs)]
1055#[doc(hidden)]
1056pub struct _RXHUBADDR5;
1057#[doc = "`read()` method returns [rxhubaddr5::R](rxhubaddr5::R) reader structure"]
1058impl crate::Readable for RXHUBADDR5 {}
1059#[doc = "`write(|w| ..)` method takes [rxhubaddr5::W](rxhubaddr5::W) writer structure"]
1060impl crate::Writable for RXHUBADDR5 {}
1061#[doc = "USB Receive Hub Address Endpoint 5"]
1062pub mod rxhubaddr5;
1063#[doc = "USB Receive Hub Port Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxhubport5](rxhubport5) module"]
1064pub type RXHUBPORT5 = crate::Reg<u8, _RXHUBPORT5>;
1065#[allow(missing_docs)]
1066#[doc(hidden)]
1067pub struct _RXHUBPORT5;
1068#[doc = "`read()` method returns [rxhubport5::R](rxhubport5::R) reader structure"]
1069impl crate::Readable for RXHUBPORT5 {}
1070#[doc = "`write(|w| ..)` method takes [rxhubport5::W](rxhubport5::W) writer structure"]
1071impl crate::Writable for RXHUBPORT5 {}
1072#[doc = "USB Receive Hub Port Endpoint 5"]
1073pub mod rxhubport5;
1074#[doc = "USB Transmit Functional Address Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txfuncaddr6](txfuncaddr6) module"]
1075pub type TXFUNCADDR6 = crate::Reg<u8, _TXFUNCADDR6>;
1076#[allow(missing_docs)]
1077#[doc(hidden)]
1078pub struct _TXFUNCADDR6;
1079#[doc = "`read()` method returns [txfuncaddr6::R](txfuncaddr6::R) reader structure"]
1080impl crate::Readable for TXFUNCADDR6 {}
1081#[doc = "`write(|w| ..)` method takes [txfuncaddr6::W](txfuncaddr6::W) writer structure"]
1082impl crate::Writable for TXFUNCADDR6 {}
1083#[doc = "USB Transmit Functional Address Endpoint 6"]
1084pub mod txfuncaddr6;
1085#[doc = "USB Transmit Hub Address Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubaddr6](txhubaddr6) module"]
1086pub type TXHUBADDR6 = crate::Reg<u8, _TXHUBADDR6>;
1087#[allow(missing_docs)]
1088#[doc(hidden)]
1089pub struct _TXHUBADDR6;
1090#[doc = "`read()` method returns [txhubaddr6::R](txhubaddr6::R) reader structure"]
1091impl crate::Readable for TXHUBADDR6 {}
1092#[doc = "`write(|w| ..)` method takes [txhubaddr6::W](txhubaddr6::W) writer structure"]
1093impl crate::Writable for TXHUBADDR6 {}
1094#[doc = "USB Transmit Hub Address Endpoint 6"]
1095pub mod txhubaddr6;
1096#[doc = "USB Transmit Hub Port Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubport6](txhubport6) module"]
1097pub type TXHUBPORT6 = crate::Reg<u8, _TXHUBPORT6>;
1098#[allow(missing_docs)]
1099#[doc(hidden)]
1100pub struct _TXHUBPORT6;
1101#[doc = "`read()` method returns [txhubport6::R](txhubport6::R) reader structure"]
1102impl crate::Readable for TXHUBPORT6 {}
1103#[doc = "`write(|w| ..)` method takes [txhubport6::W](txhubport6::W) writer structure"]
1104impl crate::Writable for TXHUBPORT6 {}
1105#[doc = "USB Transmit Hub Port Endpoint 6"]
1106pub mod txhubport6;
1107#[doc = "USB Receive Functional Address Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfuncaddr6](rxfuncaddr6) module"]
1108pub type RXFUNCADDR6 = crate::Reg<u8, _RXFUNCADDR6>;
1109#[allow(missing_docs)]
1110#[doc(hidden)]
1111pub struct _RXFUNCADDR6;
1112#[doc = "`read()` method returns [rxfuncaddr6::R](rxfuncaddr6::R) reader structure"]
1113impl crate::Readable for RXFUNCADDR6 {}
1114#[doc = "`write(|w| ..)` method takes [rxfuncaddr6::W](rxfuncaddr6::W) writer structure"]
1115impl crate::Writable for RXFUNCADDR6 {}
1116#[doc = "USB Receive Functional Address Endpoint 6"]
1117pub mod rxfuncaddr6;
1118#[doc = "USB Receive Hub Address Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxhubaddr6](rxhubaddr6) module"]
1119pub type RXHUBADDR6 = crate::Reg<u8, _RXHUBADDR6>;
1120#[allow(missing_docs)]
1121#[doc(hidden)]
1122pub struct _RXHUBADDR6;
1123#[doc = "`read()` method returns [rxhubaddr6::R](rxhubaddr6::R) reader structure"]
1124impl crate::Readable for RXHUBADDR6 {}
1125#[doc = "`write(|w| ..)` method takes [rxhubaddr6::W](rxhubaddr6::W) writer structure"]
1126impl crate::Writable for RXHUBADDR6 {}
1127#[doc = "USB Receive Hub Address Endpoint 6"]
1128pub mod rxhubaddr6;
1129#[doc = "USB Receive Hub Port Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxhubport6](rxhubport6) module"]
1130pub type RXHUBPORT6 = crate::Reg<u8, _RXHUBPORT6>;
1131#[allow(missing_docs)]
1132#[doc(hidden)]
1133pub struct _RXHUBPORT6;
1134#[doc = "`read()` method returns [rxhubport6::R](rxhubport6::R) reader structure"]
1135impl crate::Readable for RXHUBPORT6 {}
1136#[doc = "`write(|w| ..)` method takes [rxhubport6::W](rxhubport6::W) writer structure"]
1137impl crate::Writable for RXHUBPORT6 {}
1138#[doc = "USB Receive Hub Port Endpoint 6"]
1139pub mod rxhubport6;
1140#[doc = "USB Transmit Functional Address Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txfuncaddr7](txfuncaddr7) module"]
1141pub type TXFUNCADDR7 = crate::Reg<u8, _TXFUNCADDR7>;
1142#[allow(missing_docs)]
1143#[doc(hidden)]
1144pub struct _TXFUNCADDR7;
1145#[doc = "`read()` method returns [txfuncaddr7::R](txfuncaddr7::R) reader structure"]
1146impl crate::Readable for TXFUNCADDR7 {}
1147#[doc = "`write(|w| ..)` method takes [txfuncaddr7::W](txfuncaddr7::W) writer structure"]
1148impl crate::Writable for TXFUNCADDR7 {}
1149#[doc = "USB Transmit Functional Address Endpoint 7"]
1150pub mod txfuncaddr7;
1151#[doc = "USB Transmit Hub Address Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubaddr7](txhubaddr7) module"]
1152pub type TXHUBADDR7 = crate::Reg<u8, _TXHUBADDR7>;
1153#[allow(missing_docs)]
1154#[doc(hidden)]
1155pub struct _TXHUBADDR7;
1156#[doc = "`read()` method returns [txhubaddr7::R](txhubaddr7::R) reader structure"]
1157impl crate::Readable for TXHUBADDR7 {}
1158#[doc = "`write(|w| ..)` method takes [txhubaddr7::W](txhubaddr7::W) writer structure"]
1159impl crate::Writable for TXHUBADDR7 {}
1160#[doc = "USB Transmit Hub Address Endpoint 7"]
1161pub mod txhubaddr7;
1162#[doc = "USB Transmit Hub Port Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txhubport7](txhubport7) module"]
1163pub type TXHUBPORT7 = crate::Reg<u8, _TXHUBPORT7>;
1164#[allow(missing_docs)]
1165#[doc(hidden)]
1166pub struct _TXHUBPORT7;
1167#[doc = "`read()` method returns [txhubport7::R](txhubport7::R) reader structure"]
1168impl crate::Readable for TXHUBPORT7 {}
1169#[doc = "`write(|w| ..)` method takes [txhubport7::W](txhubport7::W) writer structure"]
1170impl crate::Writable for TXHUBPORT7 {}
1171#[doc = "USB Transmit Hub Port Endpoint 7"]
1172pub mod txhubport7;
1173#[doc = "USB Receive Functional Address Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxfuncaddr7](rxfuncaddr7) module"]
1174pub type RXFUNCADDR7 = crate::Reg<u8, _RXFUNCADDR7>;
1175#[allow(missing_docs)]
1176#[doc(hidden)]
1177pub struct _RXFUNCADDR7;
1178#[doc = "`read()` method returns [rxfuncaddr7::R](rxfuncaddr7::R) reader structure"]
1179impl crate::Readable for RXFUNCADDR7 {}
1180#[doc = "`write(|w| ..)` method takes [rxfuncaddr7::W](rxfuncaddr7::W) writer structure"]
1181impl crate::Writable for RXFUNCADDR7 {}
1182#[doc = "USB Receive Functional Address Endpoint 7"]
1183pub mod rxfuncaddr7;
1184#[doc = "USB Receive Hub Address Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxhubaddr7](rxhubaddr7) module"]
1185pub type RXHUBADDR7 = crate::Reg<u8, _RXHUBADDR7>;
1186#[allow(missing_docs)]
1187#[doc(hidden)]
1188pub struct _RXHUBADDR7;
1189#[doc = "`read()` method returns [rxhubaddr7::R](rxhubaddr7::R) reader structure"]
1190impl crate::Readable for RXHUBADDR7 {}
1191#[doc = "`write(|w| ..)` method takes [rxhubaddr7::W](rxhubaddr7::W) writer structure"]
1192impl crate::Writable for RXHUBADDR7 {}
1193#[doc = "USB Receive Hub Address Endpoint 7"]
1194pub mod rxhubaddr7;
1195#[doc = "USB Receive Hub Port Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxhubport7](rxhubport7) module"]
1196pub type RXHUBPORT7 = crate::Reg<u8, _RXHUBPORT7>;
1197#[allow(missing_docs)]
1198#[doc(hidden)]
1199pub struct _RXHUBPORT7;
1200#[doc = "`read()` method returns [rxhubport7::R](rxhubport7::R) reader structure"]
1201impl crate::Readable for RXHUBPORT7 {}
1202#[doc = "`write(|w| ..)` method takes [rxhubport7::W](rxhubport7::W) writer structure"]
1203impl crate::Writable for RXHUBPORT7 {}
1204#[doc = "USB Receive Hub Port Endpoint 7"]
1205pub mod rxhubport7;
1206#[doc = "USB Control and Status Endpoint 0 Low\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [csrl0](csrl0) module"]
1207pub type CSRL0 = crate::Reg<u8, _CSRL0>;
1208#[allow(missing_docs)]
1209#[doc(hidden)]
1210pub struct _CSRL0;
1211#[doc = "`write(|w| ..)` method takes [csrl0::W](csrl0::W) writer structure"]
1212impl crate::Writable for CSRL0 {}
1213#[doc = "USB Control and Status Endpoint 0 Low"]
1214pub mod csrl0;
1215#[doc = "USB Control and Status Endpoint 0 High\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [csrh0](csrh0) module"]
1216pub type CSRH0 = crate::Reg<u8, _CSRH0>;
1217#[allow(missing_docs)]
1218#[doc(hidden)]
1219pub struct _CSRH0;
1220#[doc = "`write(|w| ..)` method takes [csrh0::W](csrh0::W) writer structure"]
1221impl crate::Writable for CSRH0 {}
1222#[doc = "USB Control and Status Endpoint 0 High"]
1223pub mod csrh0;
1224#[doc = "USB Receive Byte Count Endpoint 0\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [count0](count0) module"]
1225pub type COUNT0 = crate::Reg<u8, _COUNT0>;
1226#[allow(missing_docs)]
1227#[doc(hidden)]
1228pub struct _COUNT0;
1229#[doc = "`read()` method returns [count0::R](count0::R) reader structure"]
1230impl crate::Readable for COUNT0 {}
1231#[doc = "USB Receive Byte Count Endpoint 0"]
1232pub mod count0;
1233#[doc = "USB Type Endpoint 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [type0](type0) module"]
1234pub type TYPE0 = crate::Reg<u8, _TYPE0>;
1235#[allow(missing_docs)]
1236#[doc(hidden)]
1237pub struct _TYPE0;
1238#[doc = "`read()` method returns [type0::R](type0::R) reader structure"]
1239impl crate::Readable for TYPE0 {}
1240#[doc = "`write(|w| ..)` method takes [type0::W](type0::W) writer structure"]
1241impl crate::Writable for TYPE0 {}
1242#[doc = "USB Type Endpoint 0"]
1243pub mod type0;
1244#[doc = "USB NAK Limit\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [naklmt](naklmt) module"]
1245pub type NAKLMT = crate::Reg<u8, _NAKLMT>;
1246#[allow(missing_docs)]
1247#[doc(hidden)]
1248pub struct _NAKLMT;
1249#[doc = "`read()` method returns [naklmt::R](naklmt::R) reader structure"]
1250impl crate::Readable for NAKLMT {}
1251#[doc = "`write(|w| ..)` method takes [naklmt::W](naklmt::W) writer structure"]
1252impl crate::Writable for NAKLMT {}
1253#[doc = "USB NAK Limit"]
1254pub mod naklmt;
1255#[doc = "USB Maximum Transmit Data Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txmaxp1](txmaxp1) module"]
1256pub type TXMAXP1 = crate::Reg<u16, _TXMAXP1>;
1257#[allow(missing_docs)]
1258#[doc(hidden)]
1259pub struct _TXMAXP1;
1260#[doc = "`read()` method returns [txmaxp1::R](txmaxp1::R) reader structure"]
1261impl crate::Readable for TXMAXP1 {}
1262#[doc = "`write(|w| ..)` method takes [txmaxp1::W](txmaxp1::W) writer structure"]
1263impl crate::Writable for TXMAXP1 {}
1264#[doc = "USB Maximum Transmit Data Endpoint 1"]
1265pub mod txmaxp1;
1266#[doc = "USB Transmit Control and Status Endpoint 1 Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcsrl1](txcsrl1) module"]
1267pub type TXCSRL1 = crate::Reg<u8, _TXCSRL1>;
1268#[allow(missing_docs)]
1269#[doc(hidden)]
1270pub struct _TXCSRL1;
1271#[doc = "`read()` method returns [txcsrl1::R](txcsrl1::R) reader structure"]
1272impl crate::Readable for TXCSRL1 {}
1273#[doc = "`write(|w| ..)` method takes [txcsrl1::W](txcsrl1::W) writer structure"]
1274impl crate::Writable for TXCSRL1 {}
1275#[doc = "USB Transmit Control and Status Endpoint 1 Low"]
1276pub mod txcsrl1;
1277#[doc = "USB Transmit Control and Status Endpoint 1 High\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcsrh1](txcsrh1) module"]
1278pub type TXCSRH1 = crate::Reg<u8, _TXCSRH1>;
1279#[allow(missing_docs)]
1280#[doc(hidden)]
1281pub struct _TXCSRH1;
1282#[doc = "`read()` method returns [txcsrh1::R](txcsrh1::R) reader structure"]
1283impl crate::Readable for TXCSRH1 {}
1284#[doc = "`write(|w| ..)` method takes [txcsrh1::W](txcsrh1::W) writer structure"]
1285impl crate::Writable for TXCSRH1 {}
1286#[doc = "USB Transmit Control and Status Endpoint 1 High"]
1287pub mod txcsrh1;
1288#[doc = "USB Maximum Receive Data Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxmaxp1](rxmaxp1) module"]
1289pub type RXMAXP1 = crate::Reg<u16, _RXMAXP1>;
1290#[allow(missing_docs)]
1291#[doc(hidden)]
1292pub struct _RXMAXP1;
1293#[doc = "`read()` method returns [rxmaxp1::R](rxmaxp1::R) reader structure"]
1294impl crate::Readable for RXMAXP1 {}
1295#[doc = "`write(|w| ..)` method takes [rxmaxp1::W](rxmaxp1::W) writer structure"]
1296impl crate::Writable for RXMAXP1 {}
1297#[doc = "USB Maximum Receive Data Endpoint 1"]
1298pub mod rxmaxp1;
1299#[doc = "USB Receive Control and Status Endpoint 1 Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcsrl1](rxcsrl1) module"]
1300pub type RXCSRL1 = crate::Reg<u8, _RXCSRL1>;
1301#[allow(missing_docs)]
1302#[doc(hidden)]
1303pub struct _RXCSRL1;
1304#[doc = "`read()` method returns [rxcsrl1::R](rxcsrl1::R) reader structure"]
1305impl crate::Readable for RXCSRL1 {}
1306#[doc = "`write(|w| ..)` method takes [rxcsrl1::W](rxcsrl1::W) writer structure"]
1307impl crate::Writable for RXCSRL1 {}
1308#[doc = "USB Receive Control and Status Endpoint 1 Low"]
1309pub mod rxcsrl1;
1310#[doc = "USB Receive Control and Status Endpoint 1 High\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcsrh1](rxcsrh1) module"]
1311pub type RXCSRH1 = crate::Reg<u8, _RXCSRH1>;
1312#[allow(missing_docs)]
1313#[doc(hidden)]
1314pub struct _RXCSRH1;
1315#[doc = "`read()` method returns [rxcsrh1::R](rxcsrh1::R) reader structure"]
1316impl crate::Readable for RXCSRH1 {}
1317#[doc = "`write(|w| ..)` method takes [rxcsrh1::W](rxcsrh1::W) writer structure"]
1318impl crate::Writable for RXCSRH1 {}
1319#[doc = "USB Receive Control and Status Endpoint 1 High"]
1320pub mod rxcsrh1;
1321#[doc = "USB Receive Byte Count Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcount1](rxcount1) module"]
1322pub type RXCOUNT1 = crate::Reg<u16, _RXCOUNT1>;
1323#[allow(missing_docs)]
1324#[doc(hidden)]
1325pub struct _RXCOUNT1;
1326#[doc = "`read()` method returns [rxcount1::R](rxcount1::R) reader structure"]
1327impl crate::Readable for RXCOUNT1 {}
1328#[doc = "USB Receive Byte Count Endpoint 1"]
1329pub mod rxcount1;
1330#[doc = "USB Host Transmit Configure Type Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txtype1](txtype1) module"]
1331pub type TXTYPE1 = crate::Reg<u8, _TXTYPE1>;
1332#[allow(missing_docs)]
1333#[doc(hidden)]
1334pub struct _TXTYPE1;
1335#[doc = "`read()` method returns [txtype1::R](txtype1::R) reader structure"]
1336impl crate::Readable for TXTYPE1 {}
1337#[doc = "`write(|w| ..)` method takes [txtype1::W](txtype1::W) writer structure"]
1338impl crate::Writable for TXTYPE1 {}
1339#[doc = "USB Host Transmit Configure Type Endpoint 1"]
1340pub mod txtype1;
1341#[doc = "USB Host Transmit Interval Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txinterval1](txinterval1) module"]
1342pub type TXINTERVAL1 = crate::Reg<u8, _TXINTERVAL1>;
1343#[allow(missing_docs)]
1344#[doc(hidden)]
1345pub struct _TXINTERVAL1;
1346#[doc = "`read()` method returns [txinterval1::R](txinterval1::R) reader structure"]
1347impl crate::Readable for TXINTERVAL1 {}
1348#[doc = "`write(|w| ..)` method takes [txinterval1::W](txinterval1::W) writer structure"]
1349impl crate::Writable for TXINTERVAL1 {}
1350#[doc = "USB Host Transmit Interval Endpoint 1"]
1351pub mod txinterval1;
1352#[doc = "USB Host Configure Receive Type Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxtype1](rxtype1) module"]
1353pub type RXTYPE1 = crate::Reg<u8, _RXTYPE1>;
1354#[allow(missing_docs)]
1355#[doc(hidden)]
1356pub struct _RXTYPE1;
1357#[doc = "`read()` method returns [rxtype1::R](rxtype1::R) reader structure"]
1358impl crate::Readable for RXTYPE1 {}
1359#[doc = "`write(|w| ..)` method takes [rxtype1::W](rxtype1::W) writer structure"]
1360impl crate::Writable for RXTYPE1 {}
1361#[doc = "USB Host Configure Receive Type Endpoint 1"]
1362pub mod rxtype1;
1363#[doc = "USB Host Receive Polling Interval Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxinterval1](rxinterval1) module"]
1364pub type RXINTERVAL1 = crate::Reg<u8, _RXINTERVAL1>;
1365#[allow(missing_docs)]
1366#[doc(hidden)]
1367pub struct _RXINTERVAL1;
1368#[doc = "`read()` method returns [rxinterval1::R](rxinterval1::R) reader structure"]
1369impl crate::Readable for RXINTERVAL1 {}
1370#[doc = "`write(|w| ..)` method takes [rxinterval1::W](rxinterval1::W) writer structure"]
1371impl crate::Writable for RXINTERVAL1 {}
1372#[doc = "USB Host Receive Polling Interval Endpoint 1"]
1373pub mod rxinterval1;
1374#[doc = "USB Maximum Transmit Data Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txmaxp2](txmaxp2) module"]
1375pub type TXMAXP2 = crate::Reg<u16, _TXMAXP2>;
1376#[allow(missing_docs)]
1377#[doc(hidden)]
1378pub struct _TXMAXP2;
1379#[doc = "`read()` method returns [txmaxp2::R](txmaxp2::R) reader structure"]
1380impl crate::Readable for TXMAXP2 {}
1381#[doc = "`write(|w| ..)` method takes [txmaxp2::W](txmaxp2::W) writer structure"]
1382impl crate::Writable for TXMAXP2 {}
1383#[doc = "USB Maximum Transmit Data Endpoint 2"]
1384pub mod txmaxp2;
1385#[doc = "USB Transmit Control and Status Endpoint 2 Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcsrl2](txcsrl2) module"]
1386pub type TXCSRL2 = crate::Reg<u8, _TXCSRL2>;
1387#[allow(missing_docs)]
1388#[doc(hidden)]
1389pub struct _TXCSRL2;
1390#[doc = "`read()` method returns [txcsrl2::R](txcsrl2::R) reader structure"]
1391impl crate::Readable for TXCSRL2 {}
1392#[doc = "`write(|w| ..)` method takes [txcsrl2::W](txcsrl2::W) writer structure"]
1393impl crate::Writable for TXCSRL2 {}
1394#[doc = "USB Transmit Control and Status Endpoint 2 Low"]
1395pub mod txcsrl2;
1396#[doc = "USB Transmit Control and Status Endpoint 2 High\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcsrh2](txcsrh2) module"]
1397pub type TXCSRH2 = crate::Reg<u8, _TXCSRH2>;
1398#[allow(missing_docs)]
1399#[doc(hidden)]
1400pub struct _TXCSRH2;
1401#[doc = "`read()` method returns [txcsrh2::R](txcsrh2::R) reader structure"]
1402impl crate::Readable for TXCSRH2 {}
1403#[doc = "`write(|w| ..)` method takes [txcsrh2::W](txcsrh2::W) writer structure"]
1404impl crate::Writable for TXCSRH2 {}
1405#[doc = "USB Transmit Control and Status Endpoint 2 High"]
1406pub mod txcsrh2;
1407#[doc = "USB Maximum Receive Data Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxmaxp2](rxmaxp2) module"]
1408pub type RXMAXP2 = crate::Reg<u16, _RXMAXP2>;
1409#[allow(missing_docs)]
1410#[doc(hidden)]
1411pub struct _RXMAXP2;
1412#[doc = "`read()` method returns [rxmaxp2::R](rxmaxp2::R) reader structure"]
1413impl crate::Readable for RXMAXP2 {}
1414#[doc = "`write(|w| ..)` method takes [rxmaxp2::W](rxmaxp2::W) writer structure"]
1415impl crate::Writable for RXMAXP2 {}
1416#[doc = "USB Maximum Receive Data Endpoint 2"]
1417pub mod rxmaxp2;
1418#[doc = "USB Receive Control and Status Endpoint 2 Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcsrl2](rxcsrl2) module"]
1419pub type RXCSRL2 = crate::Reg<u8, _RXCSRL2>;
1420#[allow(missing_docs)]
1421#[doc(hidden)]
1422pub struct _RXCSRL2;
1423#[doc = "`read()` method returns [rxcsrl2::R](rxcsrl2::R) reader structure"]
1424impl crate::Readable for RXCSRL2 {}
1425#[doc = "`write(|w| ..)` method takes [rxcsrl2::W](rxcsrl2::W) writer structure"]
1426impl crate::Writable for RXCSRL2 {}
1427#[doc = "USB Receive Control and Status Endpoint 2 Low"]
1428pub mod rxcsrl2;
1429#[doc = "USB Receive Control and Status Endpoint 2 High\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcsrh2](rxcsrh2) module"]
1430pub type RXCSRH2 = crate::Reg<u8, _RXCSRH2>;
1431#[allow(missing_docs)]
1432#[doc(hidden)]
1433pub struct _RXCSRH2;
1434#[doc = "`read()` method returns [rxcsrh2::R](rxcsrh2::R) reader structure"]
1435impl crate::Readable for RXCSRH2 {}
1436#[doc = "`write(|w| ..)` method takes [rxcsrh2::W](rxcsrh2::W) writer structure"]
1437impl crate::Writable for RXCSRH2 {}
1438#[doc = "USB Receive Control and Status Endpoint 2 High"]
1439pub mod rxcsrh2;
1440#[doc = "USB Receive Byte Count Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcount2](rxcount2) module"]
1441pub type RXCOUNT2 = crate::Reg<u16, _RXCOUNT2>;
1442#[allow(missing_docs)]
1443#[doc(hidden)]
1444pub struct _RXCOUNT2;
1445#[doc = "`read()` method returns [rxcount2::R](rxcount2::R) reader structure"]
1446impl crate::Readable for RXCOUNT2 {}
1447#[doc = "USB Receive Byte Count Endpoint 2"]
1448pub mod rxcount2;
1449#[doc = "USB Host Transmit Configure Type Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txtype2](txtype2) module"]
1450pub type TXTYPE2 = crate::Reg<u8, _TXTYPE2>;
1451#[allow(missing_docs)]
1452#[doc(hidden)]
1453pub struct _TXTYPE2;
1454#[doc = "`read()` method returns [txtype2::R](txtype2::R) reader structure"]
1455impl crate::Readable for TXTYPE2 {}
1456#[doc = "`write(|w| ..)` method takes [txtype2::W](txtype2::W) writer structure"]
1457impl crate::Writable for TXTYPE2 {}
1458#[doc = "USB Host Transmit Configure Type Endpoint 2"]
1459pub mod txtype2;
1460#[doc = "USB Host Transmit Interval Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txinterval2](txinterval2) module"]
1461pub type TXINTERVAL2 = crate::Reg<u8, _TXINTERVAL2>;
1462#[allow(missing_docs)]
1463#[doc(hidden)]
1464pub struct _TXINTERVAL2;
1465#[doc = "`read()` method returns [txinterval2::R](txinterval2::R) reader structure"]
1466impl crate::Readable for TXINTERVAL2 {}
1467#[doc = "`write(|w| ..)` method takes [txinterval2::W](txinterval2::W) writer structure"]
1468impl crate::Writable for TXINTERVAL2 {}
1469#[doc = "USB Host Transmit Interval Endpoint 2"]
1470pub mod txinterval2;
1471#[doc = "USB Host Configure Receive Type Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxtype2](rxtype2) module"]
1472pub type RXTYPE2 = crate::Reg<u8, _RXTYPE2>;
1473#[allow(missing_docs)]
1474#[doc(hidden)]
1475pub struct _RXTYPE2;
1476#[doc = "`read()` method returns [rxtype2::R](rxtype2::R) reader structure"]
1477impl crate::Readable for RXTYPE2 {}
1478#[doc = "`write(|w| ..)` method takes [rxtype2::W](rxtype2::W) writer structure"]
1479impl crate::Writable for RXTYPE2 {}
1480#[doc = "USB Host Configure Receive Type Endpoint 2"]
1481pub mod rxtype2;
1482#[doc = "USB Host Receive Polling Interval Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxinterval2](rxinterval2) module"]
1483pub type RXINTERVAL2 = crate::Reg<u8, _RXINTERVAL2>;
1484#[allow(missing_docs)]
1485#[doc(hidden)]
1486pub struct _RXINTERVAL2;
1487#[doc = "`read()` method returns [rxinterval2::R](rxinterval2::R) reader structure"]
1488impl crate::Readable for RXINTERVAL2 {}
1489#[doc = "`write(|w| ..)` method takes [rxinterval2::W](rxinterval2::W) writer structure"]
1490impl crate::Writable for RXINTERVAL2 {}
1491#[doc = "USB Host Receive Polling Interval Endpoint 2"]
1492pub mod rxinterval2;
1493#[doc = "USB Maximum Transmit Data Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txmaxp3](txmaxp3) module"]
1494pub type TXMAXP3 = crate::Reg<u16, _TXMAXP3>;
1495#[allow(missing_docs)]
1496#[doc(hidden)]
1497pub struct _TXMAXP3;
1498#[doc = "`read()` method returns [txmaxp3::R](txmaxp3::R) reader structure"]
1499impl crate::Readable for TXMAXP3 {}
1500#[doc = "`write(|w| ..)` method takes [txmaxp3::W](txmaxp3::W) writer structure"]
1501impl crate::Writable for TXMAXP3 {}
1502#[doc = "USB Maximum Transmit Data Endpoint 3"]
1503pub mod txmaxp3;
1504#[doc = "USB Transmit Control and Status Endpoint 3 Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcsrl3](txcsrl3) module"]
1505pub type TXCSRL3 = crate::Reg<u8, _TXCSRL3>;
1506#[allow(missing_docs)]
1507#[doc(hidden)]
1508pub struct _TXCSRL3;
1509#[doc = "`read()` method returns [txcsrl3::R](txcsrl3::R) reader structure"]
1510impl crate::Readable for TXCSRL3 {}
1511#[doc = "`write(|w| ..)` method takes [txcsrl3::W](txcsrl3::W) writer structure"]
1512impl crate::Writable for TXCSRL3 {}
1513#[doc = "USB Transmit Control and Status Endpoint 3 Low"]
1514pub mod txcsrl3;
1515#[doc = "USB Transmit Control and Status Endpoint 3 High\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcsrh3](txcsrh3) module"]
1516pub type TXCSRH3 = crate::Reg<u8, _TXCSRH3>;
1517#[allow(missing_docs)]
1518#[doc(hidden)]
1519pub struct _TXCSRH3;
1520#[doc = "`read()` method returns [txcsrh3::R](txcsrh3::R) reader structure"]
1521impl crate::Readable for TXCSRH3 {}
1522#[doc = "`write(|w| ..)` method takes [txcsrh3::W](txcsrh3::W) writer structure"]
1523impl crate::Writable for TXCSRH3 {}
1524#[doc = "USB Transmit Control and Status Endpoint 3 High"]
1525pub mod txcsrh3;
1526#[doc = "USB Maximum Receive Data Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxmaxp3](rxmaxp3) module"]
1527pub type RXMAXP3 = crate::Reg<u16, _RXMAXP3>;
1528#[allow(missing_docs)]
1529#[doc(hidden)]
1530pub struct _RXMAXP3;
1531#[doc = "`read()` method returns [rxmaxp3::R](rxmaxp3::R) reader structure"]
1532impl crate::Readable for RXMAXP3 {}
1533#[doc = "`write(|w| ..)` method takes [rxmaxp3::W](rxmaxp3::W) writer structure"]
1534impl crate::Writable for RXMAXP3 {}
1535#[doc = "USB Maximum Receive Data Endpoint 3"]
1536pub mod rxmaxp3;
1537#[doc = "USB Receive Control and Status Endpoint 3 Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcsrl3](rxcsrl3) module"]
1538pub type RXCSRL3 = crate::Reg<u8, _RXCSRL3>;
1539#[allow(missing_docs)]
1540#[doc(hidden)]
1541pub struct _RXCSRL3;
1542#[doc = "`read()` method returns [rxcsrl3::R](rxcsrl3::R) reader structure"]
1543impl crate::Readable for RXCSRL3 {}
1544#[doc = "`write(|w| ..)` method takes [rxcsrl3::W](rxcsrl3::W) writer structure"]
1545impl crate::Writable for RXCSRL3 {}
1546#[doc = "USB Receive Control and Status Endpoint 3 Low"]
1547pub mod rxcsrl3;
1548#[doc = "USB Receive Control and Status Endpoint 3 High\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcsrh3](rxcsrh3) module"]
1549pub type RXCSRH3 = crate::Reg<u8, _RXCSRH3>;
1550#[allow(missing_docs)]
1551#[doc(hidden)]
1552pub struct _RXCSRH3;
1553#[doc = "`read()` method returns [rxcsrh3::R](rxcsrh3::R) reader structure"]
1554impl crate::Readable for RXCSRH3 {}
1555#[doc = "`write(|w| ..)` method takes [rxcsrh3::W](rxcsrh3::W) writer structure"]
1556impl crate::Writable for RXCSRH3 {}
1557#[doc = "USB Receive Control and Status Endpoint 3 High"]
1558pub mod rxcsrh3;
1559#[doc = "USB Receive Byte Count Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcount3](rxcount3) module"]
1560pub type RXCOUNT3 = crate::Reg<u16, _RXCOUNT3>;
1561#[allow(missing_docs)]
1562#[doc(hidden)]
1563pub struct _RXCOUNT3;
1564#[doc = "`read()` method returns [rxcount3::R](rxcount3::R) reader structure"]
1565impl crate::Readable for RXCOUNT3 {}
1566#[doc = "USB Receive Byte Count Endpoint 3"]
1567pub mod rxcount3;
1568#[doc = "USB Host Transmit Configure Type Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txtype3](txtype3) module"]
1569pub type TXTYPE3 = crate::Reg<u8, _TXTYPE3>;
1570#[allow(missing_docs)]
1571#[doc(hidden)]
1572pub struct _TXTYPE3;
1573#[doc = "`read()` method returns [txtype3::R](txtype3::R) reader structure"]
1574impl crate::Readable for TXTYPE3 {}
1575#[doc = "`write(|w| ..)` method takes [txtype3::W](txtype3::W) writer structure"]
1576impl crate::Writable for TXTYPE3 {}
1577#[doc = "USB Host Transmit Configure Type Endpoint 3"]
1578pub mod txtype3;
1579#[doc = "USB Host Transmit Interval Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txinterval3](txinterval3) module"]
1580pub type TXINTERVAL3 = crate::Reg<u8, _TXINTERVAL3>;
1581#[allow(missing_docs)]
1582#[doc(hidden)]
1583pub struct _TXINTERVAL3;
1584#[doc = "`read()` method returns [txinterval3::R](txinterval3::R) reader structure"]
1585impl crate::Readable for TXINTERVAL3 {}
1586#[doc = "`write(|w| ..)` method takes [txinterval3::W](txinterval3::W) writer structure"]
1587impl crate::Writable for TXINTERVAL3 {}
1588#[doc = "USB Host Transmit Interval Endpoint 3"]
1589pub mod txinterval3;
1590#[doc = "USB Host Configure Receive Type Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxtype3](rxtype3) module"]
1591pub type RXTYPE3 = crate::Reg<u8, _RXTYPE3>;
1592#[allow(missing_docs)]
1593#[doc(hidden)]
1594pub struct _RXTYPE3;
1595#[doc = "`read()` method returns [rxtype3::R](rxtype3::R) reader structure"]
1596impl crate::Readable for RXTYPE3 {}
1597#[doc = "`write(|w| ..)` method takes [rxtype3::W](rxtype3::W) writer structure"]
1598impl crate::Writable for RXTYPE3 {}
1599#[doc = "USB Host Configure Receive Type Endpoint 3"]
1600pub mod rxtype3;
1601#[doc = "USB Host Receive Polling Interval Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxinterval3](rxinterval3) module"]
1602pub type RXINTERVAL3 = crate::Reg<u8, _RXINTERVAL3>;
1603#[allow(missing_docs)]
1604#[doc(hidden)]
1605pub struct _RXINTERVAL3;
1606#[doc = "`read()` method returns [rxinterval3::R](rxinterval3::R) reader structure"]
1607impl crate::Readable for RXINTERVAL3 {}
1608#[doc = "`write(|w| ..)` method takes [rxinterval3::W](rxinterval3::W) writer structure"]
1609impl crate::Writable for RXINTERVAL3 {}
1610#[doc = "USB Host Receive Polling Interval Endpoint 3"]
1611pub mod rxinterval3;
1612#[doc = "USB Maximum Transmit Data Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txmaxp4](txmaxp4) module"]
1613pub type TXMAXP4 = crate::Reg<u16, _TXMAXP4>;
1614#[allow(missing_docs)]
1615#[doc(hidden)]
1616pub struct _TXMAXP4;
1617#[doc = "`read()` method returns [txmaxp4::R](txmaxp4::R) reader structure"]
1618impl crate::Readable for TXMAXP4 {}
1619#[doc = "`write(|w| ..)` method takes [txmaxp4::W](txmaxp4::W) writer structure"]
1620impl crate::Writable for TXMAXP4 {}
1621#[doc = "USB Maximum Transmit Data Endpoint 4"]
1622pub mod txmaxp4;
1623#[doc = "USB Transmit Control and Status Endpoint 4 Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcsrl4](txcsrl4) module"]
1624pub type TXCSRL4 = crate::Reg<u8, _TXCSRL4>;
1625#[allow(missing_docs)]
1626#[doc(hidden)]
1627pub struct _TXCSRL4;
1628#[doc = "`read()` method returns [txcsrl4::R](txcsrl4::R) reader structure"]
1629impl crate::Readable for TXCSRL4 {}
1630#[doc = "`write(|w| ..)` method takes [txcsrl4::W](txcsrl4::W) writer structure"]
1631impl crate::Writable for TXCSRL4 {}
1632#[doc = "USB Transmit Control and Status Endpoint 4 Low"]
1633pub mod txcsrl4;
1634#[doc = "USB Transmit Control and Status Endpoint 4 High\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcsrh4](txcsrh4) module"]
1635pub type TXCSRH4 = crate::Reg<u8, _TXCSRH4>;
1636#[allow(missing_docs)]
1637#[doc(hidden)]
1638pub struct _TXCSRH4;
1639#[doc = "`read()` method returns [txcsrh4::R](txcsrh4::R) reader structure"]
1640impl crate::Readable for TXCSRH4 {}
1641#[doc = "`write(|w| ..)` method takes [txcsrh4::W](txcsrh4::W) writer structure"]
1642impl crate::Writable for TXCSRH4 {}
1643#[doc = "USB Transmit Control and Status Endpoint 4 High"]
1644pub mod txcsrh4;
1645#[doc = "USB Maximum Receive Data Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxmaxp4](rxmaxp4) module"]
1646pub type RXMAXP4 = crate::Reg<u16, _RXMAXP4>;
1647#[allow(missing_docs)]
1648#[doc(hidden)]
1649pub struct _RXMAXP4;
1650#[doc = "`read()` method returns [rxmaxp4::R](rxmaxp4::R) reader structure"]
1651impl crate::Readable for RXMAXP4 {}
1652#[doc = "`write(|w| ..)` method takes [rxmaxp4::W](rxmaxp4::W) writer structure"]
1653impl crate::Writable for RXMAXP4 {}
1654#[doc = "USB Maximum Receive Data Endpoint 4"]
1655pub mod rxmaxp4;
1656#[doc = "USB Receive Control and Status Endpoint 4 Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcsrl4](rxcsrl4) module"]
1657pub type RXCSRL4 = crate::Reg<u8, _RXCSRL4>;
1658#[allow(missing_docs)]
1659#[doc(hidden)]
1660pub struct _RXCSRL4;
1661#[doc = "`read()` method returns [rxcsrl4::R](rxcsrl4::R) reader structure"]
1662impl crate::Readable for RXCSRL4 {}
1663#[doc = "`write(|w| ..)` method takes [rxcsrl4::W](rxcsrl4::W) writer structure"]
1664impl crate::Writable for RXCSRL4 {}
1665#[doc = "USB Receive Control and Status Endpoint 4 Low"]
1666pub mod rxcsrl4;
1667#[doc = "USB Receive Control and Status Endpoint 4 High\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcsrh4](rxcsrh4) module"]
1668pub type RXCSRH4 = crate::Reg<u8, _RXCSRH4>;
1669#[allow(missing_docs)]
1670#[doc(hidden)]
1671pub struct _RXCSRH4;
1672#[doc = "`read()` method returns [rxcsrh4::R](rxcsrh4::R) reader structure"]
1673impl crate::Readable for RXCSRH4 {}
1674#[doc = "`write(|w| ..)` method takes [rxcsrh4::W](rxcsrh4::W) writer structure"]
1675impl crate::Writable for RXCSRH4 {}
1676#[doc = "USB Receive Control and Status Endpoint 4 High"]
1677pub mod rxcsrh4;
1678#[doc = "USB Receive Byte Count Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcount4](rxcount4) module"]
1679pub type RXCOUNT4 = crate::Reg<u16, _RXCOUNT4>;
1680#[allow(missing_docs)]
1681#[doc(hidden)]
1682pub struct _RXCOUNT4;
1683#[doc = "`read()` method returns [rxcount4::R](rxcount4::R) reader structure"]
1684impl crate::Readable for RXCOUNT4 {}
1685#[doc = "USB Receive Byte Count Endpoint 4"]
1686pub mod rxcount4;
1687#[doc = "USB Host Transmit Configure Type Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txtype4](txtype4) module"]
1688pub type TXTYPE4 = crate::Reg<u8, _TXTYPE4>;
1689#[allow(missing_docs)]
1690#[doc(hidden)]
1691pub struct _TXTYPE4;
1692#[doc = "`read()` method returns [txtype4::R](txtype4::R) reader structure"]
1693impl crate::Readable for TXTYPE4 {}
1694#[doc = "`write(|w| ..)` method takes [txtype4::W](txtype4::W) writer structure"]
1695impl crate::Writable for TXTYPE4 {}
1696#[doc = "USB Host Transmit Configure Type Endpoint 4"]
1697pub mod txtype4;
1698#[doc = "USB Host Transmit Interval Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txinterval4](txinterval4) module"]
1699pub type TXINTERVAL4 = crate::Reg<u8, _TXINTERVAL4>;
1700#[allow(missing_docs)]
1701#[doc(hidden)]
1702pub struct _TXINTERVAL4;
1703#[doc = "`read()` method returns [txinterval4::R](txinterval4::R) reader structure"]
1704impl crate::Readable for TXINTERVAL4 {}
1705#[doc = "`write(|w| ..)` method takes [txinterval4::W](txinterval4::W) writer structure"]
1706impl crate::Writable for TXINTERVAL4 {}
1707#[doc = "USB Host Transmit Interval Endpoint 4"]
1708pub mod txinterval4;
1709#[doc = "USB Host Configure Receive Type Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxtype4](rxtype4) module"]
1710pub type RXTYPE4 = crate::Reg<u8, _RXTYPE4>;
1711#[allow(missing_docs)]
1712#[doc(hidden)]
1713pub struct _RXTYPE4;
1714#[doc = "`read()` method returns [rxtype4::R](rxtype4::R) reader structure"]
1715impl crate::Readable for RXTYPE4 {}
1716#[doc = "`write(|w| ..)` method takes [rxtype4::W](rxtype4::W) writer structure"]
1717impl crate::Writable for RXTYPE4 {}
1718#[doc = "USB Host Configure Receive Type Endpoint 4"]
1719pub mod rxtype4;
1720#[doc = "USB Host Receive Polling Interval Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxinterval4](rxinterval4) module"]
1721pub type RXINTERVAL4 = crate::Reg<u8, _RXINTERVAL4>;
1722#[allow(missing_docs)]
1723#[doc(hidden)]
1724pub struct _RXINTERVAL4;
1725#[doc = "`read()` method returns [rxinterval4::R](rxinterval4::R) reader structure"]
1726impl crate::Readable for RXINTERVAL4 {}
1727#[doc = "`write(|w| ..)` method takes [rxinterval4::W](rxinterval4::W) writer structure"]
1728impl crate::Writable for RXINTERVAL4 {}
1729#[doc = "USB Host Receive Polling Interval Endpoint 4"]
1730pub mod rxinterval4;
1731#[doc = "USB Maximum Transmit Data Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txmaxp5](txmaxp5) module"]
1732pub type TXMAXP5 = crate::Reg<u16, _TXMAXP5>;
1733#[allow(missing_docs)]
1734#[doc(hidden)]
1735pub struct _TXMAXP5;
1736#[doc = "`read()` method returns [txmaxp5::R](txmaxp5::R) reader structure"]
1737impl crate::Readable for TXMAXP5 {}
1738#[doc = "`write(|w| ..)` method takes [txmaxp5::W](txmaxp5::W) writer structure"]
1739impl crate::Writable for TXMAXP5 {}
1740#[doc = "USB Maximum Transmit Data Endpoint 5"]
1741pub mod txmaxp5;
1742#[doc = "USB Transmit Control and Status Endpoint 5 Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcsrl5](txcsrl5) module"]
1743pub type TXCSRL5 = crate::Reg<u8, _TXCSRL5>;
1744#[allow(missing_docs)]
1745#[doc(hidden)]
1746pub struct _TXCSRL5;
1747#[doc = "`read()` method returns [txcsrl5::R](txcsrl5::R) reader structure"]
1748impl crate::Readable for TXCSRL5 {}
1749#[doc = "`write(|w| ..)` method takes [txcsrl5::W](txcsrl5::W) writer structure"]
1750impl crate::Writable for TXCSRL5 {}
1751#[doc = "USB Transmit Control and Status Endpoint 5 Low"]
1752pub mod txcsrl5;
1753#[doc = "USB Transmit Control and Status Endpoint 5 High\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcsrh5](txcsrh5) module"]
1754pub type TXCSRH5 = crate::Reg<u8, _TXCSRH5>;
1755#[allow(missing_docs)]
1756#[doc(hidden)]
1757pub struct _TXCSRH5;
1758#[doc = "`read()` method returns [txcsrh5::R](txcsrh5::R) reader structure"]
1759impl crate::Readable for TXCSRH5 {}
1760#[doc = "`write(|w| ..)` method takes [txcsrh5::W](txcsrh5::W) writer structure"]
1761impl crate::Writable for TXCSRH5 {}
1762#[doc = "USB Transmit Control and Status Endpoint 5 High"]
1763pub mod txcsrh5;
1764#[doc = "USB Maximum Receive Data Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxmaxp5](rxmaxp5) module"]
1765pub type RXMAXP5 = crate::Reg<u16, _RXMAXP5>;
1766#[allow(missing_docs)]
1767#[doc(hidden)]
1768pub struct _RXMAXP5;
1769#[doc = "`read()` method returns [rxmaxp5::R](rxmaxp5::R) reader structure"]
1770impl crate::Readable for RXMAXP5 {}
1771#[doc = "`write(|w| ..)` method takes [rxmaxp5::W](rxmaxp5::W) writer structure"]
1772impl crate::Writable for RXMAXP5 {}
1773#[doc = "USB Maximum Receive Data Endpoint 5"]
1774pub mod rxmaxp5;
1775#[doc = "USB Receive Control and Status Endpoint 5 Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcsrl5](rxcsrl5) module"]
1776pub type RXCSRL5 = crate::Reg<u8, _RXCSRL5>;
1777#[allow(missing_docs)]
1778#[doc(hidden)]
1779pub struct _RXCSRL5;
1780#[doc = "`read()` method returns [rxcsrl5::R](rxcsrl5::R) reader structure"]
1781impl crate::Readable for RXCSRL5 {}
1782#[doc = "`write(|w| ..)` method takes [rxcsrl5::W](rxcsrl5::W) writer structure"]
1783impl crate::Writable for RXCSRL5 {}
1784#[doc = "USB Receive Control and Status Endpoint 5 Low"]
1785pub mod rxcsrl5;
1786#[doc = "USB Receive Control and Status Endpoint 5 High\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcsrh5](rxcsrh5) module"]
1787pub type RXCSRH5 = crate::Reg<u8, _RXCSRH5>;
1788#[allow(missing_docs)]
1789#[doc(hidden)]
1790pub struct _RXCSRH5;
1791#[doc = "`read()` method returns [rxcsrh5::R](rxcsrh5::R) reader structure"]
1792impl crate::Readable for RXCSRH5 {}
1793#[doc = "`write(|w| ..)` method takes [rxcsrh5::W](rxcsrh5::W) writer structure"]
1794impl crate::Writable for RXCSRH5 {}
1795#[doc = "USB Receive Control and Status Endpoint 5 High"]
1796pub mod rxcsrh5;
1797#[doc = "USB Receive Byte Count Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcount5](rxcount5) module"]
1798pub type RXCOUNT5 = crate::Reg<u16, _RXCOUNT5>;
1799#[allow(missing_docs)]
1800#[doc(hidden)]
1801pub struct _RXCOUNT5;
1802#[doc = "`read()` method returns [rxcount5::R](rxcount5::R) reader structure"]
1803impl crate::Readable for RXCOUNT5 {}
1804#[doc = "USB Receive Byte Count Endpoint 5"]
1805pub mod rxcount5;
1806#[doc = "USB Host Transmit Configure Type Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txtype5](txtype5) module"]
1807pub type TXTYPE5 = crate::Reg<u8, _TXTYPE5>;
1808#[allow(missing_docs)]
1809#[doc(hidden)]
1810pub struct _TXTYPE5;
1811#[doc = "`read()` method returns [txtype5::R](txtype5::R) reader structure"]
1812impl crate::Readable for TXTYPE5 {}
1813#[doc = "`write(|w| ..)` method takes [txtype5::W](txtype5::W) writer structure"]
1814impl crate::Writable for TXTYPE5 {}
1815#[doc = "USB Host Transmit Configure Type Endpoint 5"]
1816pub mod txtype5;
1817#[doc = "USB Host Transmit Interval Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txinterval5](txinterval5) module"]
1818pub type TXINTERVAL5 = crate::Reg<u8, _TXINTERVAL5>;
1819#[allow(missing_docs)]
1820#[doc(hidden)]
1821pub struct _TXINTERVAL5;
1822#[doc = "`read()` method returns [txinterval5::R](txinterval5::R) reader structure"]
1823impl crate::Readable for TXINTERVAL5 {}
1824#[doc = "`write(|w| ..)` method takes [txinterval5::W](txinterval5::W) writer structure"]
1825impl crate::Writable for TXINTERVAL5 {}
1826#[doc = "USB Host Transmit Interval Endpoint 5"]
1827pub mod txinterval5;
1828#[doc = "USB Host Configure Receive Type Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxtype5](rxtype5) module"]
1829pub type RXTYPE5 = crate::Reg<u8, _RXTYPE5>;
1830#[allow(missing_docs)]
1831#[doc(hidden)]
1832pub struct _RXTYPE5;
1833#[doc = "`read()` method returns [rxtype5::R](rxtype5::R) reader structure"]
1834impl crate::Readable for RXTYPE5 {}
1835#[doc = "`write(|w| ..)` method takes [rxtype5::W](rxtype5::W) writer structure"]
1836impl crate::Writable for RXTYPE5 {}
1837#[doc = "USB Host Configure Receive Type Endpoint 5"]
1838pub mod rxtype5;
1839#[doc = "USB Host Receive Polling Interval Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxinterval5](rxinterval5) module"]
1840pub type RXINTERVAL5 = crate::Reg<u8, _RXINTERVAL5>;
1841#[allow(missing_docs)]
1842#[doc(hidden)]
1843pub struct _RXINTERVAL5;
1844#[doc = "`read()` method returns [rxinterval5::R](rxinterval5::R) reader structure"]
1845impl crate::Readable for RXINTERVAL5 {}
1846#[doc = "`write(|w| ..)` method takes [rxinterval5::W](rxinterval5::W) writer structure"]
1847impl crate::Writable for RXINTERVAL5 {}
1848#[doc = "USB Host Receive Polling Interval Endpoint 5"]
1849pub mod rxinterval5;
1850#[doc = "USB Maximum Transmit Data Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txmaxp6](txmaxp6) module"]
1851pub type TXMAXP6 = crate::Reg<u16, _TXMAXP6>;
1852#[allow(missing_docs)]
1853#[doc(hidden)]
1854pub struct _TXMAXP6;
1855#[doc = "`read()` method returns [txmaxp6::R](txmaxp6::R) reader structure"]
1856impl crate::Readable for TXMAXP6 {}
1857#[doc = "`write(|w| ..)` method takes [txmaxp6::W](txmaxp6::W) writer structure"]
1858impl crate::Writable for TXMAXP6 {}
1859#[doc = "USB Maximum Transmit Data Endpoint 6"]
1860pub mod txmaxp6;
1861#[doc = "USB Transmit Control and Status Endpoint 6 Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcsrl6](txcsrl6) module"]
1862pub type TXCSRL6 = crate::Reg<u8, _TXCSRL6>;
1863#[allow(missing_docs)]
1864#[doc(hidden)]
1865pub struct _TXCSRL6;
1866#[doc = "`read()` method returns [txcsrl6::R](txcsrl6::R) reader structure"]
1867impl crate::Readable for TXCSRL6 {}
1868#[doc = "`write(|w| ..)` method takes [txcsrl6::W](txcsrl6::W) writer structure"]
1869impl crate::Writable for TXCSRL6 {}
1870#[doc = "USB Transmit Control and Status Endpoint 6 Low"]
1871pub mod txcsrl6;
1872#[doc = "USB Transmit Control and Status Endpoint 6 High\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcsrh6](txcsrh6) module"]
1873pub type TXCSRH6 = crate::Reg<u8, _TXCSRH6>;
1874#[allow(missing_docs)]
1875#[doc(hidden)]
1876pub struct _TXCSRH6;
1877#[doc = "`read()` method returns [txcsrh6::R](txcsrh6::R) reader structure"]
1878impl crate::Readable for TXCSRH6 {}
1879#[doc = "`write(|w| ..)` method takes [txcsrh6::W](txcsrh6::W) writer structure"]
1880impl crate::Writable for TXCSRH6 {}
1881#[doc = "USB Transmit Control and Status Endpoint 6 High"]
1882pub mod txcsrh6;
1883#[doc = "USB Maximum Receive Data Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxmaxp6](rxmaxp6) module"]
1884pub type RXMAXP6 = crate::Reg<u16, _RXMAXP6>;
1885#[allow(missing_docs)]
1886#[doc(hidden)]
1887pub struct _RXMAXP6;
1888#[doc = "`read()` method returns [rxmaxp6::R](rxmaxp6::R) reader structure"]
1889impl crate::Readable for RXMAXP6 {}
1890#[doc = "`write(|w| ..)` method takes [rxmaxp6::W](rxmaxp6::W) writer structure"]
1891impl crate::Writable for RXMAXP6 {}
1892#[doc = "USB Maximum Receive Data Endpoint 6"]
1893pub mod rxmaxp6;
1894#[doc = "USB Receive Control and Status Endpoint 6 Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcsrl6](rxcsrl6) module"]
1895pub type RXCSRL6 = crate::Reg<u8, _RXCSRL6>;
1896#[allow(missing_docs)]
1897#[doc(hidden)]
1898pub struct _RXCSRL6;
1899#[doc = "`read()` method returns [rxcsrl6::R](rxcsrl6::R) reader structure"]
1900impl crate::Readable for RXCSRL6 {}
1901#[doc = "`write(|w| ..)` method takes [rxcsrl6::W](rxcsrl6::W) writer structure"]
1902impl crate::Writable for RXCSRL6 {}
1903#[doc = "USB Receive Control and Status Endpoint 6 Low"]
1904pub mod rxcsrl6;
1905#[doc = "USB Receive Control and Status Endpoint 6 High\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcsrh6](rxcsrh6) module"]
1906pub type RXCSRH6 = crate::Reg<u8, _RXCSRH6>;
1907#[allow(missing_docs)]
1908#[doc(hidden)]
1909pub struct _RXCSRH6;
1910#[doc = "`read()` method returns [rxcsrh6::R](rxcsrh6::R) reader structure"]
1911impl crate::Readable for RXCSRH6 {}
1912#[doc = "`write(|w| ..)` method takes [rxcsrh6::W](rxcsrh6::W) writer structure"]
1913impl crate::Writable for RXCSRH6 {}
1914#[doc = "USB Receive Control and Status Endpoint 6 High"]
1915pub mod rxcsrh6;
1916#[doc = "USB Receive Byte Count Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcount6](rxcount6) module"]
1917pub type RXCOUNT6 = crate::Reg<u16, _RXCOUNT6>;
1918#[allow(missing_docs)]
1919#[doc(hidden)]
1920pub struct _RXCOUNT6;
1921#[doc = "`read()` method returns [rxcount6::R](rxcount6::R) reader structure"]
1922impl crate::Readable for RXCOUNT6 {}
1923#[doc = "USB Receive Byte Count Endpoint 6"]
1924pub mod rxcount6;
1925#[doc = "USB Host Transmit Configure Type Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txtype6](txtype6) module"]
1926pub type TXTYPE6 = crate::Reg<u8, _TXTYPE6>;
1927#[allow(missing_docs)]
1928#[doc(hidden)]
1929pub struct _TXTYPE6;
1930#[doc = "`read()` method returns [txtype6::R](txtype6::R) reader structure"]
1931impl crate::Readable for TXTYPE6 {}
1932#[doc = "`write(|w| ..)` method takes [txtype6::W](txtype6::W) writer structure"]
1933impl crate::Writable for TXTYPE6 {}
1934#[doc = "USB Host Transmit Configure Type Endpoint 6"]
1935pub mod txtype6;
1936#[doc = "USB Host Transmit Interval Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txinterval6](txinterval6) module"]
1937pub type TXINTERVAL6 = crate::Reg<u8, _TXINTERVAL6>;
1938#[allow(missing_docs)]
1939#[doc(hidden)]
1940pub struct _TXINTERVAL6;
1941#[doc = "`read()` method returns [txinterval6::R](txinterval6::R) reader structure"]
1942impl crate::Readable for TXINTERVAL6 {}
1943#[doc = "`write(|w| ..)` method takes [txinterval6::W](txinterval6::W) writer structure"]
1944impl crate::Writable for TXINTERVAL6 {}
1945#[doc = "USB Host Transmit Interval Endpoint 6"]
1946pub mod txinterval6;
1947#[doc = "USB Host Configure Receive Type Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxtype6](rxtype6) module"]
1948pub type RXTYPE6 = crate::Reg<u8, _RXTYPE6>;
1949#[allow(missing_docs)]
1950#[doc(hidden)]
1951pub struct _RXTYPE6;
1952#[doc = "`read()` method returns [rxtype6::R](rxtype6::R) reader structure"]
1953impl crate::Readable for RXTYPE6 {}
1954#[doc = "`write(|w| ..)` method takes [rxtype6::W](rxtype6::W) writer structure"]
1955impl crate::Writable for RXTYPE6 {}
1956#[doc = "USB Host Configure Receive Type Endpoint 6"]
1957pub mod rxtype6;
1958#[doc = "USB Host Receive Polling Interval Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxinterval6](rxinterval6) module"]
1959pub type RXINTERVAL6 = crate::Reg<u8, _RXINTERVAL6>;
1960#[allow(missing_docs)]
1961#[doc(hidden)]
1962pub struct _RXINTERVAL6;
1963#[doc = "`read()` method returns [rxinterval6::R](rxinterval6::R) reader structure"]
1964impl crate::Readable for RXINTERVAL6 {}
1965#[doc = "`write(|w| ..)` method takes [rxinterval6::W](rxinterval6::W) writer structure"]
1966impl crate::Writable for RXINTERVAL6 {}
1967#[doc = "USB Host Receive Polling Interval Endpoint 6"]
1968pub mod rxinterval6;
1969#[doc = "USB Maximum Transmit Data Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txmaxp7](txmaxp7) module"]
1970pub type TXMAXP7 = crate::Reg<u16, _TXMAXP7>;
1971#[allow(missing_docs)]
1972#[doc(hidden)]
1973pub struct _TXMAXP7;
1974#[doc = "`read()` method returns [txmaxp7::R](txmaxp7::R) reader structure"]
1975impl crate::Readable for TXMAXP7 {}
1976#[doc = "`write(|w| ..)` method takes [txmaxp7::W](txmaxp7::W) writer structure"]
1977impl crate::Writable for TXMAXP7 {}
1978#[doc = "USB Maximum Transmit Data Endpoint 7"]
1979pub mod txmaxp7;
1980#[doc = "USB Transmit Control and Status Endpoint 7 Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcsrl7](txcsrl7) module"]
1981pub type TXCSRL7 = crate::Reg<u8, _TXCSRL7>;
1982#[allow(missing_docs)]
1983#[doc(hidden)]
1984pub struct _TXCSRL7;
1985#[doc = "`read()` method returns [txcsrl7::R](txcsrl7::R) reader structure"]
1986impl crate::Readable for TXCSRL7 {}
1987#[doc = "`write(|w| ..)` method takes [txcsrl7::W](txcsrl7::W) writer structure"]
1988impl crate::Writable for TXCSRL7 {}
1989#[doc = "USB Transmit Control and Status Endpoint 7 Low"]
1990pub mod txcsrl7;
1991#[doc = "USB Transmit Control and Status Endpoint 7 High\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcsrh7](txcsrh7) module"]
1992pub type TXCSRH7 = crate::Reg<u8, _TXCSRH7>;
1993#[allow(missing_docs)]
1994#[doc(hidden)]
1995pub struct _TXCSRH7;
1996#[doc = "`read()` method returns [txcsrh7::R](txcsrh7::R) reader structure"]
1997impl crate::Readable for TXCSRH7 {}
1998#[doc = "`write(|w| ..)` method takes [txcsrh7::W](txcsrh7::W) writer structure"]
1999impl crate::Writable for TXCSRH7 {}
2000#[doc = "USB Transmit Control and Status Endpoint 7 High"]
2001pub mod txcsrh7;
2002#[doc = "USB Maximum Receive Data Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxmaxp7](rxmaxp7) module"]
2003pub type RXMAXP7 = crate::Reg<u16, _RXMAXP7>;
2004#[allow(missing_docs)]
2005#[doc(hidden)]
2006pub struct _RXMAXP7;
2007#[doc = "`read()` method returns [rxmaxp7::R](rxmaxp7::R) reader structure"]
2008impl crate::Readable for RXMAXP7 {}
2009#[doc = "`write(|w| ..)` method takes [rxmaxp7::W](rxmaxp7::W) writer structure"]
2010impl crate::Writable for RXMAXP7 {}
2011#[doc = "USB Maximum Receive Data Endpoint 7"]
2012pub mod rxmaxp7;
2013#[doc = "USB Receive Control and Status Endpoint 7 Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcsrl7](rxcsrl7) module"]
2014pub type RXCSRL7 = crate::Reg<u8, _RXCSRL7>;
2015#[allow(missing_docs)]
2016#[doc(hidden)]
2017pub struct _RXCSRL7;
2018#[doc = "`read()` method returns [rxcsrl7::R](rxcsrl7::R) reader structure"]
2019impl crate::Readable for RXCSRL7 {}
2020#[doc = "`write(|w| ..)` method takes [rxcsrl7::W](rxcsrl7::W) writer structure"]
2021impl crate::Writable for RXCSRL7 {}
2022#[doc = "USB Receive Control and Status Endpoint 7 Low"]
2023pub mod rxcsrl7;
2024#[doc = "USB Receive Control and Status Endpoint 7 High\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcsrh7](rxcsrh7) module"]
2025pub type RXCSRH7 = crate::Reg<u8, _RXCSRH7>;
2026#[allow(missing_docs)]
2027#[doc(hidden)]
2028pub struct _RXCSRH7;
2029#[doc = "`read()` method returns [rxcsrh7::R](rxcsrh7::R) reader structure"]
2030impl crate::Readable for RXCSRH7 {}
2031#[doc = "`write(|w| ..)` method takes [rxcsrh7::W](rxcsrh7::W) writer structure"]
2032impl crate::Writable for RXCSRH7 {}
2033#[doc = "USB Receive Control and Status Endpoint 7 High"]
2034pub mod rxcsrh7;
2035#[doc = "USB Receive Byte Count Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcount7](rxcount7) module"]
2036pub type RXCOUNT7 = crate::Reg<u16, _RXCOUNT7>;
2037#[allow(missing_docs)]
2038#[doc(hidden)]
2039pub struct _RXCOUNT7;
2040#[doc = "`read()` method returns [rxcount7::R](rxcount7::R) reader structure"]
2041impl crate::Readable for RXCOUNT7 {}
2042#[doc = "USB Receive Byte Count Endpoint 7"]
2043pub mod rxcount7;
2044#[doc = "USB Host Transmit Configure Type Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txtype7](txtype7) module"]
2045pub type TXTYPE7 = crate::Reg<u8, _TXTYPE7>;
2046#[allow(missing_docs)]
2047#[doc(hidden)]
2048pub struct _TXTYPE7;
2049#[doc = "`read()` method returns [txtype7::R](txtype7::R) reader structure"]
2050impl crate::Readable for TXTYPE7 {}
2051#[doc = "`write(|w| ..)` method takes [txtype7::W](txtype7::W) writer structure"]
2052impl crate::Writable for TXTYPE7 {}
2053#[doc = "USB Host Transmit Configure Type Endpoint 7"]
2054pub mod txtype7;
2055#[doc = "USB Host Transmit Interval Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txinterval7](txinterval7) module"]
2056pub type TXINTERVAL7 = crate::Reg<u8, _TXINTERVAL7>;
2057#[allow(missing_docs)]
2058#[doc(hidden)]
2059pub struct _TXINTERVAL7;
2060#[doc = "`read()` method returns [txinterval7::R](txinterval7::R) reader structure"]
2061impl crate::Readable for TXINTERVAL7 {}
2062#[doc = "`write(|w| ..)` method takes [txinterval7::W](txinterval7::W) writer structure"]
2063impl crate::Writable for TXINTERVAL7 {}
2064#[doc = "USB Host Transmit Interval Endpoint 7"]
2065pub mod txinterval7;
2066#[doc = "USB Host Configure Receive Type Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxtype7](rxtype7) module"]
2067pub type RXTYPE7 = crate::Reg<u8, _RXTYPE7>;
2068#[allow(missing_docs)]
2069#[doc(hidden)]
2070pub struct _RXTYPE7;
2071#[doc = "`read()` method returns [rxtype7::R](rxtype7::R) reader structure"]
2072impl crate::Readable for RXTYPE7 {}
2073#[doc = "`write(|w| ..)` method takes [rxtype7::W](rxtype7::W) writer structure"]
2074impl crate::Writable for RXTYPE7 {}
2075#[doc = "USB Host Configure Receive Type Endpoint 7"]
2076pub mod rxtype7;
2077#[doc = "USB Host Receive Polling Interval Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxinterval7](rxinterval7) module"]
2078pub type RXINTERVAL7 = crate::Reg<u8, _RXINTERVAL7>;
2079#[allow(missing_docs)]
2080#[doc(hidden)]
2081pub struct _RXINTERVAL7;
2082#[doc = "`read()` method returns [rxinterval7::R](rxinterval7::R) reader structure"]
2083impl crate::Readable for RXINTERVAL7 {}
2084#[doc = "`write(|w| ..)` method takes [rxinterval7::W](rxinterval7::W) writer structure"]
2085impl crate::Writable for RXINTERVAL7 {}
2086#[doc = "USB Host Receive Polling Interval Endpoint 7"]
2087pub mod rxinterval7;
2088#[doc = "USB Request Packet Count in Block Transfer Endpoint 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rqpktcount1](rqpktcount1) module"]
2089pub type RQPKTCOUNT1 = crate::Reg<u16, _RQPKTCOUNT1>;
2090#[allow(missing_docs)]
2091#[doc(hidden)]
2092pub struct _RQPKTCOUNT1;
2093#[doc = "`read()` method returns [rqpktcount1::R](rqpktcount1::R) reader structure"]
2094impl crate::Readable for RQPKTCOUNT1 {}
2095#[doc = "`write(|w| ..)` method takes [rqpktcount1::W](rqpktcount1::W) writer structure"]
2096impl crate::Writable for RQPKTCOUNT1 {}
2097#[doc = "USB Request Packet Count in Block Transfer Endpoint 1"]
2098pub mod rqpktcount1;
2099#[doc = "USB Request Packet Count in Block Transfer Endpoint 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rqpktcount2](rqpktcount2) module"]
2100pub type RQPKTCOUNT2 = crate::Reg<u16, _RQPKTCOUNT2>;
2101#[allow(missing_docs)]
2102#[doc(hidden)]
2103pub struct _RQPKTCOUNT2;
2104#[doc = "`read()` method returns [rqpktcount2::R](rqpktcount2::R) reader structure"]
2105impl crate::Readable for RQPKTCOUNT2 {}
2106#[doc = "`write(|w| ..)` method takes [rqpktcount2::W](rqpktcount2::W) writer structure"]
2107impl crate::Writable for RQPKTCOUNT2 {}
2108#[doc = "USB Request Packet Count in Block Transfer Endpoint 2"]
2109pub mod rqpktcount2;
2110#[doc = "USB Request Packet Count in Block Transfer Endpoint 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rqpktcount3](rqpktcount3) module"]
2111pub type RQPKTCOUNT3 = crate::Reg<u16, _RQPKTCOUNT3>;
2112#[allow(missing_docs)]
2113#[doc(hidden)]
2114pub struct _RQPKTCOUNT3;
2115#[doc = "`read()` method returns [rqpktcount3::R](rqpktcount3::R) reader structure"]
2116impl crate::Readable for RQPKTCOUNT3 {}
2117#[doc = "`write(|w| ..)` method takes [rqpktcount3::W](rqpktcount3::W) writer structure"]
2118impl crate::Writable for RQPKTCOUNT3 {}
2119#[doc = "USB Request Packet Count in Block Transfer Endpoint 3"]
2120pub mod rqpktcount3;
2121#[doc = "USB Request Packet Count in Block Transfer Endpoint 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rqpktcount4](rqpktcount4) module"]
2122pub type RQPKTCOUNT4 = crate::Reg<u16, _RQPKTCOUNT4>;
2123#[allow(missing_docs)]
2124#[doc(hidden)]
2125pub struct _RQPKTCOUNT4;
2126#[doc = "`read()` method returns [rqpktcount4::R](rqpktcount4::R) reader structure"]
2127impl crate::Readable for RQPKTCOUNT4 {}
2128#[doc = "`write(|w| ..)` method takes [rqpktcount4::W](rqpktcount4::W) writer structure"]
2129impl crate::Writable for RQPKTCOUNT4 {}
2130#[doc = "USB Request Packet Count in Block Transfer Endpoint 4"]
2131pub mod rqpktcount4;
2132#[doc = "USB Request Packet Count in Block Transfer Endpoint 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rqpktcount5](rqpktcount5) module"]
2133pub type RQPKTCOUNT5 = crate::Reg<u16, _RQPKTCOUNT5>;
2134#[allow(missing_docs)]
2135#[doc(hidden)]
2136pub struct _RQPKTCOUNT5;
2137#[doc = "`read()` method returns [rqpktcount5::R](rqpktcount5::R) reader structure"]
2138impl crate::Readable for RQPKTCOUNT5 {}
2139#[doc = "`write(|w| ..)` method takes [rqpktcount5::W](rqpktcount5::W) writer structure"]
2140impl crate::Writable for RQPKTCOUNT5 {}
2141#[doc = "USB Request Packet Count in Block Transfer Endpoint 5"]
2142pub mod rqpktcount5;
2143#[doc = "USB Request Packet Count in Block Transfer Endpoint 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rqpktcount6](rqpktcount6) module"]
2144pub type RQPKTCOUNT6 = crate::Reg<u16, _RQPKTCOUNT6>;
2145#[allow(missing_docs)]
2146#[doc(hidden)]
2147pub struct _RQPKTCOUNT6;
2148#[doc = "`read()` method returns [rqpktcount6::R](rqpktcount6::R) reader structure"]
2149impl crate::Readable for RQPKTCOUNT6 {}
2150#[doc = "`write(|w| ..)` method takes [rqpktcount6::W](rqpktcount6::W) writer structure"]
2151impl crate::Writable for RQPKTCOUNT6 {}
2152#[doc = "USB Request Packet Count in Block Transfer Endpoint 6"]
2153pub mod rqpktcount6;
2154#[doc = "USB Request Packet Count in Block Transfer Endpoint 7\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rqpktcount7](rqpktcount7) module"]
2155pub type RQPKTCOUNT7 = crate::Reg<u16, _RQPKTCOUNT7>;
2156#[allow(missing_docs)]
2157#[doc(hidden)]
2158pub struct _RQPKTCOUNT7;
2159#[doc = "`read()` method returns [rqpktcount7::R](rqpktcount7::R) reader structure"]
2160impl crate::Readable for RQPKTCOUNT7 {}
2161#[doc = "`write(|w| ..)` method takes [rqpktcount7::W](rqpktcount7::W) writer structure"]
2162impl crate::Writable for RQPKTCOUNT7 {}
2163#[doc = "USB Request Packet Count in Block Transfer Endpoint 7"]
2164pub mod rqpktcount7;
2165#[doc = "USB Receive Double Packet Buffer Disable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdpktbufdis](rxdpktbufdis) module"]
2166pub type RXDPKTBUFDIS = crate::Reg<u16, _RXDPKTBUFDIS>;
2167#[allow(missing_docs)]
2168#[doc(hidden)]
2169pub struct _RXDPKTBUFDIS;
2170#[doc = "`read()` method returns [rxdpktbufdis::R](rxdpktbufdis::R) reader structure"]
2171impl crate::Readable for RXDPKTBUFDIS {}
2172#[doc = "`write(|w| ..)` method takes [rxdpktbufdis::W](rxdpktbufdis::W) writer structure"]
2173impl crate::Writable for RXDPKTBUFDIS {}
2174#[doc = "USB Receive Double Packet Buffer Disable"]
2175pub mod rxdpktbufdis;
2176#[doc = "USB Transmit Double Packet Buffer Disable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdpktbufdis](txdpktbufdis) module"]
2177pub type TXDPKTBUFDIS = crate::Reg<u16, _TXDPKTBUFDIS>;
2178#[allow(missing_docs)]
2179#[doc(hidden)]
2180pub struct _TXDPKTBUFDIS;
2181#[doc = "`read()` method returns [txdpktbufdis::R](txdpktbufdis::R) reader structure"]
2182impl crate::Readable for TXDPKTBUFDIS {}
2183#[doc = "`write(|w| ..)` method takes [txdpktbufdis::W](txdpktbufdis::W) writer structure"]
2184impl crate::Writable for TXDPKTBUFDIS {}
2185#[doc = "USB Transmit Double Packet Buffer Disable"]
2186pub mod txdpktbufdis;
2187#[doc = "USB External Power Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [epc](epc) module"]
2188pub type EPC = crate::Reg<u32, _EPC>;
2189#[allow(missing_docs)]
2190#[doc(hidden)]
2191pub struct _EPC;
2192#[doc = "`read()` method returns [epc::R](epc::R) reader structure"]
2193impl crate::Readable for EPC {}
2194#[doc = "`write(|w| ..)` method takes [epc::W](epc::W) writer structure"]
2195impl crate::Writable for EPC {}
2196#[doc = "USB External Power Control"]
2197pub mod epc;
2198#[doc = "USB External Power Control Raw Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [epcris](epcris) module"]
2199pub type EPCRIS = crate::Reg<u32, _EPCRIS>;
2200#[allow(missing_docs)]
2201#[doc(hidden)]
2202pub struct _EPCRIS;
2203#[doc = "`read()` method returns [epcris::R](epcris::R) reader structure"]
2204impl crate::Readable for EPCRIS {}
2205#[doc = "USB External Power Control Raw Interrupt Status"]
2206pub mod epcris;
2207#[doc = "USB External Power Control Interrupt Mask\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [epcim](epcim) module"]
2208pub type EPCIM = crate::Reg<u32, _EPCIM>;
2209#[allow(missing_docs)]
2210#[doc(hidden)]
2211pub struct _EPCIM;
2212#[doc = "`read()` method returns [epcim::R](epcim::R) reader structure"]
2213impl crate::Readable for EPCIM {}
2214#[doc = "`write(|w| ..)` method takes [epcim::W](epcim::W) writer structure"]
2215impl crate::Writable for EPCIM {}
2216#[doc = "USB External Power Control Interrupt Mask"]
2217pub mod epcim;
2218#[doc = "USB External Power Control Interrupt Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [epcisc](epcisc) module"]
2219pub type EPCISC = crate::Reg<u32, _EPCISC>;
2220#[allow(missing_docs)]
2221#[doc(hidden)]
2222pub struct _EPCISC;
2223#[doc = "`read()` method returns [epcisc::R](epcisc::R) reader structure"]
2224impl crate::Readable for EPCISC {}
2225#[doc = "`write(|w| ..)` method takes [epcisc::W](epcisc::W) writer structure"]
2226impl crate::Writable for EPCISC {}
2227#[doc = "USB External Power Control Interrupt Status and Clear"]
2228pub mod epcisc;
2229#[doc = "USB Device RESUME Raw Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [drris](drris) module"]
2230pub type DRRIS = crate::Reg<u32, _DRRIS>;
2231#[allow(missing_docs)]
2232#[doc(hidden)]
2233pub struct _DRRIS;
2234#[doc = "`read()` method returns [drris::R](drris::R) reader structure"]
2235impl crate::Readable for DRRIS {}
2236#[doc = "USB Device RESUME Raw Interrupt Status"]
2237pub mod drris;
2238#[doc = "USB Device RESUME Interrupt Mask\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [drim](drim) module"]
2239pub type DRIM = crate::Reg<u32, _DRIM>;
2240#[allow(missing_docs)]
2241#[doc(hidden)]
2242pub struct _DRIM;
2243#[doc = "`read()` method returns [drim::R](drim::R) reader structure"]
2244impl crate::Readable for DRIM {}
2245#[doc = "`write(|w| ..)` method takes [drim::W](drim::W) writer structure"]
2246impl crate::Writable for DRIM {}
2247#[doc = "USB Device RESUME Interrupt Mask"]
2248pub mod drim;
2249#[doc = "USB Device RESUME Interrupt Status and Clear\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [drisc](drisc) module"]
2250pub type DRISC = crate::Reg<u32, _DRISC>;
2251#[allow(missing_docs)]
2252#[doc(hidden)]
2253pub struct _DRISC;
2254#[doc = "`write(|w| ..)` method takes [drisc::W](drisc::W) writer structure"]
2255impl crate::Writable for DRISC {}
2256#[doc = "USB Device RESUME Interrupt Status and Clear"]
2257pub mod drisc;
2258#[doc = "USB General-Purpose Control and Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gpcs](gpcs) module"]
2259pub type GPCS = crate::Reg<u32, _GPCS>;
2260#[allow(missing_docs)]
2261#[doc(hidden)]
2262pub struct _GPCS;
2263#[doc = "`read()` method returns [gpcs::R](gpcs::R) reader structure"]
2264impl crate::Readable for GPCS {}
2265#[doc = "`write(|w| ..)` method takes [gpcs::W](gpcs::W) writer structure"]
2266impl crate::Writable for GPCS {}
2267#[doc = "USB General-Purpose Control and Status"]
2268pub mod gpcs;
2269#[doc = "USB VBUS Droop Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vdc](vdc) module"]
2270pub type VDC = crate::Reg<u32, _VDC>;
2271#[allow(missing_docs)]
2272#[doc(hidden)]
2273pub struct _VDC;
2274#[doc = "`read()` method returns [vdc::R](vdc::R) reader structure"]
2275impl crate::Readable for VDC {}
2276#[doc = "`write(|w| ..)` method takes [vdc::W](vdc::W) writer structure"]
2277impl crate::Writable for VDC {}
2278#[doc = "USB VBUS Droop Control"]
2279pub mod vdc;
2280#[doc = "USB VBUS Droop Control Raw Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vdcris](vdcris) module"]
2281pub type VDCRIS = crate::Reg<u32, _VDCRIS>;
2282#[allow(missing_docs)]
2283#[doc(hidden)]
2284pub struct _VDCRIS;
2285#[doc = "`read()` method returns [vdcris::R](vdcris::R) reader structure"]
2286impl crate::Readable for VDCRIS {}
2287#[doc = "USB VBUS Droop Control Raw Interrupt Status"]
2288pub mod vdcris;
2289#[doc = "USB VBUS Droop Control Interrupt Mask\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vdcim](vdcim) module"]
2290pub type VDCIM = crate::Reg<u32, _VDCIM>;
2291#[allow(missing_docs)]
2292#[doc(hidden)]
2293pub struct _VDCIM;
2294#[doc = "`read()` method returns [vdcim::R](vdcim::R) reader structure"]
2295impl crate::Readable for VDCIM {}
2296#[doc = "`write(|w| ..)` method takes [vdcim::W](vdcim::W) writer structure"]
2297impl crate::Writable for VDCIM {}
2298#[doc = "USB VBUS Droop Control Interrupt Mask"]
2299pub mod vdcim;
2300#[doc = "USB VBUS Droop Control Interrupt Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vdcisc](vdcisc) module"]
2301pub type VDCISC = crate::Reg<u32, _VDCISC>;
2302#[allow(missing_docs)]
2303#[doc(hidden)]
2304pub struct _VDCISC;
2305#[doc = "`read()` method returns [vdcisc::R](vdcisc::R) reader structure"]
2306impl crate::Readable for VDCISC {}
2307#[doc = "`write(|w| ..)` method takes [vdcisc::W](vdcisc::W) writer structure"]
2308impl crate::Writable for VDCISC {}
2309#[doc = "USB VBUS Droop Control Interrupt Status and Clear"]
2310pub mod vdcisc;
2311#[doc = "USB ID Valid Detect Raw Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idvris](idvris) module"]
2312pub type IDVRIS = crate::Reg<u32, _IDVRIS>;
2313#[allow(missing_docs)]
2314#[doc(hidden)]
2315pub struct _IDVRIS;
2316#[doc = "`read()` method returns [idvris::R](idvris::R) reader structure"]
2317impl crate::Readable for IDVRIS {}
2318#[doc = "USB ID Valid Detect Raw Interrupt Status"]
2319pub mod idvris;
2320#[doc = "USB ID Valid Detect Interrupt Mask\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idvim](idvim) module"]
2321pub type IDVIM = crate::Reg<u32, _IDVIM>;
2322#[allow(missing_docs)]
2323#[doc(hidden)]
2324pub struct _IDVIM;
2325#[doc = "`read()` method returns [idvim::R](idvim::R) reader structure"]
2326impl crate::Readable for IDVIM {}
2327#[doc = "`write(|w| ..)` method takes [idvim::W](idvim::W) writer structure"]
2328impl crate::Writable for IDVIM {}
2329#[doc = "USB ID Valid Detect Interrupt Mask"]
2330pub mod idvim;
2331#[doc = "USB ID Valid Detect Interrupt Status and Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idvisc](idvisc) module"]
2332pub type IDVISC = crate::Reg<u32, _IDVISC>;
2333#[allow(missing_docs)]
2334#[doc(hidden)]
2335pub struct _IDVISC;
2336#[doc = "`read()` method returns [idvisc::R](idvisc::R) reader structure"]
2337impl crate::Readable for IDVISC {}
2338#[doc = "`write(|w| ..)` method takes [idvisc::W](idvisc::W) writer structure"]
2339impl crate::Writable for IDVISC {}
2340#[doc = "USB ID Valid Detect Interrupt Status and Clear"]
2341pub mod idvisc;
2342#[doc = "USB DMA Select\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmasel](dmasel) module"]
2343pub type DMASEL = crate::Reg<u32, _DMASEL>;
2344#[allow(missing_docs)]
2345#[doc(hidden)]
2346pub struct _DMASEL;
2347#[doc = "`read()` method returns [dmasel::R](dmasel::R) reader structure"]
2348impl crate::Readable for DMASEL {}
2349#[doc = "`write(|w| ..)` method takes [dmasel::W](dmasel::W) writer structure"]
2350impl crate::Writable for DMASEL {}
2351#[doc = "USB DMA Select"]
2352pub mod dmasel;
2353#[doc = "USB Peripheral Properties\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pp](pp) module"]
2354pub type PP = crate::Reg<u32, _PP>;
2355#[allow(missing_docs)]
2356#[doc(hidden)]
2357pub struct _PP;
2358#[doc = "`read()` method returns [pp::R](pp::R) reader structure"]
2359impl crate::Readable for PP {}
2360#[doc = "USB Peripheral Properties"]
2361pub mod pp;