Struct tm4c123x::adc0::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub actss: ACTSS,
    pub ris: RIS,
    pub im: IM,
    pub isc: ISC,
    pub ostat: OSTAT,
    pub emux: EMUX,
    pub ustat: USTAT,
    pub tssel: TSSEL,
    pub sspri: SSPRI,
    pub spc: SPC,
    pub pssi: PSSI,
    pub sac: SAC,
    pub dcisc: DCISC,
    pub ctl: CTL,
    pub ssmux0: SSMUX0,
    pub ssctl0: SSCTL0,
    pub ssfifo0: SSFIFO0,
    pub ssfstat0: SSFSTAT0,
    pub ssop0: SSOP0,
    pub ssdc0: SSDC0,
    pub ssmux1: SSMUX1,
    pub ssctl1: SSCTL1,
    pub ssfifo1: SSFIFO1,
    pub ssfstat1: SSFSTAT1,
    pub ssop1: SSOP1,
    pub ssdc1: SSDC1,
    pub ssmux2: SSMUX2,
    pub ssctl2: SSCTL2,
    pub ssfifo2: SSFIFO2,
    pub ssfstat2: SSFSTAT2,
    pub ssop2: SSOP2,
    pub ssdc2: SSDC2,
    pub ssmux3: SSMUX3,
    pub ssctl3: SSCTL3,
    pub ssfifo3: SSFIFO3,
    pub ssfstat3: SSFSTAT3,
    pub ssop3: SSOP3,
    pub ssdc3: SSDC3,
    pub dcric: DCRIC,
    pub dcctl0: DCCTL0,
    pub dcctl1: DCCTL1,
    pub dcctl2: DCCTL2,
    pub dcctl3: DCCTL3,
    pub dcctl4: DCCTL4,
    pub dcctl5: DCCTL5,
    pub dcctl6: DCCTL6,
    pub dcctl7: DCCTL7,
    pub dccmp0: DCCMP0,
    pub dccmp1: DCCMP1,
    pub dccmp2: DCCMP2,
    pub dccmp3: DCCMP3,
    pub dccmp4: DCCMP4,
    pub dccmp5: DCCMP5,
    pub dccmp6: DCCMP6,
    pub dccmp7: DCCMP7,
    pub pp: PP,
    pub pc: PC,
    pub cc: CC,
    // some fields omitted
}

Register block

Fields

actss: ACTSS

0x00 - ADC Active Sample Sequencer

ris: RIS

0x04 - ADC Raw Interrupt Status

im: IM

0x08 - ADC Interrupt Mask

isc: ISC

0x0c - ADC Interrupt Status and Clear

ostat: OSTAT

0x10 - ADC Overflow Status

emux: EMUX

0x14 - ADC Event Multiplexer Select

ustat: USTAT

0x18 - ADC Underflow Status

tssel: TSSEL

0x1c - ADC Trigger Source Select

sspri: SSPRI

0x20 - ADC Sample Sequencer Priority

spc: SPC

0x24 - ADC Sample Phase Control

pssi: PSSI

0x28 - ADC Processor Sample Sequence Initiate

sac: SAC

0x30 - ADC Sample Averaging Control

dcisc: DCISC

0x34 - ADC Digital Comparator Interrupt Status and Clear

ctl: CTL

0x38 - ADC Control

ssmux0: SSMUX0

0x40 - ADC Sample Sequence Input Multiplexer Select 0

ssctl0: SSCTL0

0x44 - ADC Sample Sequence Control 0

ssfifo0: SSFIFO0

0x48 - ADC Sample Sequence Result FIFO 0

ssfstat0: SSFSTAT0

0x4c - ADC Sample Sequence FIFO 0 Status

ssop0: SSOP0

0x50 - ADC Sample Sequence 0 Operation

ssdc0: SSDC0

0x54 - ADC Sample Sequence 0 Digital Comparator Select

ssmux1: SSMUX1

0x60 - ADC Sample Sequence Input Multiplexer Select 1

ssctl1: SSCTL1

0x64 - ADC Sample Sequence Control 1

ssfifo1: SSFIFO1

0x68 - ADC Sample Sequence Result FIFO 1

ssfstat1: SSFSTAT1

0x6c - ADC Sample Sequence FIFO 1 Status

ssop1: SSOP1

0x70 - ADC Sample Sequence 1 Operation

ssdc1: SSDC1

0x74 - ADC Sample Sequence 1 Digital Comparator Select

ssmux2: SSMUX2

0x80 - ADC Sample Sequence Input Multiplexer Select 2

ssctl2: SSCTL2

0x84 - ADC Sample Sequence Control 2

ssfifo2: SSFIFO2

0x88 - ADC Sample Sequence Result FIFO 2

ssfstat2: SSFSTAT2

0x8c - ADC Sample Sequence FIFO 2 Status

ssop2: SSOP2

0x90 - ADC Sample Sequence 2 Operation

ssdc2: SSDC2

0x94 - ADC Sample Sequence 2 Digital Comparator Select

ssmux3: SSMUX3

0xa0 - ADC Sample Sequence Input Multiplexer Select 3

ssctl3: SSCTL3

0xa4 - ADC Sample Sequence Control 3

ssfifo3: SSFIFO3

0xa8 - ADC Sample Sequence Result FIFO 3

ssfstat3: SSFSTAT3

0xac - ADC Sample Sequence FIFO 3 Status

ssop3: SSOP3

0xb0 - ADC Sample Sequence 3 Operation

ssdc3: SSDC3

0xb4 - ADC Sample Sequence 3 Digital Comparator Select

dcric: DCRIC

0xd00 - ADC Digital Comparator Reset Initial Conditions

dcctl0: DCCTL0

0xe00 - ADC Digital Comparator Control 0

dcctl1: DCCTL1

0xe04 - ADC Digital Comparator Control 1

dcctl2: DCCTL2

0xe08 - ADC Digital Comparator Control 2

dcctl3: DCCTL3

0xe0c - ADC Digital Comparator Control 3

dcctl4: DCCTL4

0xe10 - ADC Digital Comparator Control 4

dcctl5: DCCTL5

0xe14 - ADC Digital Comparator Control 5

dcctl6: DCCTL6

0xe18 - ADC Digital Comparator Control 6

dcctl7: DCCTL7

0xe1c - ADC Digital Comparator Control 7

dccmp0: DCCMP0

0xe40 - ADC Digital Comparator Range 0

dccmp1: DCCMP1

0xe44 - ADC Digital Comparator Range 1

dccmp2: DCCMP2

0xe48 - ADC Digital Comparator Range 2

dccmp3: DCCMP3

0xe4c - ADC Digital Comparator Range 3

dccmp4: DCCMP4

0xe50 - ADC Digital Comparator Range 4

dccmp5: DCCMP5

0xe54 - ADC Digital Comparator Range 5

dccmp6: DCCMP6

0xe58 - ADC Digital Comparator Range 6

dccmp7: DCCMP7

0xe5c - ADC Digital Comparator Range 7

pp: PP

0xfc0 - ADC Peripheral Properties

pc: PC

0xfc4 - ADC Peripheral Configuration

cc: CC

0xfc8 - ADC Clock Configuration

Trait Implementations