svd-generator 0.4.2

Converts device information from flattened device tree into an SVD description
Documentation 
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use crate::svd::register::{
    create_bit_range, create_cluster, create_field, create_register, create_register_properties,
};
use crate::Result;

/// Creates ARM PL080 DMA Controller Peripheral ID registers.
pub fn create() -> Result<svd::RegisterCluster> {
    Ok(svd::RegisterCluster::Cluster(create_cluster(
        "periph_id",
        "DMAC Peripheral ID registers - You can treat the registers conceptually as a 32-bit register. These read-only registers provide the following peripheral options :: PartNumber[11:0] This identifies the peripheral. The three digit product code 0x080 is used. :: Designer ID[19:12] This is the identification of the designer. ARM Limited is 0x41, (ASCII A). :: Revision[23:20] This is the revision number of the peripheral. The revision number starts from 0. :: Configuration[31:24] This is the configuration option of the peripheral.",
        0xfe0,
        &[
            svd::RegisterCluster::Register(create_register(
                "periph_id0",
                "DMA Peripheral ID 0 register - is hard-coded and the fields in the register determine the reset value.",
                0x0,
                create_register_properties(32, 0x80)?,
                Some(&[
                    create_field(
                        "part_number0",
                        "These bits read back as 0x80",
                        create_bit_range("[7:0]")?,
                        svd::Access::ReadOnly,
                        None,
                    )?,
                ]),
                None,
            )?),
            svd::RegisterCluster::Register(create_register(
                "periph_id1",
                "DMA Peripheral ID 1 register - is hard-coded and the fields in the register determine the reset value.",
                0x4,
                create_register_properties(32, 0x10)?,
                Some(&[
                    create_field(
                        "part_number1",
                        "These bits read back as 0x0",
                        create_bit_range("[3:0]")?,
                        svd::Access::ReadOnly,
                        None,
                    )?,
                    create_field(
                        "designer0",
                        "These bits read back as 0x1",
                        create_bit_range("[7:4]")?,
                        svd::Access::ReadOnly,
                        None,
                    )?,
                ]),
                None,
            )?),
            svd::RegisterCluster::Register(create_register(
                "periph_id2",
                "DMA Peripheral ID 2 register - is hard-coded and the fields in the register determine the reset value.",
                0x8,
                create_register_properties(32, 0x14)?,
                Some(&[
                    create_field(
                        "designer1",
                        "These bits read back as 0x4",
                        create_bit_range("[3:0]")?,
                        svd::Access::ReadOnly,
                        None,
                    )?,
                    create_field(
                        "revision",
                        "These bits read back as 0x1",
                        create_bit_range("[7:4]")?,
                        svd::Access::ReadOnly,
                        None,
                    )?,
                ]),
                None,
            )?),
            svd::RegisterCluster::Register(create_register(
                "periph_id3",
                "DMA Peripheral ID 3 register - is hard-coded and the fields in the register determine the reset value.",
                0xc,
                create_register_properties(32, 0x6)?,
                Some(&[
                    create_field(
                        "num_chan",
                        "Indicates the number of channels - 0b000: 2 channels, 0b001: 4 channels, 0b010: 8 channels, 0b011: 16 channels, 0b100: 32 channels. This peripheral is set to 0b010.",
                        create_bit_range("[2:0]")?,
                        svd::Access::ReadOnly,
                        None,
                    )?,
                    create_field(
                        "num_ahb",
                        "Indicates the number of AHB masters - 0: one AHB interface, 1: two AHB interface",
                        create_bit_range("[3:3]")?,
                        svd::Access::ReadOnly,
                        None,
                    )?,
                    create_field(
                        "ahb_bus_width",
                        "Indicates the AHB bus width - 0b000: 32-bit, 0b001: 64-bit, 0b010: 128-bit, 0b011: 256-bit, 0b100: 512-bit, 0b101: 1024-bit. This peripheral is set to 0b000.",
                        create_bit_range("[6:4]")?,
                        svd::Access::ReadOnly,
                        None,
                    )?,
                    create_field(
                        "num_src_req",
                        "Indicates the number of DMA source requestors for the DMAC configuration - 0: 16 DMA requestors, 1: 32 DMA requestors. This peripheral is set to 0.",
                        create_bit_range("[7:7]")?,
                        svd::Access::ReadOnly,
                        None,
                    )?,
                ]),
                None,
            )?),
        ],
        None,
    )?))
}