#[doc = "Register `ACR` reader"]
pub struct R(crate::R<ACR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<ACR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<ACR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<ACR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `ACR` writer"]
pub struct W(crate::W<ACR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<ACR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<ACR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<ACR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `LATENCY` reader - Latency"]
pub struct LATENCY_R(crate::FieldReader<u8, u8>);
impl LATENCY_R {
pub(crate) fn new(bits: u8) -> Self {
LATENCY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for LATENCY_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `LATENCY` writer - Latency"]
pub struct LATENCY_W<'a> {
w: &'a mut W,
}
impl<'a> LATENCY_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07);
self.w
}
}
#[doc = "Field `PRFTEN` reader - Prefetch enable"]
pub struct PRFTEN_R(crate::FieldReader<bool, bool>);
impl PRFTEN_R {
pub(crate) fn new(bits: bool) -> Self {
PRFTEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for PRFTEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `PRFTEN` writer - Prefetch enable"]
pub struct PRFTEN_W<'a> {
w: &'a mut W,
}
impl<'a> PRFTEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
self.w
}
}
#[doc = "Field `ICEN` reader - Instruction cache enable"]
pub struct ICEN_R(crate::FieldReader<bool, bool>);
impl ICEN_R {
pub(crate) fn new(bits: bool) -> Self {
ICEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for ICEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `ICEN` writer - Instruction cache enable"]
pub struct ICEN_W<'a> {
w: &'a mut W,
}
impl<'a> ICEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
self.w
}
}
#[doc = "Field `DCEN` reader - Data cache enable"]
pub struct DCEN_R(crate::FieldReader<bool, bool>);
impl DCEN_R {
pub(crate) fn new(bits: bool) -> Self {
DCEN_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for DCEN_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `DCEN` writer - Data cache enable"]
pub struct DCEN_W<'a> {
w: &'a mut W,
}
impl<'a> DCEN_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
self.w
}
}
#[doc = "Field `ICRST` reader - Instruction cache reset"]
pub struct ICRST_R(crate::FieldReader<bool, bool>);
impl ICRST_R {
pub(crate) fn new(bits: bool) -> Self {
ICRST_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for ICRST_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `ICRST` writer - Instruction cache reset"]
pub struct ICRST_W<'a> {
w: &'a mut W,
}
impl<'a> ICRST_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
self.w
}
}
#[doc = "Field `DCRST` reader - Data cache reset"]
pub struct DCRST_R(crate::FieldReader<bool, bool>);
impl DCRST_R {
pub(crate) fn new(bits: bool) -> Self {
DCRST_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for DCRST_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `DCRST` writer - Data cache reset"]
pub struct DCRST_W<'a> {
w: &'a mut W,
}
impl<'a> DCRST_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
self.w
}
}
#[doc = "Field `PES` reader - CPU1 CortexM4 program erase suspend request"]
pub struct PES_R(crate::FieldReader<bool, bool>);
impl PES_R {
pub(crate) fn new(bits: bool) -> Self {
PES_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for PES_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `PES` writer - CPU1 CortexM4 program erase suspend request"]
pub struct PES_W<'a> {
w: &'a mut W,
}
impl<'a> PES_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
self.w
}
}
#[doc = "Field `EMPTY` reader - Flash User area empty"]
pub struct EMPTY_R(crate::FieldReader<bool, bool>);
impl EMPTY_R {
pub(crate) fn new(bits: bool) -> Self {
EMPTY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for EMPTY_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `EMPTY` writer - Flash User area empty"]
pub struct EMPTY_W<'a> {
w: &'a mut W,
}
impl<'a> EMPTY_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
self.w
}
}
impl R {
#[doc = "Bits 0:2 - Latency"]
#[inline(always)]
pub fn latency(&self) -> LATENCY_R {
LATENCY_R::new((self.bits & 0x07) as u8)
}
#[doc = "Bit 8 - Prefetch enable"]
#[inline(always)]
pub fn prften(&self) -> PRFTEN_R {
PRFTEN_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 9 - Instruction cache enable"]
#[inline(always)]
pub fn icen(&self) -> ICEN_R {
ICEN_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 10 - Data cache enable"]
#[inline(always)]
pub fn dcen(&self) -> DCEN_R {
DCEN_R::new(((self.bits >> 10) & 0x01) != 0)
}
#[doc = "Bit 11 - Instruction cache reset"]
#[inline(always)]
pub fn icrst(&self) -> ICRST_R {
ICRST_R::new(((self.bits >> 11) & 0x01) != 0)
}
#[doc = "Bit 12 - Data cache reset"]
#[inline(always)]
pub fn dcrst(&self) -> DCRST_R {
DCRST_R::new(((self.bits >> 12) & 0x01) != 0)
}
#[doc = "Bit 15 - CPU1 CortexM4 program erase suspend request"]
#[inline(always)]
pub fn pes(&self) -> PES_R {
PES_R::new(((self.bits >> 15) & 0x01) != 0)
}
#[doc = "Bit 16 - Flash User area empty"]
#[inline(always)]
pub fn empty(&self) -> EMPTY_R {
EMPTY_R::new(((self.bits >> 16) & 0x01) != 0)
}
}
impl W {
#[doc = "Bits 0:2 - Latency"]
#[inline(always)]
pub fn latency(&mut self) -> LATENCY_W {
LATENCY_W { w: self }
}
#[doc = "Bit 8 - Prefetch enable"]
#[inline(always)]
pub fn prften(&mut self) -> PRFTEN_W {
PRFTEN_W { w: self }
}
#[doc = "Bit 9 - Instruction cache enable"]
#[inline(always)]
pub fn icen(&mut self) -> ICEN_W {
ICEN_W { w: self }
}
#[doc = "Bit 10 - Data cache enable"]
#[inline(always)]
pub fn dcen(&mut self) -> DCEN_W {
DCEN_W { w: self }
}
#[doc = "Bit 11 - Instruction cache reset"]
#[inline(always)]
pub fn icrst(&mut self) -> ICRST_W {
ICRST_W { w: self }
}
#[doc = "Bit 12 - Data cache reset"]
#[inline(always)]
pub fn dcrst(&mut self) -> DCRST_W {
DCRST_W { w: self }
}
#[doc = "Bit 15 - CPU1 CortexM4 program erase suspend request"]
#[inline(always)]
pub fn pes(&mut self) -> PES_W {
PES_W { w: self }
}
#[doc = "Bit 16 - Flash User area empty"]
#[inline(always)]
pub fn empty(&mut self) -> EMPTY_W {
EMPTY_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Access control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [acr](index.html) module"]
pub struct ACR_SPEC;
impl crate::RegisterSpec for ACR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [acr::R](R) reader structure"]
impl crate::Readable for ACR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [acr::W](W) writer structure"]
impl crate::Writable for ACR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets ACR to value 0x0600"]
impl crate::Resettable for ACR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0x0600
}
}