1#[doc = "Reader of register CR"]
2pub type R = crate::R<u32, super::CR>;
3#[doc = "Writer for register CR"]
4pub type W = crate::W<u32, super::CR>;
5#[doc = "Register CR `reset()`'s with value 0"]
6impl crate::ResetValue for super::CR {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `CTPH`"]
14pub type CTPH_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `CTPH`"]
16pub struct CTPH_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> CTPH_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u8) -> &'a mut W {
23 self.w.bits = (self.w.bits & !(0x0f << 28)) | (((value as u32) & 0x0f) << 28);
24 self.w
25 }
26}
27#[doc = "Reader of field `CTPL`"]
28pub type CTPL_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `CTPL`"]
30pub struct CTPL_W<'a> {
31 w: &'a mut W,
32}
33impl<'a> CTPL_W<'a> {
34 #[doc = r"Writes raw bits to the field"]
35 #[inline(always)]
36 pub unsafe fn bits(self, value: u8) -> &'a mut W {
37 self.w.bits = (self.w.bits & !(0x0f << 24)) | (((value as u32) & 0x0f) << 24);
38 self.w
39 }
40}
41#[doc = "Reader of field `SSD`"]
42pub type SSD_R = crate::R<u8, u8>;
43#[doc = "Write proxy for field `SSD`"]
44pub struct SSD_W<'a> {
45 w: &'a mut W,
46}
47impl<'a> SSD_W<'a> {
48 #[doc = r"Writes raw bits to the field"]
49 #[inline(always)]
50 pub unsafe fn bits(self, value: u8) -> &'a mut W {
51 self.w.bits = (self.w.bits & !(0x7f << 17)) | (((value as u32) & 0x7f) << 17);
52 self.w
53 }
54}
55#[doc = "Reader of field `SSE`"]
56pub type SSE_R = crate::R<bool, bool>;
57#[doc = "Write proxy for field `SSE`"]
58pub struct SSE_W<'a> {
59 w: &'a mut W,
60}
61impl<'a> SSE_W<'a> {
62 #[doc = r"Sets the field bit"]
63 #[inline(always)]
64 pub fn set_bit(self) -> &'a mut W {
65 self.bit(true)
66 }
67 #[doc = r"Clears the field bit"]
68 #[inline(always)]
69 pub fn clear_bit(self) -> &'a mut W {
70 self.bit(false)
71 }
72 #[doc = r"Writes raw bits to the field"]
73 #[inline(always)]
74 pub fn bit(self, value: bool) -> &'a mut W {
75 self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
76 self.w
77 }
78}
79#[doc = "Reader of field `SSPSC`"]
80pub type SSPSC_R = crate::R<bool, bool>;
81#[doc = "Write proxy for field `SSPSC`"]
82pub struct SSPSC_W<'a> {
83 w: &'a mut W,
84}
85impl<'a> SSPSC_W<'a> {
86 #[doc = r"Sets the field bit"]
87 #[inline(always)]
88 pub fn set_bit(self) -> &'a mut W {
89 self.bit(true)
90 }
91 #[doc = r"Clears the field bit"]
92 #[inline(always)]
93 pub fn clear_bit(self) -> &'a mut W {
94 self.bit(false)
95 }
96 #[doc = r"Writes raw bits to the field"]
97 #[inline(always)]
98 pub fn bit(self, value: bool) -> &'a mut W {
99 self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
100 self.w
101 }
102}
103#[doc = "Reader of field `PGPSC`"]
104pub type PGPSC_R = crate::R<u8, u8>;
105#[doc = "Write proxy for field `PGPSC`"]
106pub struct PGPSC_W<'a> {
107 w: &'a mut W,
108}
109impl<'a> PGPSC_W<'a> {
110 #[doc = r"Writes raw bits to the field"]
111 #[inline(always)]
112 pub unsafe fn bits(self, value: u8) -> &'a mut W {
113 self.w.bits = (self.w.bits & !(0x07 << 12)) | (((value as u32) & 0x07) << 12);
114 self.w
115 }
116}
117#[doc = "Reader of field `MCV`"]
118pub type MCV_R = crate::R<u8, u8>;
119#[doc = "Write proxy for field `MCV`"]
120pub struct MCV_W<'a> {
121 w: &'a mut W,
122}
123impl<'a> MCV_W<'a> {
124 #[doc = r"Writes raw bits to the field"]
125 #[inline(always)]
126 pub unsafe fn bits(self, value: u8) -> &'a mut W {
127 self.w.bits = (self.w.bits & !(0x07 << 5)) | (((value as u32) & 0x07) << 5);
128 self.w
129 }
130}
131#[doc = "Reader of field `IODEF`"]
132pub type IODEF_R = crate::R<bool, bool>;
133#[doc = "Write proxy for field `IODEF`"]
134pub struct IODEF_W<'a> {
135 w: &'a mut W,
136}
137impl<'a> IODEF_W<'a> {
138 #[doc = r"Sets the field bit"]
139 #[inline(always)]
140 pub fn set_bit(self) -> &'a mut W {
141 self.bit(true)
142 }
143 #[doc = r"Clears the field bit"]
144 #[inline(always)]
145 pub fn clear_bit(self) -> &'a mut W {
146 self.bit(false)
147 }
148 #[doc = r"Writes raw bits to the field"]
149 #[inline(always)]
150 pub fn bit(self, value: bool) -> &'a mut W {
151 self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
152 self.w
153 }
154}
155#[doc = "Reader of field `SYNCPOL`"]
156pub type SYNCPOL_R = crate::R<bool, bool>;
157#[doc = "Write proxy for field `SYNCPOL`"]
158pub struct SYNCPOL_W<'a> {
159 w: &'a mut W,
160}
161impl<'a> SYNCPOL_W<'a> {
162 #[doc = r"Sets the field bit"]
163 #[inline(always)]
164 pub fn set_bit(self) -> &'a mut W {
165 self.bit(true)
166 }
167 #[doc = r"Clears the field bit"]
168 #[inline(always)]
169 pub fn clear_bit(self) -> &'a mut W {
170 self.bit(false)
171 }
172 #[doc = r"Writes raw bits to the field"]
173 #[inline(always)]
174 pub fn bit(self, value: bool) -> &'a mut W {
175 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
176 self.w
177 }
178}
179#[doc = "Reader of field `AM`"]
180pub type AM_R = crate::R<bool, bool>;
181#[doc = "Write proxy for field `AM`"]
182pub struct AM_W<'a> {
183 w: &'a mut W,
184}
185impl<'a> AM_W<'a> {
186 #[doc = r"Sets the field bit"]
187 #[inline(always)]
188 pub fn set_bit(self) -> &'a mut W {
189 self.bit(true)
190 }
191 #[doc = r"Clears the field bit"]
192 #[inline(always)]
193 pub fn clear_bit(self) -> &'a mut W {
194 self.bit(false)
195 }
196 #[doc = r"Writes raw bits to the field"]
197 #[inline(always)]
198 pub fn bit(self, value: bool) -> &'a mut W {
199 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
200 self.w
201 }
202}
203#[doc = "Reader of field `START`"]
204pub type START_R = crate::R<bool, bool>;
205#[doc = "Write proxy for field `START`"]
206pub struct START_W<'a> {
207 w: &'a mut W,
208}
209impl<'a> START_W<'a> {
210 #[doc = r"Sets the field bit"]
211 #[inline(always)]
212 pub fn set_bit(self) -> &'a mut W {
213 self.bit(true)
214 }
215 #[doc = r"Clears the field bit"]
216 #[inline(always)]
217 pub fn clear_bit(self) -> &'a mut W {
218 self.bit(false)
219 }
220 #[doc = r"Writes raw bits to the field"]
221 #[inline(always)]
222 pub fn bit(self, value: bool) -> &'a mut W {
223 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
224 self.w
225 }
226}
227#[doc = "Reader of field `TSCE`"]
228pub type TSCE_R = crate::R<bool, bool>;
229#[doc = "Write proxy for field `TSCE`"]
230pub struct TSCE_W<'a> {
231 w: &'a mut W,
232}
233impl<'a> TSCE_W<'a> {
234 #[doc = r"Sets the field bit"]
235 #[inline(always)]
236 pub fn set_bit(self) -> &'a mut W {
237 self.bit(true)
238 }
239 #[doc = r"Clears the field bit"]
240 #[inline(always)]
241 pub fn clear_bit(self) -> &'a mut W {
242 self.bit(false)
243 }
244 #[doc = r"Writes raw bits to the field"]
245 #[inline(always)]
246 pub fn bit(self, value: bool) -> &'a mut W {
247 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
248 self.w
249 }
250}
251impl R {
252 #[doc = "Bits 28:31 - Charge transfer pulse high"]
253 #[inline(always)]
254 pub fn ctph(&self) -> CTPH_R {
255 CTPH_R::new(((self.bits >> 28) & 0x0f) as u8)
256 }
257 #[doc = "Bits 24:27 - Charge transfer pulse low"]
258 #[inline(always)]
259 pub fn ctpl(&self) -> CTPL_R {
260 CTPL_R::new(((self.bits >> 24) & 0x0f) as u8)
261 }
262 #[doc = "Bits 17:23 - Spread spectrum deviation"]
263 #[inline(always)]
264 pub fn ssd(&self) -> SSD_R {
265 SSD_R::new(((self.bits >> 17) & 0x7f) as u8)
266 }
267 #[doc = "Bit 16 - Spread spectrum enable"]
268 #[inline(always)]
269 pub fn sse(&self) -> SSE_R {
270 SSE_R::new(((self.bits >> 16) & 0x01) != 0)
271 }
272 #[doc = "Bit 15 - Spread spectrum prescaler"]
273 #[inline(always)]
274 pub fn sspsc(&self) -> SSPSC_R {
275 SSPSC_R::new(((self.bits >> 15) & 0x01) != 0)
276 }
277 #[doc = "Bits 12:14 - pulse generator prescaler"]
278 #[inline(always)]
279 pub fn pgpsc(&self) -> PGPSC_R {
280 PGPSC_R::new(((self.bits >> 12) & 0x07) as u8)
281 }
282 #[doc = "Bits 5:7 - Max count value"]
283 #[inline(always)]
284 pub fn mcv(&self) -> MCV_R {
285 MCV_R::new(((self.bits >> 5) & 0x07) as u8)
286 }
287 #[doc = "Bit 4 - I/O Default mode"]
288 #[inline(always)]
289 pub fn iodef(&self) -> IODEF_R {
290 IODEF_R::new(((self.bits >> 4) & 0x01) != 0)
291 }
292 #[doc = "Bit 3 - Synchronization pin polarity"]
293 #[inline(always)]
294 pub fn syncpol(&self) -> SYNCPOL_R {
295 SYNCPOL_R::new(((self.bits >> 3) & 0x01) != 0)
296 }
297 #[doc = "Bit 2 - Acquisition mode"]
298 #[inline(always)]
299 pub fn am(&self) -> AM_R {
300 AM_R::new(((self.bits >> 2) & 0x01) != 0)
301 }
302 #[doc = "Bit 1 - Start a new acquisition"]
303 #[inline(always)]
304 pub fn start(&self) -> START_R {
305 START_R::new(((self.bits >> 1) & 0x01) != 0)
306 }
307 #[doc = "Bit 0 - Touch sensing controller enable"]
308 #[inline(always)]
309 pub fn tsce(&self) -> TSCE_R {
310 TSCE_R::new((self.bits & 0x01) != 0)
311 }
312}
313impl W {
314 #[doc = "Bits 28:31 - Charge transfer pulse high"]
315 #[inline(always)]
316 pub fn ctph(&mut self) -> CTPH_W {
317 CTPH_W { w: self }
318 }
319 #[doc = "Bits 24:27 - Charge transfer pulse low"]
320 #[inline(always)]
321 pub fn ctpl(&mut self) -> CTPL_W {
322 CTPL_W { w: self }
323 }
324 #[doc = "Bits 17:23 - Spread spectrum deviation"]
325 #[inline(always)]
326 pub fn ssd(&mut self) -> SSD_W {
327 SSD_W { w: self }
328 }
329 #[doc = "Bit 16 - Spread spectrum enable"]
330 #[inline(always)]
331 pub fn sse(&mut self) -> SSE_W {
332 SSE_W { w: self }
333 }
334 #[doc = "Bit 15 - Spread spectrum prescaler"]
335 #[inline(always)]
336 pub fn sspsc(&mut self) -> SSPSC_W {
337 SSPSC_W { w: self }
338 }
339 #[doc = "Bits 12:14 - pulse generator prescaler"]
340 #[inline(always)]
341 pub fn pgpsc(&mut self) -> PGPSC_W {
342 PGPSC_W { w: self }
343 }
344 #[doc = "Bits 5:7 - Max count value"]
345 #[inline(always)]
346 pub fn mcv(&mut self) -> MCV_W {
347 MCV_W { w: self }
348 }
349 #[doc = "Bit 4 - I/O Default mode"]
350 #[inline(always)]
351 pub fn iodef(&mut self) -> IODEF_W {
352 IODEF_W { w: self }
353 }
354 #[doc = "Bit 3 - Synchronization pin polarity"]
355 #[inline(always)]
356 pub fn syncpol(&mut self) -> SYNCPOL_W {
357 SYNCPOL_W { w: self }
358 }
359 #[doc = "Bit 2 - Acquisition mode"]
360 #[inline(always)]
361 pub fn am(&mut self) -> AM_W {
362 AM_W { w: self }
363 }
364 #[doc = "Bit 1 - Start a new acquisition"]
365 #[inline(always)]
366 pub fn start(&mut self) -> START_W {
367 START_W { w: self }
368 }
369 #[doc = "Bit 0 - Touch sensing controller enable"]
370 #[inline(always)]
371 pub fn tsce(&mut self) -> TSCE_W {
372 TSCE_W { w: self }
373 }
374}