1#[doc = "Reader of register SMCR"]
2pub type R = crate::R<u32, super::SMCR>;
3#[doc = "Writer for register SMCR"]
4pub type W = crate::W<u32, super::SMCR>;
5#[doc = "Register SMCR `reset()`'s with value 0"]
6impl crate::ResetValue for super::SMCR {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `SMS_3`"]
14pub type SMS_3_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `SMS_3`"]
16pub struct SMS_3_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> SMS_3_W<'a> {
20 #[doc = r"Sets the field bit"]
21 #[inline(always)]
22 pub fn set_bit(self) -> &'a mut W {
23 self.bit(true)
24 }
25 #[doc = r"Clears the field bit"]
26 #[inline(always)]
27 pub fn clear_bit(self) -> &'a mut W {
28 self.bit(false)
29 }
30 #[doc = r"Writes raw bits to the field"]
31 #[inline(always)]
32 pub fn bit(self, value: bool) -> &'a mut W {
33 self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
34 self.w
35 }
36}
37#[doc = "Reader of field `ETP`"]
38pub type ETP_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `ETP`"]
40pub struct ETP_W<'a> {
41 w: &'a mut W,
42}
43impl<'a> ETP_W<'a> {
44 #[doc = r"Sets the field bit"]
45 #[inline(always)]
46 pub fn set_bit(self) -> &'a mut W {
47 self.bit(true)
48 }
49 #[doc = r"Clears the field bit"]
50 #[inline(always)]
51 pub fn clear_bit(self) -> &'a mut W {
52 self.bit(false)
53 }
54 #[doc = r"Writes raw bits to the field"]
55 #[inline(always)]
56 pub fn bit(self, value: bool) -> &'a mut W {
57 self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
58 self.w
59 }
60}
61#[doc = "Reader of field `ECE`"]
62pub type ECE_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `ECE`"]
64pub struct ECE_W<'a> {
65 w: &'a mut W,
66}
67impl<'a> ECE_W<'a> {
68 #[doc = r"Sets the field bit"]
69 #[inline(always)]
70 pub fn set_bit(self) -> &'a mut W {
71 self.bit(true)
72 }
73 #[doc = r"Clears the field bit"]
74 #[inline(always)]
75 pub fn clear_bit(self) -> &'a mut W {
76 self.bit(false)
77 }
78 #[doc = r"Writes raw bits to the field"]
79 #[inline(always)]
80 pub fn bit(self, value: bool) -> &'a mut W {
81 self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
82 self.w
83 }
84}
85#[doc = "Reader of field `ETPS`"]
86pub type ETPS_R = crate::R<u8, u8>;
87#[doc = "Write proxy for field `ETPS`"]
88pub struct ETPS_W<'a> {
89 w: &'a mut W,
90}
91impl<'a> ETPS_W<'a> {
92 #[doc = r"Writes raw bits to the field"]
93 #[inline(always)]
94 pub unsafe fn bits(self, value: u8) -> &'a mut W {
95 self.w.bits = (self.w.bits & !(0x03 << 12)) | (((value as u32) & 0x03) << 12);
96 self.w
97 }
98}
99#[doc = "Reader of field `ETF`"]
100pub type ETF_R = crate::R<u8, u8>;
101#[doc = "Write proxy for field `ETF`"]
102pub struct ETF_W<'a> {
103 w: &'a mut W,
104}
105impl<'a> ETF_W<'a> {
106 #[doc = r"Writes raw bits to the field"]
107 #[inline(always)]
108 pub unsafe fn bits(self, value: u8) -> &'a mut W {
109 self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8);
110 self.w
111 }
112}
113#[doc = "Reader of field `MSM`"]
114pub type MSM_R = crate::R<bool, bool>;
115#[doc = "Write proxy for field `MSM`"]
116pub struct MSM_W<'a> {
117 w: &'a mut W,
118}
119impl<'a> MSM_W<'a> {
120 #[doc = r"Sets the field bit"]
121 #[inline(always)]
122 pub fn set_bit(self) -> &'a mut W {
123 self.bit(true)
124 }
125 #[doc = r"Clears the field bit"]
126 #[inline(always)]
127 pub fn clear_bit(self) -> &'a mut W {
128 self.bit(false)
129 }
130 #[doc = r"Writes raw bits to the field"]
131 #[inline(always)]
132 pub fn bit(self, value: bool) -> &'a mut W {
133 self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
134 self.w
135 }
136}
137#[doc = "Reader of field `TS`"]
138pub type TS_R = crate::R<u8, u8>;
139#[doc = "Write proxy for field `TS`"]
140pub struct TS_W<'a> {
141 w: &'a mut W,
142}
143impl<'a> TS_W<'a> {
144 #[doc = r"Writes raw bits to the field"]
145 #[inline(always)]
146 pub unsafe fn bits(self, value: u8) -> &'a mut W {
147 self.w.bits = (self.w.bits & !(0x07 << 4)) | (((value as u32) & 0x07) << 4);
148 self.w
149 }
150}
151#[doc = "Reader of field `OCCS`"]
152pub type OCCS_R = crate::R<bool, bool>;
153#[doc = "Write proxy for field `OCCS`"]
154pub struct OCCS_W<'a> {
155 w: &'a mut W,
156}
157impl<'a> OCCS_W<'a> {
158 #[doc = r"Sets the field bit"]
159 #[inline(always)]
160 pub fn set_bit(self) -> &'a mut W {
161 self.bit(true)
162 }
163 #[doc = r"Clears the field bit"]
164 #[inline(always)]
165 pub fn clear_bit(self) -> &'a mut W {
166 self.bit(false)
167 }
168 #[doc = r"Writes raw bits to the field"]
169 #[inline(always)]
170 pub fn bit(self, value: bool) -> &'a mut W {
171 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
172 self.w
173 }
174}
175#[doc = "Reader of field `SMS`"]
176pub type SMS_R = crate::R<u8, u8>;
177#[doc = "Write proxy for field `SMS`"]
178pub struct SMS_W<'a> {
179 w: &'a mut W,
180}
181impl<'a> SMS_W<'a> {
182 #[doc = r"Writes raw bits to the field"]
183 #[inline(always)]
184 pub unsafe fn bits(self, value: u8) -> &'a mut W {
185 self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07);
186 self.w
187 }
188}
189impl R {
190 #[doc = "Bit 16 - Slave mode selection - bit 3"]
191 #[inline(always)]
192 pub fn sms_3(&self) -> SMS_3_R {
193 SMS_3_R::new(((self.bits >> 16) & 0x01) != 0)
194 }
195 #[doc = "Bit 15 - External trigger polarity"]
196 #[inline(always)]
197 pub fn etp(&self) -> ETP_R {
198 ETP_R::new(((self.bits >> 15) & 0x01) != 0)
199 }
200 #[doc = "Bit 14 - External clock enable"]
201 #[inline(always)]
202 pub fn ece(&self) -> ECE_R {
203 ECE_R::new(((self.bits >> 14) & 0x01) != 0)
204 }
205 #[doc = "Bits 12:13 - External trigger prescaler"]
206 #[inline(always)]
207 pub fn etps(&self) -> ETPS_R {
208 ETPS_R::new(((self.bits >> 12) & 0x03) as u8)
209 }
210 #[doc = "Bits 8:11 - External trigger filter"]
211 #[inline(always)]
212 pub fn etf(&self) -> ETF_R {
213 ETF_R::new(((self.bits >> 8) & 0x0f) as u8)
214 }
215 #[doc = "Bit 7 - Master/Slave mode"]
216 #[inline(always)]
217 pub fn msm(&self) -> MSM_R {
218 MSM_R::new(((self.bits >> 7) & 0x01) != 0)
219 }
220 #[doc = "Bits 4:6 - Trigger selection"]
221 #[inline(always)]
222 pub fn ts(&self) -> TS_R {
223 TS_R::new(((self.bits >> 4) & 0x07) as u8)
224 }
225 #[doc = "Bit 3 - OCREF clear selection"]
226 #[inline(always)]
227 pub fn occs(&self) -> OCCS_R {
228 OCCS_R::new(((self.bits >> 3) & 0x01) != 0)
229 }
230 #[doc = "Bits 0:2 - Slave mode selection"]
231 #[inline(always)]
232 pub fn sms(&self) -> SMS_R {
233 SMS_R::new((self.bits & 0x07) as u8)
234 }
235}
236impl W {
237 #[doc = "Bit 16 - Slave mode selection - bit 3"]
238 #[inline(always)]
239 pub fn sms_3(&mut self) -> SMS_3_W {
240 SMS_3_W { w: self }
241 }
242 #[doc = "Bit 15 - External trigger polarity"]
243 #[inline(always)]
244 pub fn etp(&mut self) -> ETP_W {
245 ETP_W { w: self }
246 }
247 #[doc = "Bit 14 - External clock enable"]
248 #[inline(always)]
249 pub fn ece(&mut self) -> ECE_W {
250 ECE_W { w: self }
251 }
252 #[doc = "Bits 12:13 - External trigger prescaler"]
253 #[inline(always)]
254 pub fn etps(&mut self) -> ETPS_W {
255 ETPS_W { w: self }
256 }
257 #[doc = "Bits 8:11 - External trigger filter"]
258 #[inline(always)]
259 pub fn etf(&mut self) -> ETF_W {
260 ETF_W { w: self }
261 }
262 #[doc = "Bit 7 - Master/Slave mode"]
263 #[inline(always)]
264 pub fn msm(&mut self) -> MSM_W {
265 MSM_W { w: self }
266 }
267 #[doc = "Bits 4:6 - Trigger selection"]
268 #[inline(always)]
269 pub fn ts(&mut self) -> TS_W {
270 TS_W { w: self }
271 }
272 #[doc = "Bit 3 - OCREF clear selection"]
273 #[inline(always)]
274 pub fn occs(&mut self) -> OCCS_W {
275 OCCS_W { w: self }
276 }
277 #[doc = "Bits 0:2 - Slave mode selection"]
278 #[inline(always)]
279 pub fn sms(&mut self) -> SMS_W {
280 SMS_W { w: self }
281 }
282}