stm32wb_pac/tim2/
cr2.rs

1#[doc = "Reader of register CR2"]
2pub type R = crate::R<u32, super::CR2>;
3#[doc = "Writer for register CR2"]
4pub type W = crate::W<u32, super::CR2>;
5#[doc = "Register CR2 `reset()`'s with value 0"]
6impl crate::ResetValue for super::CR2 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `TI1S`"]
14pub type TI1S_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `TI1S`"]
16pub struct TI1S_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> TI1S_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
34        self.w
35    }
36}
37#[doc = "Reader of field `MMS`"]
38pub type MMS_R = crate::R<u8, u8>;
39#[doc = "Write proxy for field `MMS`"]
40pub struct MMS_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> MMS_W<'a> {
44    #[doc = r"Writes raw bits to the field"]
45    #[inline(always)]
46    pub unsafe fn bits(self, value: u8) -> &'a mut W {
47        self.w.bits = (self.w.bits & !(0x07 << 4)) | (((value as u32) & 0x07) << 4);
48        self.w
49    }
50}
51#[doc = "Reader of field `CCDS`"]
52pub type CCDS_R = crate::R<bool, bool>;
53#[doc = "Write proxy for field `CCDS`"]
54pub struct CCDS_W<'a> {
55    w: &'a mut W,
56}
57impl<'a> CCDS_W<'a> {
58    #[doc = r"Sets the field bit"]
59    #[inline(always)]
60    pub fn set_bit(self) -> &'a mut W {
61        self.bit(true)
62    }
63    #[doc = r"Clears the field bit"]
64    #[inline(always)]
65    pub fn clear_bit(self) -> &'a mut W {
66        self.bit(false)
67    }
68    #[doc = r"Writes raw bits to the field"]
69    #[inline(always)]
70    pub fn bit(self, value: bool) -> &'a mut W {
71        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
72        self.w
73    }
74}
75impl R {
76    #[doc = "Bit 7 - TI1 selection"]
77    #[inline(always)]
78    pub fn ti1s(&self) -> TI1S_R {
79        TI1S_R::new(((self.bits >> 7) & 0x01) != 0)
80    }
81    #[doc = "Bits 4:6 - Master mode selection"]
82    #[inline(always)]
83    pub fn mms(&self) -> MMS_R {
84        MMS_R::new(((self.bits >> 4) & 0x07) as u8)
85    }
86    #[doc = "Bit 3 - Capture/compare DMA selection"]
87    #[inline(always)]
88    pub fn ccds(&self) -> CCDS_R {
89        CCDS_R::new(((self.bits >> 3) & 0x01) != 0)
90    }
91}
92impl W {
93    #[doc = "Bit 7 - TI1 selection"]
94    #[inline(always)]
95    pub fn ti1s(&mut self) -> TI1S_W {
96        TI1S_W { w: self }
97    }
98    #[doc = "Bits 4:6 - Master mode selection"]
99    #[inline(always)]
100    pub fn mms(&mut self) -> MMS_W {
101        MMS_W { w: self }
102    }
103    #[doc = "Bit 3 - Capture/compare DMA selection"]
104    #[inline(always)]
105    pub fn ccds(&mut self) -> CCDS_W {
106        CCDS_W { w: self }
107    }
108}
stm32wb_pac/tim2/cr2.rs

stm32wb_pac/tim2/
cr2.rs
