stm32wb_pac/tim1/
cr1.rs

1#[doc = "Reader of register CR1"]
2pub type R = crate::R<u32, super::CR1>;
3#[doc = "Writer for register CR1"]
4pub type W = crate::W<u32, super::CR1>;
5#[doc = "Register CR1 `reset()`'s with value 0"]
6impl crate::ResetValue for super::CR1 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `CEN`"]
14pub type CEN_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `CEN`"]
16pub struct CEN_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> CEN_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34        self.w
35    }
36}
37#[doc = "Reader of field `OPM`"]
38pub type OPM_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `OPM`"]
40pub struct OPM_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> OPM_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
58        self.w
59    }
60}
61#[doc = "Reader of field `UDIS`"]
62pub type UDIS_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `UDIS`"]
64pub struct UDIS_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> UDIS_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
82        self.w
83    }
84}
85#[doc = "Reader of field `URS`"]
86pub type URS_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `URS`"]
88pub struct URS_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> URS_W<'a> {
92    #[doc = r"Sets the field bit"]
93    #[inline(always)]
94    pub fn set_bit(self) -> &'a mut W {
95        self.bit(true)
96    }
97    #[doc = r"Clears the field bit"]
98    #[inline(always)]
99    pub fn clear_bit(self) -> &'a mut W {
100        self.bit(false)
101    }
102    #[doc = r"Writes raw bits to the field"]
103    #[inline(always)]
104    pub fn bit(self, value: bool) -> &'a mut W {
105        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
106        self.w
107    }
108}
109#[doc = "Reader of field `DIR`"]
110pub type DIR_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `DIR`"]
112pub struct DIR_W<'a> {
113    w: &'a mut W,
114}
115impl<'a> DIR_W<'a> {
116    #[doc = r"Sets the field bit"]
117    #[inline(always)]
118    pub fn set_bit(self) -> &'a mut W {
119        self.bit(true)
120    }
121    #[doc = r"Clears the field bit"]
122    #[inline(always)]
123    pub fn clear_bit(self) -> &'a mut W {
124        self.bit(false)
125    }
126    #[doc = r"Writes raw bits to the field"]
127    #[inline(always)]
128    pub fn bit(self, value: bool) -> &'a mut W {
129        self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
130        self.w
131    }
132}
133#[doc = "Reader of field `CMS`"]
134pub type CMS_R = crate::R<u8, u8>;
135#[doc = "Write proxy for field `CMS`"]
136pub struct CMS_W<'a> {
137    w: &'a mut W,
138}
139impl<'a> CMS_W<'a> {
140    #[doc = r"Writes raw bits to the field"]
141    #[inline(always)]
142    pub unsafe fn bits(self, value: u8) -> &'a mut W {
143        self.w.bits = (self.w.bits & !(0x03 << 5)) | (((value as u32) & 0x03) << 5);
144        self.w
145    }
146}
147#[doc = "Reader of field `ARPE`"]
148pub type ARPE_R = crate::R<bool, bool>;
149#[doc = "Write proxy for field `ARPE`"]
150pub struct ARPE_W<'a> {
151    w: &'a mut W,
152}
153impl<'a> ARPE_W<'a> {
154    #[doc = r"Sets the field bit"]
155    #[inline(always)]
156    pub fn set_bit(self) -> &'a mut W {
157        self.bit(true)
158    }
159    #[doc = r"Clears the field bit"]
160    #[inline(always)]
161    pub fn clear_bit(self) -> &'a mut W {
162        self.bit(false)
163    }
164    #[doc = r"Writes raw bits to the field"]
165    #[inline(always)]
166    pub fn bit(self, value: bool) -> &'a mut W {
167        self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
168        self.w
169    }
170}
171#[doc = "Reader of field `CKD`"]
172pub type CKD_R = crate::R<u8, u8>;
173#[doc = "Write proxy for field `CKD`"]
174pub struct CKD_W<'a> {
175    w: &'a mut W,
176}
177impl<'a> CKD_W<'a> {
178    #[doc = r"Writes raw bits to the field"]
179    #[inline(always)]
180    pub unsafe fn bits(self, value: u8) -> &'a mut W {
181        self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8);
182        self.w
183    }
184}
185#[doc = "Reader of field `UIFREMAP`"]
186pub type UIFREMAP_R = crate::R<bool, bool>;
187#[doc = "Write proxy for field `UIFREMAP`"]
188pub struct UIFREMAP_W<'a> {
189    w: &'a mut W,
190}
191impl<'a> UIFREMAP_W<'a> {
192    #[doc = r"Sets the field bit"]
193    #[inline(always)]
194    pub fn set_bit(self) -> &'a mut W {
195        self.bit(true)
196    }
197    #[doc = r"Clears the field bit"]
198    #[inline(always)]
199    pub fn clear_bit(self) -> &'a mut W {
200        self.bit(false)
201    }
202    #[doc = r"Writes raw bits to the field"]
203    #[inline(always)]
204    pub fn bit(self, value: bool) -> &'a mut W {
205        self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
206        self.w
207    }
208}
209impl R {
210    #[doc = "Bit 0 - Counter enable"]
211    #[inline(always)]
212    pub fn cen(&self) -> CEN_R {
213        CEN_R::new((self.bits & 0x01) != 0)
214    }
215    #[doc = "Bit 3 - One-pulse mode"]
216    #[inline(always)]
217    pub fn opm(&self) -> OPM_R {
218        OPM_R::new(((self.bits >> 3) & 0x01) != 0)
219    }
220    #[doc = "Bit 1 - Update disable"]
221    #[inline(always)]
222    pub fn udis(&self) -> UDIS_R {
223        UDIS_R::new(((self.bits >> 1) & 0x01) != 0)
224    }
225    #[doc = "Bit 2 - Update request source"]
226    #[inline(always)]
227    pub fn urs(&self) -> URS_R {
228        URS_R::new(((self.bits >> 2) & 0x01) != 0)
229    }
230    #[doc = "Bit 4 - Direction"]
231    #[inline(always)]
232    pub fn dir(&self) -> DIR_R {
233        DIR_R::new(((self.bits >> 4) & 0x01) != 0)
234    }
235    #[doc = "Bits 5:6 - Center-aligned mode selection"]
236    #[inline(always)]
237    pub fn cms(&self) -> CMS_R {
238        CMS_R::new(((self.bits >> 5) & 0x03) as u8)
239    }
240    #[doc = "Bit 7 - Auto-reload preload enable"]
241    #[inline(always)]
242    pub fn arpe(&self) -> ARPE_R {
243        ARPE_R::new(((self.bits >> 7) & 0x01) != 0)
244    }
245    #[doc = "Bits 8:9 - Clock division"]
246    #[inline(always)]
247    pub fn ckd(&self) -> CKD_R {
248        CKD_R::new(((self.bits >> 8) & 0x03) as u8)
249    }
250    #[doc = "Bit 11 - UIF status bit remapping"]
251    #[inline(always)]
252    pub fn uifremap(&self) -> UIFREMAP_R {
253        UIFREMAP_R::new(((self.bits >> 11) & 0x01) != 0)
254    }
255}
256impl W {
257    #[doc = "Bit 0 - Counter enable"]
258    #[inline(always)]
259    pub fn cen(&mut self) -> CEN_W {
260        CEN_W { w: self }
261    }
262    #[doc = "Bit 3 - One-pulse mode"]
263    #[inline(always)]
264    pub fn opm(&mut self) -> OPM_W {
265        OPM_W { w: self }
266    }
267    #[doc = "Bit 1 - Update disable"]
268    #[inline(always)]
269    pub fn udis(&mut self) -> UDIS_W {
270        UDIS_W { w: self }
271    }
272    #[doc = "Bit 2 - Update request source"]
273    #[inline(always)]
274    pub fn urs(&mut self) -> URS_W {
275        URS_W { w: self }
276    }
277    #[doc = "Bit 4 - Direction"]
278    #[inline(always)]
279    pub fn dir(&mut self) -> DIR_W {
280        DIR_W { w: self }
281    }
282    #[doc = "Bits 5:6 - Center-aligned mode selection"]
283    #[inline(always)]
284    pub fn cms(&mut self) -> CMS_W {
285        CMS_W { w: self }
286    }
287    #[doc = "Bit 7 - Auto-reload preload enable"]
288    #[inline(always)]
289    pub fn arpe(&mut self) -> ARPE_W {
290        ARPE_W { w: self }
291    }
292    #[doc = "Bits 8:9 - Clock division"]
293    #[inline(always)]
294    pub fn ckd(&mut self) -> CKD_W {
295        CKD_W { w: self }
296    }
297    #[doc = "Bit 11 - UIF status bit remapping"]
298    #[inline(always)]
299    pub fn uifremap(&mut self) -> UIFREMAP_W {
300        UIFREMAP_W { w: self }
301    }
302}
stm32wb_pac/tim1/cr1.rs

stm32wb_pac/tim1/
cr1.rs
