stm32wb_pac/syscfg/
imr1.rs1#[doc = "Reader of register IMR1"]
2pub type R = crate::R<u32, super::IMR1>;
3#[doc = "Writer for register IMR1"]
4pub type W = crate::W<u32, super::IMR1>;
5#[doc = "Register IMR1 `reset()`'s with value 0"]
6impl crate::ResetValue for super::IMR1 {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `TIM1IM`"]
14pub type TIM1IM_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `TIM1IM`"]
16pub struct TIM1IM_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> TIM1IM_W<'a> {
20 #[doc = r"Sets the field bit"]
21 #[inline(always)]
22 pub fn set_bit(self) -> &'a mut W {
23 self.bit(true)
24 }
25 #[doc = r"Clears the field bit"]
26 #[inline(always)]
27 pub fn clear_bit(self) -> &'a mut W {
28 self.bit(false)
29 }
30 #[doc = r"Writes raw bits to the field"]
31 #[inline(always)]
32 pub fn bit(self, value: bool) -> &'a mut W {
33 self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
34 self.w
35 }
36}
37#[doc = "Reader of field `TIM16IM`"]
38pub type TIM16IM_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `TIM16IM`"]
40pub struct TIM16IM_W<'a> {
41 w: &'a mut W,
42}
43impl<'a> TIM16IM_W<'a> {
44 #[doc = r"Sets the field bit"]
45 #[inline(always)]
46 pub fn set_bit(self) -> &'a mut W {
47 self.bit(true)
48 }
49 #[doc = r"Clears the field bit"]
50 #[inline(always)]
51 pub fn clear_bit(self) -> &'a mut W {
52 self.bit(false)
53 }
54 #[doc = r"Writes raw bits to the field"]
55 #[inline(always)]
56 pub fn bit(self, value: bool) -> &'a mut W {
57 self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
58 self.w
59 }
60}
61#[doc = "Reader of field `TIM17IM`"]
62pub type TIM17IM_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `TIM17IM`"]
64pub struct TIM17IM_W<'a> {
65 w: &'a mut W,
66}
67impl<'a> TIM17IM_W<'a> {
68 #[doc = r"Sets the field bit"]
69 #[inline(always)]
70 pub fn set_bit(self) -> &'a mut W {
71 self.bit(true)
72 }
73 #[doc = r"Clears the field bit"]
74 #[inline(always)]
75 pub fn clear_bit(self) -> &'a mut W {
76 self.bit(false)
77 }
78 #[doc = r"Writes raw bits to the field"]
79 #[inline(always)]
80 pub fn bit(self, value: bool) -> &'a mut W {
81 self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
82 self.w
83 }
84}
85#[doc = "Reader of field `EXIT5IM`"]
86pub type EXIT5IM_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `EXIT5IM`"]
88pub struct EXIT5IM_W<'a> {
89 w: &'a mut W,
90}
91impl<'a> EXIT5IM_W<'a> {
92 #[doc = r"Sets the field bit"]
93 #[inline(always)]
94 pub fn set_bit(self) -> &'a mut W {
95 self.bit(true)
96 }
97 #[doc = r"Clears the field bit"]
98 #[inline(always)]
99 pub fn clear_bit(self) -> &'a mut W {
100 self.bit(false)
101 }
102 #[doc = r"Writes raw bits to the field"]
103 #[inline(always)]
104 pub fn bit(self, value: bool) -> &'a mut W {
105 self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
106 self.w
107 }
108}
109#[doc = "Reader of field `EXIT6IM`"]
110pub type EXIT6IM_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `EXIT6IM`"]
112pub struct EXIT6IM_W<'a> {
113 w: &'a mut W,
114}
115impl<'a> EXIT6IM_W<'a> {
116 #[doc = r"Sets the field bit"]
117 #[inline(always)]
118 pub fn set_bit(self) -> &'a mut W {
119 self.bit(true)
120 }
121 #[doc = r"Clears the field bit"]
122 #[inline(always)]
123 pub fn clear_bit(self) -> &'a mut W {
124 self.bit(false)
125 }
126 #[doc = r"Writes raw bits to the field"]
127 #[inline(always)]
128 pub fn bit(self, value: bool) -> &'a mut W {
129 self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
130 self.w
131 }
132}
133#[doc = "Reader of field `EXIT7IM`"]
134pub type EXIT7IM_R = crate::R<bool, bool>;
135#[doc = "Write proxy for field `EXIT7IM`"]
136pub struct EXIT7IM_W<'a> {
137 w: &'a mut W,
138}
139impl<'a> EXIT7IM_W<'a> {
140 #[doc = r"Sets the field bit"]
141 #[inline(always)]
142 pub fn set_bit(self) -> &'a mut W {
143 self.bit(true)
144 }
145 #[doc = r"Clears the field bit"]
146 #[inline(always)]
147 pub fn clear_bit(self) -> &'a mut W {
148 self.bit(false)
149 }
150 #[doc = r"Writes raw bits to the field"]
151 #[inline(always)]
152 pub fn bit(self, value: bool) -> &'a mut W {
153 self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
154 self.w
155 }
156}
157#[doc = "Reader of field `EXIT8IM`"]
158pub type EXIT8IM_R = crate::R<bool, bool>;
159#[doc = "Write proxy for field `EXIT8IM`"]
160pub struct EXIT8IM_W<'a> {
161 w: &'a mut W,
162}
163impl<'a> EXIT8IM_W<'a> {
164 #[doc = r"Sets the field bit"]
165 #[inline(always)]
166 pub fn set_bit(self) -> &'a mut W {
167 self.bit(true)
168 }
169 #[doc = r"Clears the field bit"]
170 #[inline(always)]
171 pub fn clear_bit(self) -> &'a mut W {
172 self.bit(false)
173 }
174 #[doc = r"Writes raw bits to the field"]
175 #[inline(always)]
176 pub fn bit(self, value: bool) -> &'a mut W {
177 self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
178 self.w
179 }
180}
181#[doc = "Reader of field `EXIT9IM`"]
182pub type EXIT9IM_R = crate::R<bool, bool>;
183#[doc = "Write proxy for field `EXIT9IM`"]
184pub struct EXIT9IM_W<'a> {
185 w: &'a mut W,
186}
187impl<'a> EXIT9IM_W<'a> {
188 #[doc = r"Sets the field bit"]
189 #[inline(always)]
190 pub fn set_bit(self) -> &'a mut W {
191 self.bit(true)
192 }
193 #[doc = r"Clears the field bit"]
194 #[inline(always)]
195 pub fn clear_bit(self) -> &'a mut W {
196 self.bit(false)
197 }
198 #[doc = r"Writes raw bits to the field"]
199 #[inline(always)]
200 pub fn bit(self, value: bool) -> &'a mut W {
201 self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
202 self.w
203 }
204}
205#[doc = "Reader of field `EXIT10IM`"]
206pub type EXIT10IM_R = crate::R<bool, bool>;
207#[doc = "Write proxy for field `EXIT10IM`"]
208pub struct EXIT10IM_W<'a> {
209 w: &'a mut W,
210}
211impl<'a> EXIT10IM_W<'a> {
212 #[doc = r"Sets the field bit"]
213 #[inline(always)]
214 pub fn set_bit(self) -> &'a mut W {
215 self.bit(true)
216 }
217 #[doc = r"Clears the field bit"]
218 #[inline(always)]
219 pub fn clear_bit(self) -> &'a mut W {
220 self.bit(false)
221 }
222 #[doc = r"Writes raw bits to the field"]
223 #[inline(always)]
224 pub fn bit(self, value: bool) -> &'a mut W {
225 self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
226 self.w
227 }
228}
229#[doc = "Reader of field `EXIT11IM`"]
230pub type EXIT11IM_R = crate::R<bool, bool>;
231#[doc = "Write proxy for field `EXIT11IM`"]
232pub struct EXIT11IM_W<'a> {
233 w: &'a mut W,
234}
235impl<'a> EXIT11IM_W<'a> {
236 #[doc = r"Sets the field bit"]
237 #[inline(always)]
238 pub fn set_bit(self) -> &'a mut W {
239 self.bit(true)
240 }
241 #[doc = r"Clears the field bit"]
242 #[inline(always)]
243 pub fn clear_bit(self) -> &'a mut W {
244 self.bit(false)
245 }
246 #[doc = r"Writes raw bits to the field"]
247 #[inline(always)]
248 pub fn bit(self, value: bool) -> &'a mut W {
249 self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
250 self.w
251 }
252}
253#[doc = "Reader of field `EXIT12IM`"]
254pub type EXIT12IM_R = crate::R<bool, bool>;
255#[doc = "Write proxy for field `EXIT12IM`"]
256pub struct EXIT12IM_W<'a> {
257 w: &'a mut W,
258}
259impl<'a> EXIT12IM_W<'a> {
260 #[doc = r"Sets the field bit"]
261 #[inline(always)]
262 pub fn set_bit(self) -> &'a mut W {
263 self.bit(true)
264 }
265 #[doc = r"Clears the field bit"]
266 #[inline(always)]
267 pub fn clear_bit(self) -> &'a mut W {
268 self.bit(false)
269 }
270 #[doc = r"Writes raw bits to the field"]
271 #[inline(always)]
272 pub fn bit(self, value: bool) -> &'a mut W {
273 self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
274 self.w
275 }
276}
277#[doc = "Reader of field `EXIT13IM`"]
278pub type EXIT13IM_R = crate::R<bool, bool>;
279#[doc = "Write proxy for field `EXIT13IM`"]
280pub struct EXIT13IM_W<'a> {
281 w: &'a mut W,
282}
283impl<'a> EXIT13IM_W<'a> {
284 #[doc = r"Sets the field bit"]
285 #[inline(always)]
286 pub fn set_bit(self) -> &'a mut W {
287 self.bit(true)
288 }
289 #[doc = r"Clears the field bit"]
290 #[inline(always)]
291 pub fn clear_bit(self) -> &'a mut W {
292 self.bit(false)
293 }
294 #[doc = r"Writes raw bits to the field"]
295 #[inline(always)]
296 pub fn bit(self, value: bool) -> &'a mut W {
297 self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29);
298 self.w
299 }
300}
301#[doc = "Reader of field `EXIT14IM`"]
302pub type EXIT14IM_R = crate::R<bool, bool>;
303#[doc = "Write proxy for field `EXIT14IM`"]
304pub struct EXIT14IM_W<'a> {
305 w: &'a mut W,
306}
307impl<'a> EXIT14IM_W<'a> {
308 #[doc = r"Sets the field bit"]
309 #[inline(always)]
310 pub fn set_bit(self) -> &'a mut W {
311 self.bit(true)
312 }
313 #[doc = r"Clears the field bit"]
314 #[inline(always)]
315 pub fn clear_bit(self) -> &'a mut W {
316 self.bit(false)
317 }
318 #[doc = r"Writes raw bits to the field"]
319 #[inline(always)]
320 pub fn bit(self, value: bool) -> &'a mut W {
321 self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
322 self.w
323 }
324}
325#[doc = "Reader of field `EXIT15IM`"]
326pub type EXIT15IM_R = crate::R<bool, bool>;
327#[doc = "Write proxy for field `EXIT15IM`"]
328pub struct EXIT15IM_W<'a> {
329 w: &'a mut W,
330}
331impl<'a> EXIT15IM_W<'a> {
332 #[doc = r"Sets the field bit"]
333 #[inline(always)]
334 pub fn set_bit(self) -> &'a mut W {
335 self.bit(true)
336 }
337 #[doc = r"Clears the field bit"]
338 #[inline(always)]
339 pub fn clear_bit(self) -> &'a mut W {
340 self.bit(false)
341 }
342 #[doc = r"Writes raw bits to the field"]
343 #[inline(always)]
344 pub fn bit(self, value: bool) -> &'a mut W {
345 self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
346 self.w
347 }
348}
349impl R {
350 #[doc = "Bit 13 - Peripheral TIM1 interrupt mask to CPU1"]
351 #[inline(always)]
352 pub fn tim1im(&self) -> TIM1IM_R {
353 TIM1IM_R::new(((self.bits >> 13) & 0x01) != 0)
354 }
355 #[doc = "Bit 14 - Peripheral TIM16 interrupt mask to CPU1"]
356 #[inline(always)]
357 pub fn tim16im(&self) -> TIM16IM_R {
358 TIM16IM_R::new(((self.bits >> 14) & 0x01) != 0)
359 }
360 #[doc = "Bit 15 - Peripheral TIM17 interrupt mask to CPU1"]
361 #[inline(always)]
362 pub fn tim17im(&self) -> TIM17IM_R {
363 TIM17IM_R::new(((self.bits >> 15) & 0x01) != 0)
364 }
365 #[doc = "Bit 21 - Peripheral EXIT5 interrupt mask to CPU1"]
366 #[inline(always)]
367 pub fn exit5im(&self) -> EXIT5IM_R {
368 EXIT5IM_R::new(((self.bits >> 21) & 0x01) != 0)
369 }
370 #[doc = "Bit 22 - Peripheral EXIT6 interrupt mask to CPU1"]
371 #[inline(always)]
372 pub fn exit6im(&self) -> EXIT6IM_R {
373 EXIT6IM_R::new(((self.bits >> 22) & 0x01) != 0)
374 }
375 #[doc = "Bit 23 - Peripheral EXIT7 interrupt mask to CPU1"]
376 #[inline(always)]
377 pub fn exit7im(&self) -> EXIT7IM_R {
378 EXIT7IM_R::new(((self.bits >> 23) & 0x01) != 0)
379 }
380 #[doc = "Bit 24 - Peripheral EXIT8 interrupt mask to CPU1"]
381 #[inline(always)]
382 pub fn exit8im(&self) -> EXIT8IM_R {
383 EXIT8IM_R::new(((self.bits >> 24) & 0x01) != 0)
384 }
385 #[doc = "Bit 25 - Peripheral EXIT9 interrupt mask to CPU1"]
386 #[inline(always)]
387 pub fn exit9im(&self) -> EXIT9IM_R {
388 EXIT9IM_R::new(((self.bits >> 25) & 0x01) != 0)
389 }
390 #[doc = "Bit 26 - Peripheral EXIT10 interrupt mask to CPU1"]
391 #[inline(always)]
392 pub fn exit10im(&self) -> EXIT10IM_R {
393 EXIT10IM_R::new(((self.bits >> 26) & 0x01) != 0)
394 }
395 #[doc = "Bit 27 - Peripheral EXIT11 interrupt mask to CPU1"]
396 #[inline(always)]
397 pub fn exit11im(&self) -> EXIT11IM_R {
398 EXIT11IM_R::new(((self.bits >> 27) & 0x01) != 0)
399 }
400 #[doc = "Bit 28 - Peripheral EXIT12 interrupt mask to CPU1"]
401 #[inline(always)]
402 pub fn exit12im(&self) -> EXIT12IM_R {
403 EXIT12IM_R::new(((self.bits >> 28) & 0x01) != 0)
404 }
405 #[doc = "Bit 29 - Peripheral EXIT13 interrupt mask to CPU1"]
406 #[inline(always)]
407 pub fn exit13im(&self) -> EXIT13IM_R {
408 EXIT13IM_R::new(((self.bits >> 29) & 0x01) != 0)
409 }
410 #[doc = "Bit 30 - Peripheral EXIT14 interrupt mask to CPU1"]
411 #[inline(always)]
412 pub fn exit14im(&self) -> EXIT14IM_R {
413 EXIT14IM_R::new(((self.bits >> 30) & 0x01) != 0)
414 }
415 #[doc = "Bit 31 - Peripheral EXIT15 interrupt mask to CPU1"]
416 #[inline(always)]
417 pub fn exit15im(&self) -> EXIT15IM_R {
418 EXIT15IM_R::new(((self.bits >> 31) & 0x01) != 0)
419 }
420}
421impl W {
422 #[doc = "Bit 13 - Peripheral TIM1 interrupt mask to CPU1"]
423 #[inline(always)]
424 pub fn tim1im(&mut self) -> TIM1IM_W {
425 TIM1IM_W { w: self }
426 }
427 #[doc = "Bit 14 - Peripheral TIM16 interrupt mask to CPU1"]
428 #[inline(always)]
429 pub fn tim16im(&mut self) -> TIM16IM_W {
430 TIM16IM_W { w: self }
431 }
432 #[doc = "Bit 15 - Peripheral TIM17 interrupt mask to CPU1"]
433 #[inline(always)]
434 pub fn tim17im(&mut self) -> TIM17IM_W {
435 TIM17IM_W { w: self }
436 }
437 #[doc = "Bit 21 - Peripheral EXIT5 interrupt mask to CPU1"]
438 #[inline(always)]
439 pub fn exit5im(&mut self) -> EXIT5IM_W {
440 EXIT5IM_W { w: self }
441 }
442 #[doc = "Bit 22 - Peripheral EXIT6 interrupt mask to CPU1"]
443 #[inline(always)]
444 pub fn exit6im(&mut self) -> EXIT6IM_W {
445 EXIT6IM_W { w: self }
446 }
447 #[doc = "Bit 23 - Peripheral EXIT7 interrupt mask to CPU1"]
448 #[inline(always)]
449 pub fn exit7im(&mut self) -> EXIT7IM_W {
450 EXIT7IM_W { w: self }
451 }
452 #[doc = "Bit 24 - Peripheral EXIT8 interrupt mask to CPU1"]
453 #[inline(always)]
454 pub fn exit8im(&mut self) -> EXIT8IM_W {
455 EXIT8IM_W { w: self }
456 }
457 #[doc = "Bit 25 - Peripheral EXIT9 interrupt mask to CPU1"]
458 #[inline(always)]
459 pub fn exit9im(&mut self) -> EXIT9IM_W {
460 EXIT9IM_W { w: self }
461 }
462 #[doc = "Bit 26 - Peripheral EXIT10 interrupt mask to CPU1"]
463 #[inline(always)]
464 pub fn exit10im(&mut self) -> EXIT10IM_W {
465 EXIT10IM_W { w: self }
466 }
467 #[doc = "Bit 27 - Peripheral EXIT11 interrupt mask to CPU1"]
468 #[inline(always)]
469 pub fn exit11im(&mut self) -> EXIT11IM_W {
470 EXIT11IM_W { w: self }
471 }
472 #[doc = "Bit 28 - Peripheral EXIT12 interrupt mask to CPU1"]
473 #[inline(always)]
474 pub fn exit12im(&mut self) -> EXIT12IM_W {
475 EXIT12IM_W { w: self }
476 }
477 #[doc = "Bit 29 - Peripheral EXIT13 interrupt mask to CPU1"]
478 #[inline(always)]
479 pub fn exit13im(&mut self) -> EXIT13IM_W {
480 EXIT13IM_W { w: self }
481 }
482 #[doc = "Bit 30 - Peripheral EXIT14 interrupt mask to CPU1"]
483 #[inline(always)]
484 pub fn exit14im(&mut self) -> EXIT14IM_W {
485 EXIT14IM_W { w: self }
486 }
487 #[doc = "Bit 31 - Peripheral EXIT15 interrupt mask to CPU1"]
488 #[inline(always)]
489 pub fn exit15im(&mut self) -> EXIT15IM_W {
490 EXIT15IM_W { w: self }
491 }
492}