stm32wb_pac/sai1/
pdmdly.rs

1#[doc = "Reader of register PDMDLY"]
2pub type R = crate::R<u32, super::PDMDLY>;
3#[doc = "Writer for register PDMDLY"]
4pub type W = crate::W<u32, super::PDMDLY>;
5#[doc = "Register PDMDLY `reset()`'s with value 0"]
6impl crate::ResetValue for super::PDMDLY {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `DLYM4R`"]
14pub type DLYM4R_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `DLYM4R`"]
16pub struct DLYM4R_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> DLYM4R_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !(0x07 << 28)) | (((value as u32) & 0x07) << 28);
24        self.w
25    }
26}
27#[doc = "Reader of field `DLYM4L`"]
28pub type DLYM4L_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `DLYM4L`"]
30pub struct DLYM4L_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> DLYM4L_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0x07 << 24)) | (((value as u32) & 0x07) << 24);
38        self.w
39    }
40}
41#[doc = "Reader of field `DLYM3R`"]
42pub type DLYM3R_R = crate::R<u8, u8>;
43#[doc = "Write proxy for field `DLYM3R`"]
44pub struct DLYM3R_W<'a> {
45    w: &'a mut W,
46}
47impl<'a> DLYM3R_W<'a> {
48    #[doc = r"Writes raw bits to the field"]
49    #[inline(always)]
50    pub unsafe fn bits(self, value: u8) -> &'a mut W {
51        self.w.bits = (self.w.bits & !(0x07 << 20)) | (((value as u32) & 0x07) << 20);
52        self.w
53    }
54}
55#[doc = "Reader of field `DLYM3L`"]
56pub type DLYM3L_R = crate::R<u8, u8>;
57#[doc = "Write proxy for field `DLYM3L`"]
58pub struct DLYM3L_W<'a> {
59    w: &'a mut W,
60}
61impl<'a> DLYM3L_W<'a> {
62    #[doc = r"Writes raw bits to the field"]
63    #[inline(always)]
64    pub unsafe fn bits(self, value: u8) -> &'a mut W {
65        self.w.bits = (self.w.bits & !(0x07 << 16)) | (((value as u32) & 0x07) << 16);
66        self.w
67    }
68}
69#[doc = "Reader of field `DLYM2R`"]
70pub type DLYM2R_R = crate::R<u8, u8>;
71#[doc = "Write proxy for field `DLYM2R`"]
72pub struct DLYM2R_W<'a> {
73    w: &'a mut W,
74}
75impl<'a> DLYM2R_W<'a> {
76    #[doc = r"Writes raw bits to the field"]
77    #[inline(always)]
78    pub unsafe fn bits(self, value: u8) -> &'a mut W {
79        self.w.bits = (self.w.bits & !(0x07 << 12)) | (((value as u32) & 0x07) << 12);
80        self.w
81    }
82}
83#[doc = "Reader of field `DLYM2L`"]
84pub type DLYM2L_R = crate::R<u8, u8>;
85#[doc = "Write proxy for field `DLYM2L`"]
86pub struct DLYM2L_W<'a> {
87    w: &'a mut W,
88}
89impl<'a> DLYM2L_W<'a> {
90    #[doc = r"Writes raw bits to the field"]
91    #[inline(always)]
92    pub unsafe fn bits(self, value: u8) -> &'a mut W {
93        self.w.bits = (self.w.bits & !(0x07 << 8)) | (((value as u32) & 0x07) << 8);
94        self.w
95    }
96}
97#[doc = "Reader of field `DLYM1R`"]
98pub type DLYM1R_R = crate::R<u8, u8>;
99#[doc = "Write proxy for field `DLYM1R`"]
100pub struct DLYM1R_W<'a> {
101    w: &'a mut W,
102}
103impl<'a> DLYM1R_W<'a> {
104    #[doc = r"Writes raw bits to the field"]
105    #[inline(always)]
106    pub unsafe fn bits(self, value: u8) -> &'a mut W {
107        self.w.bits = (self.w.bits & !(0x07 << 4)) | (((value as u32) & 0x07) << 4);
108        self.w
109    }
110}
111#[doc = "Reader of field `DLYM1L`"]
112pub type DLYM1L_R = crate::R<u8, u8>;
113#[doc = "Write proxy for field `DLYM1L`"]
114pub struct DLYM1L_W<'a> {
115    w: &'a mut W,
116}
117impl<'a> DLYM1L_W<'a> {
118    #[doc = r"Writes raw bits to the field"]
119    #[inline(always)]
120    pub unsafe fn bits(self, value: u8) -> &'a mut W {
121        self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07);
122        self.w
123    }
124}
125impl R {
126    #[doc = "Bits 28:30 - Delay line for second microphone of pair 4"]
127    #[inline(always)]
128    pub fn dlym4r(&self) -> DLYM4R_R {
129        DLYM4R_R::new(((self.bits >> 28) & 0x07) as u8)
130    }
131    #[doc = "Bits 24:26 - Delay line for first microphone of pair 4"]
132    #[inline(always)]
133    pub fn dlym4l(&self) -> DLYM4L_R {
134        DLYM4L_R::new(((self.bits >> 24) & 0x07) as u8)
135    }
136    #[doc = "Bits 20:22 - Delay line for second microphone of pair 3"]
137    #[inline(always)]
138    pub fn dlym3r(&self) -> DLYM3R_R {
139        DLYM3R_R::new(((self.bits >> 20) & 0x07) as u8)
140    }
141    #[doc = "Bits 16:18 - Delay line for first microphone of pair 3"]
142    #[inline(always)]
143    pub fn dlym3l(&self) -> DLYM3L_R {
144        DLYM3L_R::new(((self.bits >> 16) & 0x07) as u8)
145    }
146    #[doc = "Bits 12:14 - Delay line for second microphone of pair 2"]
147    #[inline(always)]
148    pub fn dlym2r(&self) -> DLYM2R_R {
149        DLYM2R_R::new(((self.bits >> 12) & 0x07) as u8)
150    }
151    #[doc = "Bits 8:10 - Delay line for first microphone of pair 2"]
152    #[inline(always)]
153    pub fn dlym2l(&self) -> DLYM2L_R {
154        DLYM2L_R::new(((self.bits >> 8) & 0x07) as u8)
155    }
156    #[doc = "Bits 4:6 - Delay line for second microphone of pair 1"]
157    #[inline(always)]
158    pub fn dlym1r(&self) -> DLYM1R_R {
159        DLYM1R_R::new(((self.bits >> 4) & 0x07) as u8)
160    }
161    #[doc = "Bits 0:2 - Delay line for first microphone of pair 1"]
162    #[inline(always)]
163    pub fn dlym1l(&self) -> DLYM1L_R {
164        DLYM1L_R::new((self.bits & 0x07) as u8)
165    }
166}
167impl W {
168    #[doc = "Bits 28:30 - Delay line for second microphone of pair 4"]
169    #[inline(always)]
170    pub fn dlym4r(&mut self) -> DLYM4R_W {
171        DLYM4R_W { w: self }
172    }
173    #[doc = "Bits 24:26 - Delay line for first microphone of pair 4"]
174    #[inline(always)]
175    pub fn dlym4l(&mut self) -> DLYM4L_W {
176        DLYM4L_W { w: self }
177    }
178    #[doc = "Bits 20:22 - Delay line for second microphone of pair 3"]
179    #[inline(always)]
180    pub fn dlym3r(&mut self) -> DLYM3R_W {
181        DLYM3R_W { w: self }
182    }
183    #[doc = "Bits 16:18 - Delay line for first microphone of pair 3"]
184    #[inline(always)]
185    pub fn dlym3l(&mut self) -> DLYM3L_W {
186        DLYM3L_W { w: self }
187    }
188    #[doc = "Bits 12:14 - Delay line for second microphone of pair 2"]
189    #[inline(always)]
190    pub fn dlym2r(&mut self) -> DLYM2R_W {
191        DLYM2R_W { w: self }
192    }
193    #[doc = "Bits 8:10 - Delay line for first microphone of pair 2"]
194    #[inline(always)]
195    pub fn dlym2l(&mut self) -> DLYM2L_W {
196        DLYM2L_W { w: self }
197    }
198    #[doc = "Bits 4:6 - Delay line for second microphone of pair 1"]
199    #[inline(always)]
200    pub fn dlym1r(&mut self) -> DLYM1R_W {
201        DLYM1R_W { w: self }
202    }
203    #[doc = "Bits 0:2 - Delay line for first microphone of pair 1"]
204    #[inline(always)]
205    pub fn dlym1l(&mut self) -> DLYM1L_W {
206        DLYM1L_W { w: self }
207    }
208}
stm32wb_pac/sai1/pdmdly.rs

stm32wb_pac/sai1/
pdmdly.rs
