1#[doc = "Reader of register ACR1"]
2pub type R = crate::R<u32, super::ACR1>;
3#[doc = "Writer for register ACR1"]
4pub type W = crate::W<u32, super::ACR1>;
5#[doc = "Register ACR1 `reset()`'s with value 0x40"]
6impl crate::ResetValue for super::ACR1 {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0x40
11 }
12}
13#[doc = "Reader of field `MCKEN`"]
14pub type MCKEN_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `MCKEN`"]
16pub struct MCKEN_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> MCKEN_W<'a> {
20 #[doc = r"Sets the field bit"]
21 #[inline(always)]
22 pub fn set_bit(self) -> &'a mut W {
23 self.bit(true)
24 }
25 #[doc = r"Clears the field bit"]
26 #[inline(always)]
27 pub fn clear_bit(self) -> &'a mut W {
28 self.bit(false)
29 }
30 #[doc = r"Writes raw bits to the field"]
31 #[inline(always)]
32 pub fn bit(self, value: bool) -> &'a mut W {
33 self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
34 self.w
35 }
36}
37#[doc = "Reader of field `OSR`"]
38pub type OSR_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `OSR`"]
40pub struct OSR_W<'a> {
41 w: &'a mut W,
42}
43impl<'a> OSR_W<'a> {
44 #[doc = r"Sets the field bit"]
45 #[inline(always)]
46 pub fn set_bit(self) -> &'a mut W {
47 self.bit(true)
48 }
49 #[doc = r"Clears the field bit"]
50 #[inline(always)]
51 pub fn clear_bit(self) -> &'a mut W {
52 self.bit(false)
53 }
54 #[doc = r"Writes raw bits to the field"]
55 #[inline(always)]
56 pub fn bit(self, value: bool) -> &'a mut W {
57 self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
58 self.w
59 }
60}
61#[doc = "Reader of field `MCJDIV`"]
62pub type MCJDIV_R = crate::R<u8, u8>;
63#[doc = "Write proxy for field `MCJDIV`"]
64pub struct MCJDIV_W<'a> {
65 w: &'a mut W,
66}
67impl<'a> MCJDIV_W<'a> {
68 #[doc = r"Writes raw bits to the field"]
69 #[inline(always)]
70 pub unsafe fn bits(self, value: u8) -> &'a mut W {
71 self.w.bits = (self.w.bits & !(0x3f << 20)) | (((value as u32) & 0x3f) << 20);
72 self.w
73 }
74}
75#[doc = "Reader of field `NODIV`"]
76pub type NODIV_R = crate::R<bool, bool>;
77#[doc = "Write proxy for field `NODIV`"]
78pub struct NODIV_W<'a> {
79 w: &'a mut W,
80}
81impl<'a> NODIV_W<'a> {
82 #[doc = r"Sets the field bit"]
83 #[inline(always)]
84 pub fn set_bit(self) -> &'a mut W {
85 self.bit(true)
86 }
87 #[doc = r"Clears the field bit"]
88 #[inline(always)]
89 pub fn clear_bit(self) -> &'a mut W {
90 self.bit(false)
91 }
92 #[doc = r"Writes raw bits to the field"]
93 #[inline(always)]
94 pub fn bit(self, value: bool) -> &'a mut W {
95 self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
96 self.w
97 }
98}
99#[doc = "Reader of field `DMAEN`"]
100pub type DMAEN_R = crate::R<bool, bool>;
101#[doc = "Write proxy for field `DMAEN`"]
102pub struct DMAEN_W<'a> {
103 w: &'a mut W,
104}
105impl<'a> DMAEN_W<'a> {
106 #[doc = r"Sets the field bit"]
107 #[inline(always)]
108 pub fn set_bit(self) -> &'a mut W {
109 self.bit(true)
110 }
111 #[doc = r"Clears the field bit"]
112 #[inline(always)]
113 pub fn clear_bit(self) -> &'a mut W {
114 self.bit(false)
115 }
116 #[doc = r"Writes raw bits to the field"]
117 #[inline(always)]
118 pub fn bit(self, value: bool) -> &'a mut W {
119 self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
120 self.w
121 }
122}
123#[doc = "Reader of field `SAIBEN`"]
124pub type SAIBEN_R = crate::R<bool, bool>;
125#[doc = "Write proxy for field `SAIBEN`"]
126pub struct SAIBEN_W<'a> {
127 w: &'a mut W,
128}
129impl<'a> SAIBEN_W<'a> {
130 #[doc = r"Sets the field bit"]
131 #[inline(always)]
132 pub fn set_bit(self) -> &'a mut W {
133 self.bit(true)
134 }
135 #[doc = r"Clears the field bit"]
136 #[inline(always)]
137 pub fn clear_bit(self) -> &'a mut W {
138 self.bit(false)
139 }
140 #[doc = r"Writes raw bits to the field"]
141 #[inline(always)]
142 pub fn bit(self, value: bool) -> &'a mut W {
143 self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
144 self.w
145 }
146}
147#[doc = "Reader of field `OutDri`"]
148pub type OUTDRI_R = crate::R<bool, bool>;
149#[doc = "Write proxy for field `OutDri`"]
150pub struct OUTDRI_W<'a> {
151 w: &'a mut W,
152}
153impl<'a> OUTDRI_W<'a> {
154 #[doc = r"Sets the field bit"]
155 #[inline(always)]
156 pub fn set_bit(self) -> &'a mut W {
157 self.bit(true)
158 }
159 #[doc = r"Clears the field bit"]
160 #[inline(always)]
161 pub fn clear_bit(self) -> &'a mut W {
162 self.bit(false)
163 }
164 #[doc = r"Writes raw bits to the field"]
165 #[inline(always)]
166 pub fn bit(self, value: bool) -> &'a mut W {
167 self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
168 self.w
169 }
170}
171#[doc = "Reader of field `MONO`"]
172pub type MONO_R = crate::R<bool, bool>;
173#[doc = "Write proxy for field `MONO`"]
174pub struct MONO_W<'a> {
175 w: &'a mut W,
176}
177impl<'a> MONO_W<'a> {
178 #[doc = r"Sets the field bit"]
179 #[inline(always)]
180 pub fn set_bit(self) -> &'a mut W {
181 self.bit(true)
182 }
183 #[doc = r"Clears the field bit"]
184 #[inline(always)]
185 pub fn clear_bit(self) -> &'a mut W {
186 self.bit(false)
187 }
188 #[doc = r"Writes raw bits to the field"]
189 #[inline(always)]
190 pub fn bit(self, value: bool) -> &'a mut W {
191 self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
192 self.w
193 }
194}
195#[doc = "Reader of field `SYNCEN`"]
196pub type SYNCEN_R = crate::R<u8, u8>;
197#[doc = "Write proxy for field `SYNCEN`"]
198pub struct SYNCEN_W<'a> {
199 w: &'a mut W,
200}
201impl<'a> SYNCEN_W<'a> {
202 #[doc = r"Writes raw bits to the field"]
203 #[inline(always)]
204 pub unsafe fn bits(self, value: u8) -> &'a mut W {
205 self.w.bits = (self.w.bits & !(0x03 << 10)) | (((value as u32) & 0x03) << 10);
206 self.w
207 }
208}
209#[doc = "Reader of field `CKSTR`"]
210pub type CKSTR_R = crate::R<bool, bool>;
211#[doc = "Write proxy for field `CKSTR`"]
212pub struct CKSTR_W<'a> {
213 w: &'a mut W,
214}
215impl<'a> CKSTR_W<'a> {
216 #[doc = r"Sets the field bit"]
217 #[inline(always)]
218 pub fn set_bit(self) -> &'a mut W {
219 self.bit(true)
220 }
221 #[doc = r"Clears the field bit"]
222 #[inline(always)]
223 pub fn clear_bit(self) -> &'a mut W {
224 self.bit(false)
225 }
226 #[doc = r"Writes raw bits to the field"]
227 #[inline(always)]
228 pub fn bit(self, value: bool) -> &'a mut W {
229 self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
230 self.w
231 }
232}
233#[doc = "Reader of field `LSBFIRST`"]
234pub type LSBFIRST_R = crate::R<bool, bool>;
235#[doc = "Write proxy for field `LSBFIRST`"]
236pub struct LSBFIRST_W<'a> {
237 w: &'a mut W,
238}
239impl<'a> LSBFIRST_W<'a> {
240 #[doc = r"Sets the field bit"]
241 #[inline(always)]
242 pub fn set_bit(self) -> &'a mut W {
243 self.bit(true)
244 }
245 #[doc = r"Clears the field bit"]
246 #[inline(always)]
247 pub fn clear_bit(self) -> &'a mut W {
248 self.bit(false)
249 }
250 #[doc = r"Writes raw bits to the field"]
251 #[inline(always)]
252 pub fn bit(self, value: bool) -> &'a mut W {
253 self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
254 self.w
255 }
256}
257#[doc = "Reader of field `DS`"]
258pub type DS_R = crate::R<u8, u8>;
259#[doc = "Write proxy for field `DS`"]
260pub struct DS_W<'a> {
261 w: &'a mut W,
262}
263impl<'a> DS_W<'a> {
264 #[doc = r"Writes raw bits to the field"]
265 #[inline(always)]
266 pub unsafe fn bits(self, value: u8) -> &'a mut W {
267 self.w.bits = (self.w.bits & !(0x07 << 5)) | (((value as u32) & 0x07) << 5);
268 self.w
269 }
270}
271#[doc = "Reader of field `PRTCFG`"]
272pub type PRTCFG_R = crate::R<u8, u8>;
273#[doc = "Write proxy for field `PRTCFG`"]
274pub struct PRTCFG_W<'a> {
275 w: &'a mut W,
276}
277impl<'a> PRTCFG_W<'a> {
278 #[doc = r"Writes raw bits to the field"]
279 #[inline(always)]
280 pub unsafe fn bits(self, value: u8) -> &'a mut W {
281 self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u32) & 0x03) << 2);
282 self.w
283 }
284}
285#[doc = "Reader of field `MODE`"]
286pub type MODE_R = crate::R<u8, u8>;
287#[doc = "Write proxy for field `MODE`"]
288pub struct MODE_W<'a> {
289 w: &'a mut W,
290}
291impl<'a> MODE_W<'a> {
292 #[doc = r"Writes raw bits to the field"]
293 #[inline(always)]
294 pub unsafe fn bits(self, value: u8) -> &'a mut W {
295 self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
296 self.w
297 }
298}
299impl R {
300 #[doc = "Bit 27 - Master clock generation enable"]
301 #[inline(always)]
302 pub fn mcken(&self) -> MCKEN_R {
303 MCKEN_R::new(((self.bits >> 27) & 0x01) != 0)
304 }
305 #[doc = "Bit 26 - Oversampling ratio for master clock"]
306 #[inline(always)]
307 pub fn osr(&self) -> OSR_R {
308 OSR_R::new(((self.bits >> 26) & 0x01) != 0)
309 }
310 #[doc = "Bits 20:25 - Master clock divider"]
311 #[inline(always)]
312 pub fn mcjdiv(&self) -> MCJDIV_R {
313 MCJDIV_R::new(((self.bits >> 20) & 0x3f) as u8)
314 }
315 #[doc = "Bit 19 - No divider"]
316 #[inline(always)]
317 pub fn nodiv(&self) -> NODIV_R {
318 NODIV_R::new(((self.bits >> 19) & 0x01) != 0)
319 }
320 #[doc = "Bit 17 - DMA enable"]
321 #[inline(always)]
322 pub fn dmaen(&self) -> DMAEN_R {
323 DMAEN_R::new(((self.bits >> 17) & 0x01) != 0)
324 }
325 #[doc = "Bit 16 - Audio block B enable"]
326 #[inline(always)]
327 pub fn saiben(&self) -> SAIBEN_R {
328 SAIBEN_R::new(((self.bits >> 16) & 0x01) != 0)
329 }
330 #[doc = "Bit 13 - Output drive"]
331 #[inline(always)]
332 pub fn out_dri(&self) -> OUTDRI_R {
333 OUTDRI_R::new(((self.bits >> 13) & 0x01) != 0)
334 }
335 #[doc = "Bit 12 - Mono mode"]
336 #[inline(always)]
337 pub fn mono(&self) -> MONO_R {
338 MONO_R::new(((self.bits >> 12) & 0x01) != 0)
339 }
340 #[doc = "Bits 10:11 - Synchronization enable"]
341 #[inline(always)]
342 pub fn syncen(&self) -> SYNCEN_R {
343 SYNCEN_R::new(((self.bits >> 10) & 0x03) as u8)
344 }
345 #[doc = "Bit 9 - Clock strobing edge"]
346 #[inline(always)]
347 pub fn ckstr(&self) -> CKSTR_R {
348 CKSTR_R::new(((self.bits >> 9) & 0x01) != 0)
349 }
350 #[doc = "Bit 8 - Least significant bit first"]
351 #[inline(always)]
352 pub fn lsbfirst(&self) -> LSBFIRST_R {
353 LSBFIRST_R::new(((self.bits >> 8) & 0x01) != 0)
354 }
355 #[doc = "Bits 5:7 - Data size"]
356 #[inline(always)]
357 pub fn ds(&self) -> DS_R {
358 DS_R::new(((self.bits >> 5) & 0x07) as u8)
359 }
360 #[doc = "Bits 2:3 - Protocol configuration"]
361 #[inline(always)]
362 pub fn prtcfg(&self) -> PRTCFG_R {
363 PRTCFG_R::new(((self.bits >> 2) & 0x03) as u8)
364 }
365 #[doc = "Bits 0:1 - Audio block mode"]
366 #[inline(always)]
367 pub fn mode(&self) -> MODE_R {
368 MODE_R::new((self.bits & 0x03) as u8)
369 }
370}
371impl W {
372 #[doc = "Bit 27 - Master clock generation enable"]
373 #[inline(always)]
374 pub fn mcken(&mut self) -> MCKEN_W {
375 MCKEN_W { w: self }
376 }
377 #[doc = "Bit 26 - Oversampling ratio for master clock"]
378 #[inline(always)]
379 pub fn osr(&mut self) -> OSR_W {
380 OSR_W { w: self }
381 }
382 #[doc = "Bits 20:25 - Master clock divider"]
383 #[inline(always)]
384 pub fn mcjdiv(&mut self) -> MCJDIV_W {
385 MCJDIV_W { w: self }
386 }
387 #[doc = "Bit 19 - No divider"]
388 #[inline(always)]
389 pub fn nodiv(&mut self) -> NODIV_W {
390 NODIV_W { w: self }
391 }
392 #[doc = "Bit 17 - DMA enable"]
393 #[inline(always)]
394 pub fn dmaen(&mut self) -> DMAEN_W {
395 DMAEN_W { w: self }
396 }
397 #[doc = "Bit 16 - Audio block B enable"]
398 #[inline(always)]
399 pub fn saiben(&mut self) -> SAIBEN_W {
400 SAIBEN_W { w: self }
401 }
402 #[doc = "Bit 13 - Output drive"]
403 #[inline(always)]
404 pub fn out_dri(&mut self) -> OUTDRI_W {
405 OUTDRI_W { w: self }
406 }
407 #[doc = "Bit 12 - Mono mode"]
408 #[inline(always)]
409 pub fn mono(&mut self) -> MONO_W {
410 MONO_W { w: self }
411 }
412 #[doc = "Bits 10:11 - Synchronization enable"]
413 #[inline(always)]
414 pub fn syncen(&mut self) -> SYNCEN_W {
415 SYNCEN_W { w: self }
416 }
417 #[doc = "Bit 9 - Clock strobing edge"]
418 #[inline(always)]
419 pub fn ckstr(&mut self) -> CKSTR_W {
420 CKSTR_W { w: self }
421 }
422 #[doc = "Bit 8 - Least significant bit first"]
423 #[inline(always)]
424 pub fn lsbfirst(&mut self) -> LSBFIRST_W {
425 LSBFIRST_W { w: self }
426 }
427 #[doc = "Bits 5:7 - Data size"]
428 #[inline(always)]
429 pub fn ds(&mut self) -> DS_W {
430 DS_W { w: self }
431 }
432 #[doc = "Bits 2:3 - Protocol configuration"]
433 #[inline(always)]
434 pub fn prtcfg(&mut self) -> PRTCFG_W {
435 PRTCFG_W { w: self }
436 }
437 #[doc = "Bits 0:1 - Audio block mode"]
438 #[inline(always)]
439 pub fn mode(&mut self) -> MODE_W {
440 MODE_W { w: self }
441 }
442}