stm32wb_pac/rcc/
hsecr.rs

1#[doc = "Reader of register HSECR"]
2pub type R = crate::R<u32, super::HSECR>;
3#[doc = "Writer for register HSECR"]
4pub type W = crate::W<u32, super::HSECR>;
5#[doc = "Register HSECR `reset()`'s with value 0x30"]
6impl crate::ResetValue for super::HSECR {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x30
11    }
12}
13#[doc = "Reader of field `HSETUNE`"]
14pub type HSETUNE_R = crate::R<u8, u8>;
15#[doc = "Reader of field `HSEGMC`"]
16pub type HSEGMC_R = crate::R<u8, u8>;
17#[doc = "Write proxy for field `HSEGMC`"]
18pub struct HSEGMC_W<'a> {
19    w: &'a mut W,
20}
21impl<'a> HSEGMC_W<'a> {
22    #[doc = r"Writes raw bits to the field"]
23    #[inline(always)]
24    pub unsafe fn bits(self, value: u8) -> &'a mut W {
25        self.w.bits = (self.w.bits & !(0x07 << 4)) | (((value as u32) & 0x07) << 4);
26        self.w
27    }
28}
29#[doc = "Reader of field `HSES`"]
30pub type HSES_R = crate::R<bool, bool>;
31#[doc = "Write proxy for field `HSES`"]
32pub struct HSES_W<'a> {
33    w: &'a mut W,
34}
35impl<'a> HSES_W<'a> {
36    #[doc = r"Sets the field bit"]
37    #[inline(always)]
38    pub fn set_bit(self) -> &'a mut W {
39        self.bit(true)
40    }
41    #[doc = r"Clears the field bit"]
42    #[inline(always)]
43    pub fn clear_bit(self) -> &'a mut W {
44        self.bit(false)
45    }
46    #[doc = r"Writes raw bits to the field"]
47    #[inline(always)]
48    pub fn bit(self, value: bool) -> &'a mut W {
49        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
50        self.w
51    }
52}
53#[doc = "Reader of field `UNLOCKED`"]
54pub type UNLOCKED_R = crate::R<bool, bool>;
55#[doc = "Write proxy for field `UNLOCKED`"]
56pub struct UNLOCKED_W<'a> {
57    w: &'a mut W,
58}
59impl<'a> UNLOCKED_W<'a> {
60    #[doc = r"Sets the field bit"]
61    #[inline(always)]
62    pub fn set_bit(self) -> &'a mut W {
63        self.bit(true)
64    }
65    #[doc = r"Clears the field bit"]
66    #[inline(always)]
67    pub fn clear_bit(self) -> &'a mut W {
68        self.bit(false)
69    }
70    #[doc = r"Writes raw bits to the field"]
71    #[inline(always)]
72    pub fn bit(self, value: bool) -> &'a mut W {
73        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
74        self.w
75    }
76}
77impl R {
78    #[doc = "Bits 8:13 - HSE capacitor tuning"]
79    #[inline(always)]
80    pub fn hsetune(&self) -> HSETUNE_R {
81        HSETUNE_R::new(((self.bits >> 8) & 0x3f) as u8)
82    }
83    #[doc = "Bits 4:6 - HSE current control"]
84    #[inline(always)]
85    pub fn hsegmc(&self) -> HSEGMC_R {
86        HSEGMC_R::new(((self.bits >> 4) & 0x07) as u8)
87    }
88    #[doc = "Bit 3 - HSE Sense amplifier threshold"]
89    #[inline(always)]
90    pub fn hses(&self) -> HSES_R {
91        HSES_R::new(((self.bits >> 3) & 0x01) != 0)
92    }
93    #[doc = "Bit 0 - Register lock system"]
94    #[inline(always)]
95    pub fn unlocked(&self) -> UNLOCKED_R {
96        UNLOCKED_R::new((self.bits & 0x01) != 0)
97    }
98}
99impl W {
100    #[doc = "Bits 4:6 - HSE current control"]
101    #[inline(always)]
102    pub fn hsegmc(&mut self) -> HSEGMC_W {
103        HSEGMC_W { w: self }
104    }
105    #[doc = "Bit 3 - HSE Sense amplifier threshold"]
106    #[inline(always)]
107    pub fn hses(&mut self) -> HSES_W {
108        HSES_W { w: self }
109    }
110    #[doc = "Bit 0 - Register lock system"]
111    #[inline(always)]
112    pub fn unlocked(&mut self) -> UNLOCKED_W {
113        UNLOCKED_W { w: self }
114    }
115}
stm32wb_pac/rcc/hsecr.rs

stm32wb_pac/rcc/
hsecr.rs
