stm32wb_pac/rcc/
extcfgr.rs

1#[doc = "Reader of register EXTCFGR"]
2pub type R = crate::R<u32, super::EXTCFGR>;
3#[doc = "Writer for register EXTCFGR"]
4pub type W = crate::W<u32, super::EXTCFGR>;
5#[doc = "Register EXTCFGR `reset()`'s with value 0x0003_0000"]
6impl crate::ResetValue for super::EXTCFGR {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x0003_0000
11    }
12}
13#[doc = "Reader of field `RFCSS`"]
14pub type RFCSS_R = crate::R<bool, bool>;
15#[doc = "Reader of field `C2HPREF`"]
16pub type C2HPREF_R = crate::R<bool, bool>;
17#[doc = "Reader of field `SHDHPREF`"]
18pub type SHDHPREF_R = crate::R<bool, bool>;
19#[doc = "Reader of field `C2HPRE`"]
20pub type C2HPRE_R = crate::R<u8, u8>;
21#[doc = "Write proxy for field `C2HPRE`"]
22pub struct C2HPRE_W<'a> {
23    w: &'a mut W,
24}
25impl<'a> C2HPRE_W<'a> {
26    #[doc = r"Writes raw bits to the field"]
27    #[inline(always)]
28    pub unsafe fn bits(self, value: u8) -> &'a mut W {
29        self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4);
30        self.w
31    }
32}
33#[doc = "Reader of field `SHDHPRE`"]
34pub type SHDHPRE_R = crate::R<u8, u8>;
35#[doc = "Write proxy for field `SHDHPRE`"]
36pub struct SHDHPRE_W<'a> {
37    w: &'a mut W,
38}
39impl<'a> SHDHPRE_W<'a> {
40    #[doc = r"Writes raw bits to the field"]
41    #[inline(always)]
42    pub unsafe fn bits(self, value: u8) -> &'a mut W {
43        self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f);
44        self.w
45    }
46}
47impl R {
48    #[doc = "Bit 20 - RF clock source selected"]
49    #[inline(always)]
50    pub fn rfcss(&self) -> RFCSS_R {
51        RFCSS_R::new(((self.bits >> 20) & 0x01) != 0)
52    }
53    #[doc = "Bit 17 - CPU2 AHB prescaler flag"]
54    #[inline(always)]
55    pub fn c2hpref(&self) -> C2HPREF_R {
56        C2HPREF_R::new(((self.bits >> 17) & 0x01) != 0)
57    }
58    #[doc = "Bit 16 - Shared AHB prescaler flag"]
59    #[inline(always)]
60    pub fn shdhpref(&self) -> SHDHPREF_R {
61        SHDHPREF_R::new(((self.bits >> 16) & 0x01) != 0)
62    }
63    #[doc = "Bits 4:7 - CPU2 AHB prescaler"]
64    #[inline(always)]
65    pub fn c2hpre(&self) -> C2HPRE_R {
66        C2HPRE_R::new(((self.bits >> 4) & 0x0f) as u8)
67    }
68    #[doc = "Bits 0:3 - Shared AHB prescaler"]
69    #[inline(always)]
70    pub fn shdhpre(&self) -> SHDHPRE_R {
71        SHDHPRE_R::new((self.bits & 0x0f) as u8)
72    }
73}
74impl W {
75    #[doc = "Bits 4:7 - CPU2 AHB prescaler"]
76    #[inline(always)]
77    pub fn c2hpre(&mut self) -> C2HPRE_W {
78        C2HPRE_W { w: self }
79    }
80    #[doc = "Bits 0:3 - Shared AHB prescaler"]
81    #[inline(always)]
82    pub fn shdhpre(&mut self) -> SHDHPRE_W {
83        SHDHPRE_W { w: self }
84    }
85}
stm32wb_pac/rcc/extcfgr.rs

stm32wb_pac/rcc/
extcfgr.rs
