stm32wb_pac/rcc/
cr.rs

1#[doc = "Reader of register CR"]
2pub type R = crate::R<u32, super::CR>;
3#[doc = "Writer for register CR"]
4pub type W = crate::W<u32, super::CR>;
5#[doc = "Register CR `reset()`'s with value 0x61"]
6impl crate::ResetValue for super::CR {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x61
11    }
12}
13#[doc = "Reader of field `PLLSAI1RDY`"]
14pub type PLLSAI1RDY_R = crate::R<bool, bool>;
15#[doc = "Reader of field `PLLSAI1ON`"]
16pub type PLLSAI1ON_R = crate::R<bool, bool>;
17#[doc = "Write proxy for field `PLLSAI1ON`"]
18pub struct PLLSAI1ON_W<'a> {
19    w: &'a mut W,
20}
21impl<'a> PLLSAI1ON_W<'a> {
22    #[doc = r"Sets the field bit"]
23    #[inline(always)]
24    pub fn set_bit(self) -> &'a mut W {
25        self.bit(true)
26    }
27    #[doc = r"Clears the field bit"]
28    #[inline(always)]
29    pub fn clear_bit(self) -> &'a mut W {
30        self.bit(false)
31    }
32    #[doc = r"Writes raw bits to the field"]
33    #[inline(always)]
34    pub fn bit(self, value: bool) -> &'a mut W {
35        self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
36        self.w
37    }
38}
39#[doc = "Reader of field `PLLRDY`"]
40pub type PLLRDY_R = crate::R<bool, bool>;
41#[doc = "Reader of field `PLLON`"]
42pub type PLLON_R = crate::R<bool, bool>;
43#[doc = "Write proxy for field `PLLON`"]
44pub struct PLLON_W<'a> {
45    w: &'a mut W,
46}
47impl<'a> PLLON_W<'a> {
48    #[doc = r"Sets the field bit"]
49    #[inline(always)]
50    pub fn set_bit(self) -> &'a mut W {
51        self.bit(true)
52    }
53    #[doc = r"Clears the field bit"]
54    #[inline(always)]
55    pub fn clear_bit(self) -> &'a mut W {
56        self.bit(false)
57    }
58    #[doc = r"Writes raw bits to the field"]
59    #[inline(always)]
60    pub fn bit(self, value: bool) -> &'a mut W {
61        self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
62        self.w
63    }
64}
65#[doc = "Reader of field `HSEPRE`"]
66pub type HSEPRE_R = crate::R<bool, bool>;
67#[doc = "Write proxy for field `HSEPRE`"]
68pub struct HSEPRE_W<'a> {
69    w: &'a mut W,
70}
71impl<'a> HSEPRE_W<'a> {
72    #[doc = r"Sets the field bit"]
73    #[inline(always)]
74    pub fn set_bit(self) -> &'a mut W {
75        self.bit(true)
76    }
77    #[doc = r"Clears the field bit"]
78    #[inline(always)]
79    pub fn clear_bit(self) -> &'a mut W {
80        self.bit(false)
81    }
82    #[doc = r"Writes raw bits to the field"]
83    #[inline(always)]
84    pub fn bit(self, value: bool) -> &'a mut W {
85        self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
86        self.w
87    }
88}
89#[doc = "Write proxy for field `CSSON`"]
90pub struct CSSON_W<'a> {
91    w: &'a mut W,
92}
93impl<'a> CSSON_W<'a> {
94    #[doc = r"Sets the field bit"]
95    #[inline(always)]
96    pub fn set_bit(self) -> &'a mut W {
97        self.bit(true)
98    }
99    #[doc = r"Clears the field bit"]
100    #[inline(always)]
101    pub fn clear_bit(self) -> &'a mut W {
102        self.bit(false)
103    }
104    #[doc = r"Writes raw bits to the field"]
105    #[inline(always)]
106    pub fn bit(self, value: bool) -> &'a mut W {
107        self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
108        self.w
109    }
110}
111#[doc = "Reader of field `HSEBYP`"]
112pub type HSEBYP_R = crate::R<bool, bool>;
113#[doc = "Write proxy for field `HSEBYP`"]
114pub struct HSEBYP_W<'a> {
115    w: &'a mut W,
116}
117impl<'a> HSEBYP_W<'a> {
118    #[doc = r"Sets the field bit"]
119    #[inline(always)]
120    pub fn set_bit(self) -> &'a mut W {
121        self.bit(true)
122    }
123    #[doc = r"Clears the field bit"]
124    #[inline(always)]
125    pub fn clear_bit(self) -> &'a mut W {
126        self.bit(false)
127    }
128    #[doc = r"Writes raw bits to the field"]
129    #[inline(always)]
130    pub fn bit(self, value: bool) -> &'a mut W {
131        self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
132        self.w
133    }
134}
135#[doc = "Reader of field `HSERDY`"]
136pub type HSERDY_R = crate::R<bool, bool>;
137#[doc = "Reader of field `HSEON`"]
138pub type HSEON_R = crate::R<bool, bool>;
139#[doc = "Write proxy for field `HSEON`"]
140pub struct HSEON_W<'a> {
141    w: &'a mut W,
142}
143impl<'a> HSEON_W<'a> {
144    #[doc = r"Sets the field bit"]
145    #[inline(always)]
146    pub fn set_bit(self) -> &'a mut W {
147        self.bit(true)
148    }
149    #[doc = r"Clears the field bit"]
150    #[inline(always)]
151    pub fn clear_bit(self) -> &'a mut W {
152        self.bit(false)
153    }
154    #[doc = r"Writes raw bits to the field"]
155    #[inline(always)]
156    pub fn bit(self, value: bool) -> &'a mut W {
157        self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
158        self.w
159    }
160}
161#[doc = "Reader of field `HSIKERDY`"]
162pub type HSIKERDY_R = crate::R<bool, bool>;
163#[doc = "Reader of field `HSIASFS`"]
164pub type HSIASFS_R = crate::R<bool, bool>;
165#[doc = "Write proxy for field `HSIASFS`"]
166pub struct HSIASFS_W<'a> {
167    w: &'a mut W,
168}
169impl<'a> HSIASFS_W<'a> {
170    #[doc = r"Sets the field bit"]
171    #[inline(always)]
172    pub fn set_bit(self) -> &'a mut W {
173        self.bit(true)
174    }
175    #[doc = r"Clears the field bit"]
176    #[inline(always)]
177    pub fn clear_bit(self) -> &'a mut W {
178        self.bit(false)
179    }
180    #[doc = r"Writes raw bits to the field"]
181    #[inline(always)]
182    pub fn bit(self, value: bool) -> &'a mut W {
183        self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
184        self.w
185    }
186}
187#[doc = "Reader of field `HSIRDY`"]
188pub type HSIRDY_R = crate::R<bool, bool>;
189#[doc = "Reader of field `HSIKERON`"]
190pub type HSIKERON_R = crate::R<bool, bool>;
191#[doc = "Write proxy for field `HSIKERON`"]
192pub struct HSIKERON_W<'a> {
193    w: &'a mut W,
194}
195impl<'a> HSIKERON_W<'a> {
196    #[doc = r"Sets the field bit"]
197    #[inline(always)]
198    pub fn set_bit(self) -> &'a mut W {
199        self.bit(true)
200    }
201    #[doc = r"Clears the field bit"]
202    #[inline(always)]
203    pub fn clear_bit(self) -> &'a mut W {
204        self.bit(false)
205    }
206    #[doc = r"Writes raw bits to the field"]
207    #[inline(always)]
208    pub fn bit(self, value: bool) -> &'a mut W {
209        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
210        self.w
211    }
212}
213#[doc = "Reader of field `HSION`"]
214pub type HSION_R = crate::R<bool, bool>;
215#[doc = "Write proxy for field `HSION`"]
216pub struct HSION_W<'a> {
217    w: &'a mut W,
218}
219impl<'a> HSION_W<'a> {
220    #[doc = r"Sets the field bit"]
221    #[inline(always)]
222    pub fn set_bit(self) -> &'a mut W {
223        self.bit(true)
224    }
225    #[doc = r"Clears the field bit"]
226    #[inline(always)]
227    pub fn clear_bit(self) -> &'a mut W {
228        self.bit(false)
229    }
230    #[doc = r"Writes raw bits to the field"]
231    #[inline(always)]
232    pub fn bit(self, value: bool) -> &'a mut W {
233        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
234        self.w
235    }
236}
237#[doc = "Reader of field `MSIRANGE`"]
238pub type MSIRANGE_R = crate::R<u8, u8>;
239#[doc = "Write proxy for field `MSIRANGE`"]
240pub struct MSIRANGE_W<'a> {
241    w: &'a mut W,
242}
243impl<'a> MSIRANGE_W<'a> {
244    #[doc = r"Writes raw bits to the field"]
245    #[inline(always)]
246    pub unsafe fn bits(self, value: u8) -> &'a mut W {
247        self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4);
248        self.w
249    }
250}
251#[doc = "Reader of field `MSIPLLEN`"]
252pub type MSIPLLEN_R = crate::R<bool, bool>;
253#[doc = "Write proxy for field `MSIPLLEN`"]
254pub struct MSIPLLEN_W<'a> {
255    w: &'a mut W,
256}
257impl<'a> MSIPLLEN_W<'a> {
258    #[doc = r"Sets the field bit"]
259    #[inline(always)]
260    pub fn set_bit(self) -> &'a mut W {
261        self.bit(true)
262    }
263    #[doc = r"Clears the field bit"]
264    #[inline(always)]
265    pub fn clear_bit(self) -> &'a mut W {
266        self.bit(false)
267    }
268    #[doc = r"Writes raw bits to the field"]
269    #[inline(always)]
270    pub fn bit(self, value: bool) -> &'a mut W {
271        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
272        self.w
273    }
274}
275#[doc = "Reader of field `MSIRDY`"]
276pub type MSIRDY_R = crate::R<bool, bool>;
277#[doc = "Reader of field `MSION`"]
278pub type MSION_R = crate::R<bool, bool>;
279#[doc = "Write proxy for field `MSION`"]
280pub struct MSION_W<'a> {
281    w: &'a mut W,
282}
283impl<'a> MSION_W<'a> {
284    #[doc = r"Sets the field bit"]
285    #[inline(always)]
286    pub fn set_bit(self) -> &'a mut W {
287        self.bit(true)
288    }
289    #[doc = r"Clears the field bit"]
290    #[inline(always)]
291    pub fn clear_bit(self) -> &'a mut W {
292        self.bit(false)
293    }
294    #[doc = r"Writes raw bits to the field"]
295    #[inline(always)]
296    pub fn bit(self, value: bool) -> &'a mut W {
297        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
298        self.w
299    }
300}
301impl R {
302    #[doc = "Bit 27 - SAI1 PLL clock ready flag"]
303    #[inline(always)]
304    pub fn pllsai1rdy(&self) -> PLLSAI1RDY_R {
305        PLLSAI1RDY_R::new(((self.bits >> 27) & 0x01) != 0)
306    }
307    #[doc = "Bit 26 - SAI1 PLL enable"]
308    #[inline(always)]
309    pub fn pllsai1on(&self) -> PLLSAI1ON_R {
310        PLLSAI1ON_R::new(((self.bits >> 26) & 0x01) != 0)
311    }
312    #[doc = "Bit 25 - Main PLL clock ready flag"]
313    #[inline(always)]
314    pub fn pllrdy(&self) -> PLLRDY_R {
315        PLLRDY_R::new(((self.bits >> 25) & 0x01) != 0)
316    }
317    #[doc = "Bit 24 - Main PLL enable"]
318    #[inline(always)]
319    pub fn pllon(&self) -> PLLON_R {
320        PLLON_R::new(((self.bits >> 24) & 0x01) != 0)
321    }
322    #[doc = "Bit 20 - HSE sysclk and PLL M divider prescaler"]
323    #[inline(always)]
324    pub fn hsepre(&self) -> HSEPRE_R {
325        HSEPRE_R::new(((self.bits >> 20) & 0x01) != 0)
326    }
327    #[doc = "Bit 18 - HSE crystal oscillator bypass"]
328    #[inline(always)]
329    pub fn hsebyp(&self) -> HSEBYP_R {
330        HSEBYP_R::new(((self.bits >> 18) & 0x01) != 0)
331    }
332    #[doc = "Bit 17 - HSE clock ready flag"]
333    #[inline(always)]
334    pub fn hserdy(&self) -> HSERDY_R {
335        HSERDY_R::new(((self.bits >> 17) & 0x01) != 0)
336    }
337    #[doc = "Bit 16 - HSE clock enabled"]
338    #[inline(always)]
339    pub fn hseon(&self) -> HSEON_R {
340        HSEON_R::new(((self.bits >> 16) & 0x01) != 0)
341    }
342    #[doc = "Bit 12 - HSI kernel clock ready flag for peripherals requests"]
343    #[inline(always)]
344    pub fn hsikerdy(&self) -> HSIKERDY_R {
345        HSIKERDY_R::new(((self.bits >> 12) & 0x01) != 0)
346    }
347    #[doc = "Bit 11 - HSI automatic start from Stop"]
348    #[inline(always)]
349    pub fn hsiasfs(&self) -> HSIASFS_R {
350        HSIASFS_R::new(((self.bits >> 11) & 0x01) != 0)
351    }
352    #[doc = "Bit 10 - HSI clock ready flag"]
353    #[inline(always)]
354    pub fn hsirdy(&self) -> HSIRDY_R {
355        HSIRDY_R::new(((self.bits >> 10) & 0x01) != 0)
356    }
357    #[doc = "Bit 9 - HSI always enable for peripheral kernels"]
358    #[inline(always)]
359    pub fn hsikeron(&self) -> HSIKERON_R {
360        HSIKERON_R::new(((self.bits >> 9) & 0x01) != 0)
361    }
362    #[doc = "Bit 8 - HSI clock enabled"]
363    #[inline(always)]
364    pub fn hsion(&self) -> HSION_R {
365        HSION_R::new(((self.bits >> 8) & 0x01) != 0)
366    }
367    #[doc = "Bits 4:7 - MSI clock ranges"]
368    #[inline(always)]
369    pub fn msirange(&self) -> MSIRANGE_R {
370        MSIRANGE_R::new(((self.bits >> 4) & 0x0f) as u8)
371    }
372    #[doc = "Bit 2 - MSI clock PLL enable"]
373    #[inline(always)]
374    pub fn msipllen(&self) -> MSIPLLEN_R {
375        MSIPLLEN_R::new(((self.bits >> 2) & 0x01) != 0)
376    }
377    #[doc = "Bit 1 - MSI clock ready flag"]
378    #[inline(always)]
379    pub fn msirdy(&self) -> MSIRDY_R {
380        MSIRDY_R::new(((self.bits >> 1) & 0x01) != 0)
381    }
382    #[doc = "Bit 0 - MSI clock enable"]
383    #[inline(always)]
384    pub fn msion(&self) -> MSION_R {
385        MSION_R::new((self.bits & 0x01) != 0)
386    }
387}
388impl W {
389    #[doc = "Bit 26 - SAI1 PLL enable"]
390    #[inline(always)]
391    pub fn pllsai1on(&mut self) -> PLLSAI1ON_W {
392        PLLSAI1ON_W { w: self }
393    }
394    #[doc = "Bit 24 - Main PLL enable"]
395    #[inline(always)]
396    pub fn pllon(&mut self) -> PLLON_W {
397        PLLON_W { w: self }
398    }
399    #[doc = "Bit 20 - HSE sysclk and PLL M divider prescaler"]
400    #[inline(always)]
401    pub fn hsepre(&mut self) -> HSEPRE_W {
402        HSEPRE_W { w: self }
403    }
404    #[doc = "Bit 19 - HSE Clock security system enable"]
405    #[inline(always)]
406    pub fn csson(&mut self) -> CSSON_W {
407        CSSON_W { w: self }
408    }
409    #[doc = "Bit 18 - HSE crystal oscillator bypass"]
410    #[inline(always)]
411    pub fn hsebyp(&mut self) -> HSEBYP_W {
412        HSEBYP_W { w: self }
413    }
414    #[doc = "Bit 16 - HSE clock enabled"]
415    #[inline(always)]
416    pub fn hseon(&mut self) -> HSEON_W {
417        HSEON_W { w: self }
418    }
419    #[doc = "Bit 11 - HSI automatic start from Stop"]
420    #[inline(always)]
421    pub fn hsiasfs(&mut self) -> HSIASFS_W {
422        HSIASFS_W { w: self }
423    }
424    #[doc = "Bit 9 - HSI always enable for peripheral kernels"]
425    #[inline(always)]
426    pub fn hsikeron(&mut self) -> HSIKERON_W {
427        HSIKERON_W { w: self }
428    }
429    #[doc = "Bit 8 - HSI clock enabled"]
430    #[inline(always)]
431    pub fn hsion(&mut self) -> HSION_W {
432        HSION_W { w: self }
433    }
434    #[doc = "Bits 4:7 - MSI clock ranges"]
435    #[inline(always)]
436    pub fn msirange(&mut self) -> MSIRANGE_W {
437        MSIRANGE_W { w: self }
438    }
439    #[doc = "Bit 2 - MSI clock PLL enable"]
440    #[inline(always)]
441    pub fn msipllen(&mut self) -> MSIPLLEN_W {
442        MSIPLLEN_W { w: self }
443    }
444    #[doc = "Bit 0 - MSI clock enable"]
445    #[inline(always)]
446    pub fn msion(&mut self) -> MSION_W {
447        MSION_W { w: self }
448    }
449}
stm32wb_pac/rcc/cr.rs

stm32wb_pac/rcc/
cr.rs
