stm32wb_pac/rcc/
cicr.rs

1#[doc = "Writer for register CICR"]
2pub type W = crate::W<u32, super::CICR>;
3#[doc = "Register CICR `reset()`'s with value 0"]
4impl crate::ResetValue for super::CICR {
5    type Type = u32;
6    #[inline(always)]
7    fn reset_value() -> Self::Type {
8        0
9    }
10}
11#[doc = "Write proxy for field `LSI2RDYC`"]
12pub struct LSI2RDYC_W<'a> {
13    w: &'a mut W,
14}
15impl<'a> LSI2RDYC_W<'a> {
16    #[doc = r"Sets the field bit"]
17    #[inline(always)]
18    pub fn set_bit(self) -> &'a mut W {
19        self.bit(true)
20    }
21    #[doc = r"Clears the field bit"]
22    #[inline(always)]
23    pub fn clear_bit(self) -> &'a mut W {
24        self.bit(false)
25    }
26    #[doc = r"Writes raw bits to the field"]
27    #[inline(always)]
28    pub fn bit(self, value: bool) -> &'a mut W {
29        self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
30        self.w
31    }
32}
33#[doc = "Write proxy for field `HSI48RDYC`"]
34pub struct HSI48RDYC_W<'a> {
35    w: &'a mut W,
36}
37impl<'a> HSI48RDYC_W<'a> {
38    #[doc = r"Sets the field bit"]
39    #[inline(always)]
40    pub fn set_bit(self) -> &'a mut W {
41        self.bit(true)
42    }
43    #[doc = r"Clears the field bit"]
44    #[inline(always)]
45    pub fn clear_bit(self) -> &'a mut W {
46        self.bit(false)
47    }
48    #[doc = r"Writes raw bits to the field"]
49    #[inline(always)]
50    pub fn bit(self, value: bool) -> &'a mut W {
51        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
52        self.w
53    }
54}
55#[doc = "Write proxy for field `LSECSSC`"]
56pub struct LSECSSC_W<'a> {
57    w: &'a mut W,
58}
59impl<'a> LSECSSC_W<'a> {
60    #[doc = r"Sets the field bit"]
61    #[inline(always)]
62    pub fn set_bit(self) -> &'a mut W {
63        self.bit(true)
64    }
65    #[doc = r"Clears the field bit"]
66    #[inline(always)]
67    pub fn clear_bit(self) -> &'a mut W {
68        self.bit(false)
69    }
70    #[doc = r"Writes raw bits to the field"]
71    #[inline(always)]
72    pub fn bit(self, value: bool) -> &'a mut W {
73        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
74        self.w
75    }
76}
77#[doc = "Write proxy for field `HSECSSC`"]
78pub struct HSECSSC_W<'a> {
79    w: &'a mut W,
80}
81impl<'a> HSECSSC_W<'a> {
82    #[doc = r"Sets the field bit"]
83    #[inline(always)]
84    pub fn set_bit(self) -> &'a mut W {
85        self.bit(true)
86    }
87    #[doc = r"Clears the field bit"]
88    #[inline(always)]
89    pub fn clear_bit(self) -> &'a mut W {
90        self.bit(false)
91    }
92    #[doc = r"Writes raw bits to the field"]
93    #[inline(always)]
94    pub fn bit(self, value: bool) -> &'a mut W {
95        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
96        self.w
97    }
98}
99#[doc = "Write proxy for field `PLLSAI1RDYC`"]
100pub struct PLLSAI1RDYC_W<'a> {
101    w: &'a mut W,
102}
103impl<'a> PLLSAI1RDYC_W<'a> {
104    #[doc = r"Sets the field bit"]
105    #[inline(always)]
106    pub fn set_bit(self) -> &'a mut W {
107        self.bit(true)
108    }
109    #[doc = r"Clears the field bit"]
110    #[inline(always)]
111    pub fn clear_bit(self) -> &'a mut W {
112        self.bit(false)
113    }
114    #[doc = r"Writes raw bits to the field"]
115    #[inline(always)]
116    pub fn bit(self, value: bool) -> &'a mut W {
117        self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
118        self.w
119    }
120}
121#[doc = "Write proxy for field `PLLRDYC`"]
122pub struct PLLRDYC_W<'a> {
123    w: &'a mut W,
124}
125impl<'a> PLLRDYC_W<'a> {
126    #[doc = r"Sets the field bit"]
127    #[inline(always)]
128    pub fn set_bit(self) -> &'a mut W {
129        self.bit(true)
130    }
131    #[doc = r"Clears the field bit"]
132    #[inline(always)]
133    pub fn clear_bit(self) -> &'a mut W {
134        self.bit(false)
135    }
136    #[doc = r"Writes raw bits to the field"]
137    #[inline(always)]
138    pub fn bit(self, value: bool) -> &'a mut W {
139        self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
140        self.w
141    }
142}
143#[doc = "Write proxy for field `HSERDYC`"]
144pub struct HSERDYC_W<'a> {
145    w: &'a mut W,
146}
147impl<'a> HSERDYC_W<'a> {
148    #[doc = r"Sets the field bit"]
149    #[inline(always)]
150    pub fn set_bit(self) -> &'a mut W {
151        self.bit(true)
152    }
153    #[doc = r"Clears the field bit"]
154    #[inline(always)]
155    pub fn clear_bit(self) -> &'a mut W {
156        self.bit(false)
157    }
158    #[doc = r"Writes raw bits to the field"]
159    #[inline(always)]
160    pub fn bit(self, value: bool) -> &'a mut W {
161        self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
162        self.w
163    }
164}
165#[doc = "Write proxy for field `HSIRDYC`"]
166pub struct HSIRDYC_W<'a> {
167    w: &'a mut W,
168}
169impl<'a> HSIRDYC_W<'a> {
170    #[doc = r"Sets the field bit"]
171    #[inline(always)]
172    pub fn set_bit(self) -> &'a mut W {
173        self.bit(true)
174    }
175    #[doc = r"Clears the field bit"]
176    #[inline(always)]
177    pub fn clear_bit(self) -> &'a mut W {
178        self.bit(false)
179    }
180    #[doc = r"Writes raw bits to the field"]
181    #[inline(always)]
182    pub fn bit(self, value: bool) -> &'a mut W {
183        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
184        self.w
185    }
186}
187#[doc = "Write proxy for field `MSIRDYC`"]
188pub struct MSIRDYC_W<'a> {
189    w: &'a mut W,
190}
191impl<'a> MSIRDYC_W<'a> {
192    #[doc = r"Sets the field bit"]
193    #[inline(always)]
194    pub fn set_bit(self) -> &'a mut W {
195        self.bit(true)
196    }
197    #[doc = r"Clears the field bit"]
198    #[inline(always)]
199    pub fn clear_bit(self) -> &'a mut W {
200        self.bit(false)
201    }
202    #[doc = r"Writes raw bits to the field"]
203    #[inline(always)]
204    pub fn bit(self, value: bool) -> &'a mut W {
205        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
206        self.w
207    }
208}
209#[doc = "Write proxy for field `LSERDYC`"]
210pub struct LSERDYC_W<'a> {
211    w: &'a mut W,
212}
213impl<'a> LSERDYC_W<'a> {
214    #[doc = r"Sets the field bit"]
215    #[inline(always)]
216    pub fn set_bit(self) -> &'a mut W {
217        self.bit(true)
218    }
219    #[doc = r"Clears the field bit"]
220    #[inline(always)]
221    pub fn clear_bit(self) -> &'a mut W {
222        self.bit(false)
223    }
224    #[doc = r"Writes raw bits to the field"]
225    #[inline(always)]
226    pub fn bit(self, value: bool) -> &'a mut W {
227        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
228        self.w
229    }
230}
231#[doc = "Write proxy for field `LSI1RDYC`"]
232pub struct LSI1RDYC_W<'a> {
233    w: &'a mut W,
234}
235impl<'a> LSI1RDYC_W<'a> {
236    #[doc = r"Sets the field bit"]
237    #[inline(always)]
238    pub fn set_bit(self) -> &'a mut W {
239        self.bit(true)
240    }
241    #[doc = r"Clears the field bit"]
242    #[inline(always)]
243    pub fn clear_bit(self) -> &'a mut W {
244        self.bit(false)
245    }
246    #[doc = r"Writes raw bits to the field"]
247    #[inline(always)]
248    pub fn bit(self, value: bool) -> &'a mut W {
249        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
250        self.w
251    }
252}
253impl W {
254    #[doc = "Bit 11 - LSI2 ready interrupt clear"]
255    #[inline(always)]
256    pub fn lsi2rdyc(&mut self) -> LSI2RDYC_W {
257        LSI2RDYC_W { w: self }
258    }
259    #[doc = "Bit 10 - HSI48 ready interrupt clear"]
260    #[inline(always)]
261    pub fn hsi48rdyc(&mut self) -> HSI48RDYC_W {
262        HSI48RDYC_W { w: self }
263    }
264    #[doc = "Bit 9 - LSE Clock security system interrupt clear"]
265    #[inline(always)]
266    pub fn lsecssc(&mut self) -> LSECSSC_W {
267        LSECSSC_W { w: self }
268    }
269    #[doc = "Bit 8 - HSE Clock security system interrupt clear"]
270    #[inline(always)]
271    pub fn hsecssc(&mut self) -> HSECSSC_W {
272        HSECSSC_W { w: self }
273    }
274    #[doc = "Bit 6 - PLLSAI1 ready interrupt clear"]
275    #[inline(always)]
276    pub fn pllsai1rdyc(&mut self) -> PLLSAI1RDYC_W {
277        PLLSAI1RDYC_W { w: self }
278    }
279    #[doc = "Bit 5 - PLL ready interrupt clear"]
280    #[inline(always)]
281    pub fn pllrdyc(&mut self) -> PLLRDYC_W {
282        PLLRDYC_W { w: self }
283    }
284    #[doc = "Bit 4 - HSE ready interrupt clear"]
285    #[inline(always)]
286    pub fn hserdyc(&mut self) -> HSERDYC_W {
287        HSERDYC_W { w: self }
288    }
289    #[doc = "Bit 3 - HSI ready interrupt clear"]
290    #[inline(always)]
291    pub fn hsirdyc(&mut self) -> HSIRDYC_W {
292        HSIRDYC_W { w: self }
293    }
294    #[doc = "Bit 2 - MSI ready interrupt clear"]
295    #[inline(always)]
296    pub fn msirdyc(&mut self) -> MSIRDYC_W {
297        MSIRDYC_W { w: self }
298    }
299    #[doc = "Bit 1 - LSE ready interrupt clear"]
300    #[inline(always)]
301    pub fn lserdyc(&mut self) -> LSERDYC_W {
302        LSERDYC_W { w: self }
303    }
304    #[doc = "Bit 0 - LSI1 ready interrupt clear"]
305    #[inline(always)]
306    pub fn lsi1rdyc(&mut self) -> LSI1RDYC_W {
307        LSI1RDYC_W { w: self }
308    }
309}
stm32wb_pac/rcc/cicr.rs

stm32wb_pac/rcc/
cicr.rs
