stm32wb_pac/rcc/
cfgr.rs

1#[doc = "Reader of register CFGR"]
2pub type R = crate::R<u32, super::CFGR>;
3#[doc = "Writer for register CFGR"]
4pub type W = crate::W<u32, super::CFGR>;
5#[doc = "Register CFGR `reset()`'s with value 0x0007_0000"]
6impl crate::ResetValue for super::CFGR {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x0007_0000
11    }
12}
13#[doc = "Reader of field `MCOPRE`"]
14pub type MCOPRE_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `MCOPRE`"]
16pub struct MCOPRE_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> MCOPRE_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !(0x07 << 28)) | (((value as u32) & 0x07) << 28);
24        self.w
25    }
26}
27#[doc = "Reader of field `MCOSEL`"]
28pub type MCOSEL_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `MCOSEL`"]
30pub struct MCOSEL_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> MCOSEL_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0x0f << 24)) | (((value as u32) & 0x0f) << 24);
38        self.w
39    }
40}
41#[doc = "Reader of field `PPRE2F`"]
42pub type PPRE2F_R = crate::R<bool, bool>;
43#[doc = "Reader of field `PPRE1F`"]
44pub type PPRE1F_R = crate::R<bool, bool>;
45#[doc = "Reader of field `HPREF`"]
46pub type HPREF_R = crate::R<bool, bool>;
47#[doc = "Reader of field `STOPWUCK`"]
48pub type STOPWUCK_R = crate::R<bool, bool>;
49#[doc = "Write proxy for field `STOPWUCK`"]
50pub struct STOPWUCK_W<'a> {
51    w: &'a mut W,
52}
53impl<'a> STOPWUCK_W<'a> {
54    #[doc = r"Sets the field bit"]
55    #[inline(always)]
56    pub fn set_bit(self) -> &'a mut W {
57        self.bit(true)
58    }
59    #[doc = r"Clears the field bit"]
60    #[inline(always)]
61    pub fn clear_bit(self) -> &'a mut W {
62        self.bit(false)
63    }
64    #[doc = r"Writes raw bits to the field"]
65    #[inline(always)]
66    pub fn bit(self, value: bool) -> &'a mut W {
67        self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
68        self.w
69    }
70}
71#[doc = "Reader of field `PPRE2`"]
72pub type PPRE2_R = crate::R<u8, u8>;
73#[doc = "Write proxy for field `PPRE2`"]
74pub struct PPRE2_W<'a> {
75    w: &'a mut W,
76}
77impl<'a> PPRE2_W<'a> {
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub unsafe fn bits(self, value: u8) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x07 << 11)) | (((value as u32) & 0x07) << 11);
82        self.w
83    }
84}
85#[doc = "Reader of field `PPRE1`"]
86pub type PPRE1_R = crate::R<u8, u8>;
87#[doc = "Write proxy for field `PPRE1`"]
88pub struct PPRE1_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> PPRE1_W<'a> {
92    #[doc = r"Writes raw bits to the field"]
93    #[inline(always)]
94    pub unsafe fn bits(self, value: u8) -> &'a mut W {
95        self.w.bits = (self.w.bits & !(0x07 << 8)) | (((value as u32) & 0x07) << 8);
96        self.w
97    }
98}
99#[doc = "Reader of field `HPRE`"]
100pub type HPRE_R = crate::R<u8, u8>;
101#[doc = "Write proxy for field `HPRE`"]
102pub struct HPRE_W<'a> {
103    w: &'a mut W,
104}
105impl<'a> HPRE_W<'a> {
106    #[doc = r"Writes raw bits to the field"]
107    #[inline(always)]
108    pub unsafe fn bits(self, value: u8) -> &'a mut W {
109        self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4);
110        self.w
111    }
112}
113#[doc = "Reader of field `SWS`"]
114pub type SWS_R = crate::R<u8, u8>;
115#[doc = "Reader of field `SW`"]
116pub type SW_R = crate::R<u8, u8>;
117#[doc = "Write proxy for field `SW`"]
118pub struct SW_W<'a> {
119    w: &'a mut W,
120}
121impl<'a> SW_W<'a> {
122    #[doc = r"Writes raw bits to the field"]
123    #[inline(always)]
124    pub unsafe fn bits(self, value: u8) -> &'a mut W {
125        self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
126        self.w
127    }
128}
129impl R {
130    #[doc = "Bits 28:30 - Microcontroller clock output prescaler"]
131    #[inline(always)]
132    pub fn mcopre(&self) -> MCOPRE_R {
133        MCOPRE_R::new(((self.bits >> 28) & 0x07) as u8)
134    }
135    #[doc = "Bits 24:27 - Microcontroller clock output"]
136    #[inline(always)]
137    pub fn mcosel(&self) -> MCOSEL_R {
138        MCOSEL_R::new(((self.bits >> 24) & 0x0f) as u8)
139    }
140    #[doc = "Bit 18 - APB2 prescaler flag"]
141    #[inline(always)]
142    pub fn ppre2f(&self) -> PPRE2F_R {
143        PPRE2F_R::new(((self.bits >> 18) & 0x01) != 0)
144    }
145    #[doc = "Bit 17 - APB1 prescaler flag"]
146    #[inline(always)]
147    pub fn ppre1f(&self) -> PPRE1F_R {
148        PPRE1F_R::new(((self.bits >> 17) & 0x01) != 0)
149    }
150    #[doc = "Bit 16 - AHB prescaler flag"]
151    #[inline(always)]
152    pub fn hpref(&self) -> HPREF_R {
153        HPREF_R::new(((self.bits >> 16) & 0x01) != 0)
154    }
155    #[doc = "Bit 15 - Wakeup from Stop and CSS backup clock selection"]
156    #[inline(always)]
157    pub fn stopwuck(&self) -> STOPWUCK_R {
158        STOPWUCK_R::new(((self.bits >> 15) & 0x01) != 0)
159    }
160    #[doc = "Bits 11:13 - APB high-speed prescaler (APB2)"]
161    #[inline(always)]
162    pub fn ppre2(&self) -> PPRE2_R {
163        PPRE2_R::new(((self.bits >> 11) & 0x07) as u8)
164    }
165    #[doc = "Bits 8:10 - PB low-speed prescaler (APB1)"]
166    #[inline(always)]
167    pub fn ppre1(&self) -> PPRE1_R {
168        PPRE1_R::new(((self.bits >> 8) & 0x07) as u8)
169    }
170    #[doc = "Bits 4:7 - AHB prescaler"]
171    #[inline(always)]
172    pub fn hpre(&self) -> HPRE_R {
173        HPRE_R::new(((self.bits >> 4) & 0x0f) as u8)
174    }
175    #[doc = "Bits 2:3 - System clock switch status"]
176    #[inline(always)]
177    pub fn sws(&self) -> SWS_R {
178        SWS_R::new(((self.bits >> 2) & 0x03) as u8)
179    }
180    #[doc = "Bits 0:1 - System clock switch"]
181    #[inline(always)]
182    pub fn sw(&self) -> SW_R {
183        SW_R::new((self.bits & 0x03) as u8)
184    }
185}
186impl W {
187    #[doc = "Bits 28:30 - Microcontroller clock output prescaler"]
188    #[inline(always)]
189    pub fn mcopre(&mut self) -> MCOPRE_W {
190        MCOPRE_W { w: self }
191    }
192    #[doc = "Bits 24:27 - Microcontroller clock output"]
193    #[inline(always)]
194    pub fn mcosel(&mut self) -> MCOSEL_W {
195        MCOSEL_W { w: self }
196    }
197    #[doc = "Bit 15 - Wakeup from Stop and CSS backup clock selection"]
198    #[inline(always)]
199    pub fn stopwuck(&mut self) -> STOPWUCK_W {
200        STOPWUCK_W { w: self }
201    }
202    #[doc = "Bits 11:13 - APB high-speed prescaler (APB2)"]
203    #[inline(always)]
204    pub fn ppre2(&mut self) -> PPRE2_W {
205        PPRE2_W { w: self }
206    }
207    #[doc = "Bits 8:10 - PB low-speed prescaler (APB1)"]
208    #[inline(always)]
209    pub fn ppre1(&mut self) -> PPRE1_W {
210        PPRE1_W { w: self }
211    }
212    #[doc = "Bits 4:7 - AHB prescaler"]
213    #[inline(always)]
214    pub fn hpre(&mut self) -> HPRE_W {
215        HPRE_W { w: self }
216    }
217    #[doc = "Bits 0:1 - System clock switch"]
218    #[inline(always)]
219    pub fn sw(&mut self) -> SW_W {
220        SW_W { w: self }
221    }
222}