stm32wb_pac/rcc/
c2apb1enr1.rs

1#[doc = "Reader of register C2APB1ENR1"]
2pub type R = crate::R<u32, super::C2APB1ENR1>;
3#[doc = "Writer for register C2APB1ENR1"]
4pub type W = crate::W<u32, super::C2APB1ENR1>;
5#[doc = "Register C2APB1ENR1 `reset()`'s with value 0x0400"]
6impl crate::ResetValue for super::C2APB1ENR1 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x0400
11    }
12}
13#[doc = "Reader of field `LPTIM1EN`"]
14pub type LPTIM1EN_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `LPTIM1EN`"]
16pub struct LPTIM1EN_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> LPTIM1EN_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
34        self.w
35    }
36}
37#[doc = "Reader of field `USBEN`"]
38pub type USBEN_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `USBEN`"]
40pub struct USBEN_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> USBEN_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
58        self.w
59    }
60}
61#[doc = "Reader of field `CRSEN`"]
62pub type CRSEN_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `CRSEN`"]
64pub struct CRSEN_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> CRSEN_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
82        self.w
83    }
84}
85#[doc = "Reader of field `I2C3EN`"]
86pub type I2C3EN_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `I2C3EN`"]
88pub struct I2C3EN_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> I2C3EN_W<'a> {
92    #[doc = r"Sets the field bit"]
93    #[inline(always)]
94    pub fn set_bit(self) -> &'a mut W {
95        self.bit(true)
96    }
97    #[doc = r"Clears the field bit"]
98    #[inline(always)]
99    pub fn clear_bit(self) -> &'a mut W {
100        self.bit(false)
101    }
102    #[doc = r"Writes raw bits to the field"]
103    #[inline(always)]
104    pub fn bit(self, value: bool) -> &'a mut W {
105        self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
106        self.w
107    }
108}
109#[doc = "Reader of field `I2C1EN`"]
110pub type I2C1EN_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `I2C1EN`"]
112pub struct I2C1EN_W<'a> {
113    w: &'a mut W,
114}
115impl<'a> I2C1EN_W<'a> {
116    #[doc = r"Sets the field bit"]
117    #[inline(always)]
118    pub fn set_bit(self) -> &'a mut W {
119        self.bit(true)
120    }
121    #[doc = r"Clears the field bit"]
122    #[inline(always)]
123    pub fn clear_bit(self) -> &'a mut W {
124        self.bit(false)
125    }
126    #[doc = r"Writes raw bits to the field"]
127    #[inline(always)]
128    pub fn bit(self, value: bool) -> &'a mut W {
129        self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
130        self.w
131    }
132}
133#[doc = "Reader of field `SPI2EN`"]
134pub type SPI2EN_R = crate::R<bool, bool>;
135#[doc = "Write proxy for field `SPI2EN`"]
136pub struct SPI2EN_W<'a> {
137    w: &'a mut W,
138}
139impl<'a> SPI2EN_W<'a> {
140    #[doc = r"Sets the field bit"]
141    #[inline(always)]
142    pub fn set_bit(self) -> &'a mut W {
143        self.bit(true)
144    }
145    #[doc = r"Clears the field bit"]
146    #[inline(always)]
147    pub fn clear_bit(self) -> &'a mut W {
148        self.bit(false)
149    }
150    #[doc = r"Writes raw bits to the field"]
151    #[inline(always)]
152    pub fn bit(self, value: bool) -> &'a mut W {
153        self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
154        self.w
155    }
156}
157#[doc = "Reader of field `RTCAPBEN`"]
158pub type RTCAPBEN_R = crate::R<bool, bool>;
159#[doc = "Write proxy for field `RTCAPBEN`"]
160pub struct RTCAPBEN_W<'a> {
161    w: &'a mut W,
162}
163impl<'a> RTCAPBEN_W<'a> {
164    #[doc = r"Sets the field bit"]
165    #[inline(always)]
166    pub fn set_bit(self) -> &'a mut W {
167        self.bit(true)
168    }
169    #[doc = r"Clears the field bit"]
170    #[inline(always)]
171    pub fn clear_bit(self) -> &'a mut W {
172        self.bit(false)
173    }
174    #[doc = r"Writes raw bits to the field"]
175    #[inline(always)]
176    pub fn bit(self, value: bool) -> &'a mut W {
177        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
178        self.w
179    }
180}
181#[doc = "Reader of field `LCDEN`"]
182pub type LCDEN_R = crate::R<bool, bool>;
183#[doc = "Write proxy for field `LCDEN`"]
184pub struct LCDEN_W<'a> {
185    w: &'a mut W,
186}
187impl<'a> LCDEN_W<'a> {
188    #[doc = r"Sets the field bit"]
189    #[inline(always)]
190    pub fn set_bit(self) -> &'a mut W {
191        self.bit(true)
192    }
193    #[doc = r"Clears the field bit"]
194    #[inline(always)]
195    pub fn clear_bit(self) -> &'a mut W {
196        self.bit(false)
197    }
198    #[doc = r"Writes raw bits to the field"]
199    #[inline(always)]
200    pub fn bit(self, value: bool) -> &'a mut W {
201        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
202        self.w
203    }
204}
205#[doc = "Reader of field `TIM2EN`"]
206pub type TIM2EN_R = crate::R<bool, bool>;
207#[doc = "Write proxy for field `TIM2EN`"]
208pub struct TIM2EN_W<'a> {
209    w: &'a mut W,
210}
211impl<'a> TIM2EN_W<'a> {
212    #[doc = r"Sets the field bit"]
213    #[inline(always)]
214    pub fn set_bit(self) -> &'a mut W {
215        self.bit(true)
216    }
217    #[doc = r"Clears the field bit"]
218    #[inline(always)]
219    pub fn clear_bit(self) -> &'a mut W {
220        self.bit(false)
221    }
222    #[doc = r"Writes raw bits to the field"]
223    #[inline(always)]
224    pub fn bit(self, value: bool) -> &'a mut W {
225        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
226        self.w
227    }
228}
229impl R {
230    #[doc = "Bit 31 - CPU2 Low power timer 1 clock enable"]
231    #[inline(always)]
232    pub fn lptim1en(&self) -> LPTIM1EN_R {
233        LPTIM1EN_R::new(((self.bits >> 31) & 0x01) != 0)
234    }
235    #[doc = "Bit 26 - CPU2 USB clock enable"]
236    #[inline(always)]
237    pub fn usben(&self) -> USBEN_R {
238        USBEN_R::new(((self.bits >> 26) & 0x01) != 0)
239    }
240    #[doc = "Bit 24 - CPU2 CRS clock enable"]
241    #[inline(always)]
242    pub fn crsen(&self) -> CRSEN_R {
243        CRSEN_R::new(((self.bits >> 24) & 0x01) != 0)
244    }
245    #[doc = "Bit 23 - CPU2 I2C3 clock enable"]
246    #[inline(always)]
247    pub fn i2c3en(&self) -> I2C3EN_R {
248        I2C3EN_R::new(((self.bits >> 23) & 0x01) != 0)
249    }
250    #[doc = "Bit 21 - CPU2 I2C1 clock enable"]
251    #[inline(always)]
252    pub fn i2c1en(&self) -> I2C1EN_R {
253        I2C1EN_R::new(((self.bits >> 21) & 0x01) != 0)
254    }
255    #[doc = "Bit 14 - CPU2 SPI2 clock enable"]
256    #[inline(always)]
257    pub fn spi2en(&self) -> SPI2EN_R {
258        SPI2EN_R::new(((self.bits >> 14) & 0x01) != 0)
259    }
260    #[doc = "Bit 10 - CPU2 RTC APB clock enable"]
261    #[inline(always)]
262    pub fn rtcapben(&self) -> RTCAPBEN_R {
263        RTCAPBEN_R::new(((self.bits >> 10) & 0x01) != 0)
264    }
265    #[doc = "Bit 9 - CPU2 LCD clock enable"]
266    #[inline(always)]
267    pub fn lcden(&self) -> LCDEN_R {
268        LCDEN_R::new(((self.bits >> 9) & 0x01) != 0)
269    }
270    #[doc = "Bit 0 - CPU2 TIM2 timer clock enable"]
271    #[inline(always)]
272    pub fn tim2en(&self) -> TIM2EN_R {
273        TIM2EN_R::new((self.bits & 0x01) != 0)
274    }
275}
276impl W {
277    #[doc = "Bit 31 - CPU2 Low power timer 1 clock enable"]
278    #[inline(always)]
279    pub fn lptim1en(&mut self) -> LPTIM1EN_W {
280        LPTIM1EN_W { w: self }
281    }
282    #[doc = "Bit 26 - CPU2 USB clock enable"]
283    #[inline(always)]
284    pub fn usben(&mut self) -> USBEN_W {
285        USBEN_W { w: self }
286    }
287    #[doc = "Bit 24 - CPU2 CRS clock enable"]
288    #[inline(always)]
289    pub fn crsen(&mut self) -> CRSEN_W {
290        CRSEN_W { w: self }
291    }
292    #[doc = "Bit 23 - CPU2 I2C3 clock enable"]
293    #[inline(always)]
294    pub fn i2c3en(&mut self) -> I2C3EN_W {
295        I2C3EN_W { w: self }
296    }
297    #[doc = "Bit 21 - CPU2 I2C1 clock enable"]
298    #[inline(always)]
299    pub fn i2c1en(&mut self) -> I2C1EN_W {
300        I2C1EN_W { w: self }
301    }
302    #[doc = "Bit 14 - CPU2 SPI2 clock enable"]
303    #[inline(always)]
304    pub fn spi2en(&mut self) -> SPI2EN_W {
305        SPI2EN_W { w: self }
306    }
307    #[doc = "Bit 10 - CPU2 RTC APB clock enable"]
308    #[inline(always)]
309    pub fn rtcapben(&mut self) -> RTCAPBEN_W {
310        RTCAPBEN_W { w: self }
311    }
312    #[doc = "Bit 9 - CPU2 LCD clock enable"]
313    #[inline(always)]
314    pub fn lcden(&mut self) -> LCDEN_W {
315        LCDEN_W { w: self }
316    }
317    #[doc = "Bit 0 - CPU2 TIM2 timer clock enable"]
318    #[inline(always)]
319    pub fn tim2en(&mut self) -> TIM2EN_W {
320        TIM2EN_W { w: self }
321    }
322}
stm32wb_pac/rcc/c2apb1enr1.rs

stm32wb_pac/rcc/
c2apb1enr1.rs
