stm32wb_pac/rcc/
apb1enr1.rs

1#[doc = "Reader of register APB1ENR1"]
2pub type R = crate::R<u32, super::APB1ENR1>;
3#[doc = "Writer for register APB1ENR1"]
4pub type W = crate::W<u32, super::APB1ENR1>;
5#[doc = "Register APB1ENR1 `reset()`'s with value 0x0400"]
6impl crate::ResetValue for super::APB1ENR1 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x0400
11    }
12}
13#[doc = "Reader of field `LPTIM1EN`"]
14pub type LPTIM1EN_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `LPTIM1EN`"]
16pub struct LPTIM1EN_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> LPTIM1EN_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
34        self.w
35    }
36}
37#[doc = "Reader of field `USBEN`"]
38pub type USBEN_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `USBEN`"]
40pub struct USBEN_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> USBEN_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
58        self.w
59    }
60}
61#[doc = "Reader of field `CRSEN`"]
62pub type CRSEN_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `CRSEN`"]
64pub struct CRSEN_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> CRSEN_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
82        self.w
83    }
84}
85#[doc = "Reader of field `I2C3EN`"]
86pub type I2C3EN_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `I2C3EN`"]
88pub struct I2C3EN_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> I2C3EN_W<'a> {
92    #[doc = r"Sets the field bit"]
93    #[inline(always)]
94    pub fn set_bit(self) -> &'a mut W {
95        self.bit(true)
96    }
97    #[doc = r"Clears the field bit"]
98    #[inline(always)]
99    pub fn clear_bit(self) -> &'a mut W {
100        self.bit(false)
101    }
102    #[doc = r"Writes raw bits to the field"]
103    #[inline(always)]
104    pub fn bit(self, value: bool) -> &'a mut W {
105        self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
106        self.w
107    }
108}
109#[doc = "Reader of field `I2C1EN`"]
110pub type I2C1EN_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `I2C1EN`"]
112pub struct I2C1EN_W<'a> {
113    w: &'a mut W,
114}
115impl<'a> I2C1EN_W<'a> {
116    #[doc = r"Sets the field bit"]
117    #[inline(always)]
118    pub fn set_bit(self) -> &'a mut W {
119        self.bit(true)
120    }
121    #[doc = r"Clears the field bit"]
122    #[inline(always)]
123    pub fn clear_bit(self) -> &'a mut W {
124        self.bit(false)
125    }
126    #[doc = r"Writes raw bits to the field"]
127    #[inline(always)]
128    pub fn bit(self, value: bool) -> &'a mut W {
129        self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
130        self.w
131    }
132}
133#[doc = "Reader of field `SPI2EN`"]
134pub type SPI2EN_R = crate::R<bool, bool>;
135#[doc = "Write proxy for field `SPI2EN`"]
136pub struct SPI2EN_W<'a> {
137    w: &'a mut W,
138}
139impl<'a> SPI2EN_W<'a> {
140    #[doc = r"Sets the field bit"]
141    #[inline(always)]
142    pub fn set_bit(self) -> &'a mut W {
143        self.bit(true)
144    }
145    #[doc = r"Clears the field bit"]
146    #[inline(always)]
147    pub fn clear_bit(self) -> &'a mut W {
148        self.bit(false)
149    }
150    #[doc = r"Writes raw bits to the field"]
151    #[inline(always)]
152    pub fn bit(self, value: bool) -> &'a mut W {
153        self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
154        self.w
155    }
156}
157#[doc = "Reader of field `WWDGEN`"]
158pub type WWDGEN_R = crate::R<bool, bool>;
159#[doc = "Write proxy for field `WWDGEN`"]
160pub struct WWDGEN_W<'a> {
161    w: &'a mut W,
162}
163impl<'a> WWDGEN_W<'a> {
164    #[doc = r"Sets the field bit"]
165    #[inline(always)]
166    pub fn set_bit(self) -> &'a mut W {
167        self.bit(true)
168    }
169    #[doc = r"Clears the field bit"]
170    #[inline(always)]
171    pub fn clear_bit(self) -> &'a mut W {
172        self.bit(false)
173    }
174    #[doc = r"Writes raw bits to the field"]
175    #[inline(always)]
176    pub fn bit(self, value: bool) -> &'a mut W {
177        self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
178        self.w
179    }
180}
181#[doc = "Reader of field `RTCAPBEN`"]
182pub type RTCAPBEN_R = crate::R<bool, bool>;
183#[doc = "Write proxy for field `RTCAPBEN`"]
184pub struct RTCAPBEN_W<'a> {
185    w: &'a mut W,
186}
187impl<'a> RTCAPBEN_W<'a> {
188    #[doc = r"Sets the field bit"]
189    #[inline(always)]
190    pub fn set_bit(self) -> &'a mut W {
191        self.bit(true)
192    }
193    #[doc = r"Clears the field bit"]
194    #[inline(always)]
195    pub fn clear_bit(self) -> &'a mut W {
196        self.bit(false)
197    }
198    #[doc = r"Writes raw bits to the field"]
199    #[inline(always)]
200    pub fn bit(self, value: bool) -> &'a mut W {
201        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
202        self.w
203    }
204}
205#[doc = "Reader of field `LCDEN`"]
206pub type LCDEN_R = crate::R<bool, bool>;
207#[doc = "Write proxy for field `LCDEN`"]
208pub struct LCDEN_W<'a> {
209    w: &'a mut W,
210}
211impl<'a> LCDEN_W<'a> {
212    #[doc = r"Sets the field bit"]
213    #[inline(always)]
214    pub fn set_bit(self) -> &'a mut W {
215        self.bit(true)
216    }
217    #[doc = r"Clears the field bit"]
218    #[inline(always)]
219    pub fn clear_bit(self) -> &'a mut W {
220        self.bit(false)
221    }
222    #[doc = r"Writes raw bits to the field"]
223    #[inline(always)]
224    pub fn bit(self, value: bool) -> &'a mut W {
225        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
226        self.w
227    }
228}
229#[doc = "Reader of field `TIM2EN`"]
230pub type TIM2EN_R = crate::R<bool, bool>;
231#[doc = "Write proxy for field `TIM2EN`"]
232pub struct TIM2EN_W<'a> {
233    w: &'a mut W,
234}
235impl<'a> TIM2EN_W<'a> {
236    #[doc = r"Sets the field bit"]
237    #[inline(always)]
238    pub fn set_bit(self) -> &'a mut W {
239        self.bit(true)
240    }
241    #[doc = r"Clears the field bit"]
242    #[inline(always)]
243    pub fn clear_bit(self) -> &'a mut W {
244        self.bit(false)
245    }
246    #[doc = r"Writes raw bits to the field"]
247    #[inline(always)]
248    pub fn bit(self, value: bool) -> &'a mut W {
249        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
250        self.w
251    }
252}
253impl R {
254    #[doc = "Bit 31 - CPU1 Low power timer 1 clock enable"]
255    #[inline(always)]
256    pub fn lptim1en(&self) -> LPTIM1EN_R {
257        LPTIM1EN_R::new(((self.bits >> 31) & 0x01) != 0)
258    }
259    #[doc = "Bit 26 - CPU1 USB clock enable"]
260    #[inline(always)]
261    pub fn usben(&self) -> USBEN_R {
262        USBEN_R::new(((self.bits >> 26) & 0x01) != 0)
263    }
264    #[doc = "Bit 24 - CPU1 CRS clock enable"]
265    #[inline(always)]
266    pub fn crsen(&self) -> CRSEN_R {
267        CRSEN_R::new(((self.bits >> 24) & 0x01) != 0)
268    }
269    #[doc = "Bit 23 - CPU1 I2C3 clock enable"]
270    #[inline(always)]
271    pub fn i2c3en(&self) -> I2C3EN_R {
272        I2C3EN_R::new(((self.bits >> 23) & 0x01) != 0)
273    }
274    #[doc = "Bit 21 - CPU1 I2C1 clock enable"]
275    #[inline(always)]
276    pub fn i2c1en(&self) -> I2C1EN_R {
277        I2C1EN_R::new(((self.bits >> 21) & 0x01) != 0)
278    }
279    #[doc = "Bit 14 - CPU1 SPI2 clock enable"]
280    #[inline(always)]
281    pub fn spi2en(&self) -> SPI2EN_R {
282        SPI2EN_R::new(((self.bits >> 14) & 0x01) != 0)
283    }
284    #[doc = "Bit 11 - CPU1 Window watchdog clock enable"]
285    #[inline(always)]
286    pub fn wwdgen(&self) -> WWDGEN_R {
287        WWDGEN_R::new(((self.bits >> 11) & 0x01) != 0)
288    }
289    #[doc = "Bit 10 - CPU1 RTC APB clock enable"]
290    #[inline(always)]
291    pub fn rtcapben(&self) -> RTCAPBEN_R {
292        RTCAPBEN_R::new(((self.bits >> 10) & 0x01) != 0)
293    }
294    #[doc = "Bit 9 - CPU1 LCD clock enable"]
295    #[inline(always)]
296    pub fn lcden(&self) -> LCDEN_R {
297        LCDEN_R::new(((self.bits >> 9) & 0x01) != 0)
298    }
299    #[doc = "Bit 0 - CPU1 TIM2 timer clock enable"]
300    #[inline(always)]
301    pub fn tim2en(&self) -> TIM2EN_R {
302        TIM2EN_R::new((self.bits & 0x01) != 0)
303    }
304}
305impl W {
306    #[doc = "Bit 31 - CPU1 Low power timer 1 clock enable"]
307    #[inline(always)]
308    pub fn lptim1en(&mut self) -> LPTIM1EN_W {
309        LPTIM1EN_W { w: self }
310    }
311    #[doc = "Bit 26 - CPU1 USB clock enable"]
312    #[inline(always)]
313    pub fn usben(&mut self) -> USBEN_W {
314        USBEN_W { w: self }
315    }
316    #[doc = "Bit 24 - CPU1 CRS clock enable"]
317    #[inline(always)]
318    pub fn crsen(&mut self) -> CRSEN_W {
319        CRSEN_W { w: self }
320    }
321    #[doc = "Bit 23 - CPU1 I2C3 clock enable"]
322    #[inline(always)]
323    pub fn i2c3en(&mut self) -> I2C3EN_W {
324        I2C3EN_W { w: self }
325    }
326    #[doc = "Bit 21 - CPU1 I2C1 clock enable"]
327    #[inline(always)]
328    pub fn i2c1en(&mut self) -> I2C1EN_W {
329        I2C1EN_W { w: self }
330    }
331    #[doc = "Bit 14 - CPU1 SPI2 clock enable"]
332    #[inline(always)]
333    pub fn spi2en(&mut self) -> SPI2EN_W {
334        SPI2EN_W { w: self }
335    }
336    #[doc = "Bit 11 - CPU1 Window watchdog clock enable"]
337    #[inline(always)]
338    pub fn wwdgen(&mut self) -> WWDGEN_W {
339        WWDGEN_W { w: self }
340    }
341    #[doc = "Bit 10 - CPU1 RTC APB clock enable"]
342    #[inline(always)]
343    pub fn rtcapben(&mut self) -> RTCAPBEN_W {
344        RTCAPBEN_W { w: self }
345    }
346    #[doc = "Bit 9 - CPU1 LCD clock enable"]
347    #[inline(always)]
348    pub fn lcden(&mut self) -> LCDEN_W {
349        LCDEN_W { w: self }
350    }
351    #[doc = "Bit 0 - CPU1 TIM2 timer clock enable"]
352    #[inline(always)]
353    pub fn tim2en(&mut self) -> TIM2EN_W {
354        TIM2EN_W { w: self }
355    }
356}
stm32wb_pac/rcc/apb1enr1.rs

stm32wb_pac/rcc/
apb1enr1.rs
