stm32wb_pac/pka/
cr.rs

1#[doc = "Reader of register CR"]
2pub type R = crate::R<u32, super::CR>;
3#[doc = "Writer for register CR"]
4pub type W = crate::W<u32, super::CR>;
5#[doc = "Register CR `reset()`'s with value 0"]
6impl crate::ResetValue for super::CR {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `ADDRERRIE`"]
14pub type ADDRERRIE_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `ADDRERRIE`"]
16pub struct ADDRERRIE_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> ADDRERRIE_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
34        self.w
35    }
36}
37#[doc = "Reader of field `RAMERRIE`"]
38pub type RAMERRIE_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `RAMERRIE`"]
40pub struct RAMERRIE_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> RAMERRIE_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
58        self.w
59    }
60}
61#[doc = "Reader of field `PROCENDIE`"]
62pub type PROCENDIE_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `PROCENDIE`"]
64pub struct PROCENDIE_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> PROCENDIE_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
82        self.w
83    }
84}
85#[doc = "Reader of field `MODE`"]
86pub type MODE_R = crate::R<u8, u8>;
87#[doc = "Write proxy for field `MODE`"]
88pub struct MODE_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> MODE_W<'a> {
92    #[doc = r"Writes raw bits to the field"]
93    #[inline(always)]
94    pub unsafe fn bits(self, value: u8) -> &'a mut W {
95        self.w.bits = (self.w.bits & !(0x3f << 8)) | (((value as u32) & 0x3f) << 8);
96        self.w
97    }
98}
99#[doc = "Reader of field `SECLVL`"]
100pub type SECLVL_R = crate::R<bool, bool>;
101#[doc = "Write proxy for field `SECLVL`"]
102pub struct SECLVL_W<'a> {
103    w: &'a mut W,
104}
105impl<'a> SECLVL_W<'a> {
106    #[doc = r"Sets the field bit"]
107    #[inline(always)]
108    pub fn set_bit(self) -> &'a mut W {
109        self.bit(true)
110    }
111    #[doc = r"Clears the field bit"]
112    #[inline(always)]
113    pub fn clear_bit(self) -> &'a mut W {
114        self.bit(false)
115    }
116    #[doc = r"Writes raw bits to the field"]
117    #[inline(always)]
118    pub fn bit(self, value: bool) -> &'a mut W {
119        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
120        self.w
121    }
122}
123#[doc = "Reader of field `START`"]
124pub type START_R = crate::R<bool, bool>;
125#[doc = "Write proxy for field `START`"]
126pub struct START_W<'a> {
127    w: &'a mut W,
128}
129impl<'a> START_W<'a> {
130    #[doc = r"Sets the field bit"]
131    #[inline(always)]
132    pub fn set_bit(self) -> &'a mut W {
133        self.bit(true)
134    }
135    #[doc = r"Clears the field bit"]
136    #[inline(always)]
137    pub fn clear_bit(self) -> &'a mut W {
138        self.bit(false)
139    }
140    #[doc = r"Writes raw bits to the field"]
141    #[inline(always)]
142    pub fn bit(self, value: bool) -> &'a mut W {
143        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
144        self.w
145    }
146}
147#[doc = "Reader of field `EN`"]
148pub type EN_R = crate::R<bool, bool>;
149#[doc = "Write proxy for field `EN`"]
150pub struct EN_W<'a> {
151    w: &'a mut W,
152}
153impl<'a> EN_W<'a> {
154    #[doc = r"Sets the field bit"]
155    #[inline(always)]
156    pub fn set_bit(self) -> &'a mut W {
157        self.bit(true)
158    }
159    #[doc = r"Clears the field bit"]
160    #[inline(always)]
161    pub fn clear_bit(self) -> &'a mut W {
162        self.bit(false)
163    }
164    #[doc = r"Writes raw bits to the field"]
165    #[inline(always)]
166    pub fn bit(self, value: bool) -> &'a mut W {
167        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
168        self.w
169    }
170}
171impl R {
172    #[doc = "Bit 20 - Address error interrupt enable"]
173    #[inline(always)]
174    pub fn addrerrie(&self) -> ADDRERRIE_R {
175        ADDRERRIE_R::new(((self.bits >> 20) & 0x01) != 0)
176    }
177    #[doc = "Bit 19 - RAM error interrupt enable"]
178    #[inline(always)]
179    pub fn ramerrie(&self) -> RAMERRIE_R {
180        RAMERRIE_R::new(((self.bits >> 19) & 0x01) != 0)
181    }
182    #[doc = "Bit 17 - End of operation interrupt enable"]
183    #[inline(always)]
184    pub fn procendie(&self) -> PROCENDIE_R {
185        PROCENDIE_R::new(((self.bits >> 17) & 0x01) != 0)
186    }
187    #[doc = "Bits 8:13 - PKA Operation Mode"]
188    #[inline(always)]
189    pub fn mode(&self) -> MODE_R {
190        MODE_R::new(((self.bits >> 8) & 0x3f) as u8)
191    }
192    #[doc = "Bit 2 - Security Enable"]
193    #[inline(always)]
194    pub fn seclvl(&self) -> SECLVL_R {
195        SECLVL_R::new(((self.bits >> 2) & 0x01) != 0)
196    }
197    #[doc = "Bit 1 - Start the operation"]
198    #[inline(always)]
199    pub fn start(&self) -> START_R {
200        START_R::new(((self.bits >> 1) & 0x01) != 0)
201    }
202    #[doc = "Bit 0 - Peripheral Enable"]
203    #[inline(always)]
204    pub fn en(&self) -> EN_R {
205        EN_R::new((self.bits & 0x01) != 0)
206    }
207}
208impl W {
209    #[doc = "Bit 20 - Address error interrupt enable"]
210    #[inline(always)]
211    pub fn addrerrie(&mut self) -> ADDRERRIE_W {
212        ADDRERRIE_W { w: self }
213    }
214    #[doc = "Bit 19 - RAM error interrupt enable"]
215    #[inline(always)]
216    pub fn ramerrie(&mut self) -> RAMERRIE_W {
217        RAMERRIE_W { w: self }
218    }
219    #[doc = "Bit 17 - End of operation interrupt enable"]
220    #[inline(always)]
221    pub fn procendie(&mut self) -> PROCENDIE_W {
222        PROCENDIE_W { w: self }
223    }
224    #[doc = "Bits 8:13 - PKA Operation Mode"]
225    #[inline(always)]
226    pub fn mode(&mut self) -> MODE_W {
227        MODE_W { w: self }
228    }
229    #[doc = "Bit 2 - Security Enable"]
230    #[inline(always)]
231    pub fn seclvl(&mut self) -> SECLVL_W {
232        SECLVL_W { w: self }
233    }
234    #[doc = "Bit 1 - Start the operation"]
235    #[inline(always)]
236    pub fn start(&mut self) -> START_W {
237        START_W { w: self }
238    }
239    #[doc = "Bit 0 - Peripheral Enable"]
240    #[inline(always)]
241    pub fn en(&mut self) -> EN_W {
242        EN_W { w: self }
243    }
244}
stm32wb_pac/pka/cr.rs

stm32wb_pac/pka/
cr.rs
