stm32wb_pac/gpioh/
afrl.rs

1#[doc = "Reader of register AFRL"]
2pub type R = crate::R<u32, super::AFRL>;
3#[doc = "Writer for register AFRL"]
4pub type W = crate::W<u32, super::AFRL>;
5#[doc = "Register AFRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::AFRL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `AFSEL3`"]
14pub type AFSEL3_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `AFSEL3`"]
16pub struct AFSEL3_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> AFSEL3_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !(0x0f << 12)) | (((value as u32) & 0x0f) << 12);
24        self.w
25    }
26}
27#[doc = "Reader of field `AFSEL1`"]
28pub type AFSEL1_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `AFSEL1`"]
30pub struct AFSEL1_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> AFSEL1_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4);
38        self.w
39    }
40}
41#[doc = "Reader of field `AFSEL0`"]
42pub type AFSEL0_R = crate::R<u8, u8>;
43#[doc = "Write proxy for field `AFSEL0`"]
44pub struct AFSEL0_W<'a> {
45    w: &'a mut W,
46}
47impl<'a> AFSEL0_W<'a> {
48    #[doc = r"Writes raw bits to the field"]
49    #[inline(always)]
50    pub unsafe fn bits(self, value: u8) -> &'a mut W {
51        self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f);
52        self.w
53    }
54}
55impl R {
56    #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)"]
57    #[inline(always)]
58    pub fn afsel3(&self) -> AFSEL3_R {
59        AFSEL3_R::new(((self.bits >> 12) & 0x0f) as u8)
60    }
61    #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)"]
62    #[inline(always)]
63    pub fn afsel1(&self) -> AFSEL1_R {
64        AFSEL1_R::new(((self.bits >> 4) & 0x0f) as u8)
65    }
66    #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)"]
67    #[inline(always)]
68    pub fn afsel0(&self) -> AFSEL0_R {
69        AFSEL0_R::new((self.bits & 0x0f) as u8)
70    }
71}
72impl W {
73    #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)"]
74    #[inline(always)]
75    pub fn afsel3(&mut self) -> AFSEL3_W {
76        AFSEL3_W { w: self }
77    }
78    #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)"]
79    #[inline(always)]
80    pub fn afsel1(&mut self) -> AFSEL1_W {
81        AFSEL1_W { w: self }
82    }
83    #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)"]
84    #[inline(always)]
85    pub fn afsel0(&mut self) -> AFSEL0_W {
86        AFSEL0_W { w: self }
87    }
88}
stm32wb_pac/gpioh/afrl.rs

stm32wb_pac/gpioh/
afrl.rs
