stm32wb_pac/gpioa/
afrl.rs

1#[doc = "Reader of register AFRL"]
2pub type R = crate::R<u32, super::AFRL>;
3#[doc = "Writer for register AFRL"]
4pub type W = crate::W<u32, super::AFRL>;
5#[doc = "Register AFRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::AFRL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `AFSEL7`"]
14pub type AFSEL7_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `AFSEL7`"]
16pub struct AFSEL7_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> AFSEL7_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !(0x0f << 28)) | (((value as u32) & 0x0f) << 28);
24        self.w
25    }
26}
27#[doc = "Reader of field `AFSEL6`"]
28pub type AFSEL6_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `AFSEL6`"]
30pub struct AFSEL6_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> AFSEL6_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0x0f << 24)) | (((value as u32) & 0x0f) << 24);
38        self.w
39    }
40}
41#[doc = "Reader of field `AFSEL5`"]
42pub type AFSEL5_R = crate::R<u8, u8>;
43#[doc = "Write proxy for field `AFSEL5`"]
44pub struct AFSEL5_W<'a> {
45    w: &'a mut W,
46}
47impl<'a> AFSEL5_W<'a> {
48    #[doc = r"Writes raw bits to the field"]
49    #[inline(always)]
50    pub unsafe fn bits(self, value: u8) -> &'a mut W {
51        self.w.bits = (self.w.bits & !(0x0f << 20)) | (((value as u32) & 0x0f) << 20);
52        self.w
53    }
54}
55#[doc = "Reader of field `AFSEL4`"]
56pub type AFSEL4_R = crate::R<u8, u8>;
57#[doc = "Write proxy for field `AFSEL4`"]
58pub struct AFSEL4_W<'a> {
59    w: &'a mut W,
60}
61impl<'a> AFSEL4_W<'a> {
62    #[doc = r"Writes raw bits to the field"]
63    #[inline(always)]
64    pub unsafe fn bits(self, value: u8) -> &'a mut W {
65        self.w.bits = (self.w.bits & !(0x0f << 16)) | (((value as u32) & 0x0f) << 16);
66        self.w
67    }
68}
69#[doc = "Reader of field `AFSEL3`"]
70pub type AFSEL3_R = crate::R<u8, u8>;
71#[doc = "Write proxy for field `AFSEL3`"]
72pub struct AFSEL3_W<'a> {
73    w: &'a mut W,
74}
75impl<'a> AFSEL3_W<'a> {
76    #[doc = r"Writes raw bits to the field"]
77    #[inline(always)]
78    pub unsafe fn bits(self, value: u8) -> &'a mut W {
79        self.w.bits = (self.w.bits & !(0x0f << 12)) | (((value as u32) & 0x0f) << 12);
80        self.w
81    }
82}
83#[doc = "Reader of field `AFSEL2`"]
84pub type AFSEL2_R = crate::R<u8, u8>;
85#[doc = "Write proxy for field `AFSEL2`"]
86pub struct AFSEL2_W<'a> {
87    w: &'a mut W,
88}
89impl<'a> AFSEL2_W<'a> {
90    #[doc = r"Writes raw bits to the field"]
91    #[inline(always)]
92    pub unsafe fn bits(self, value: u8) -> &'a mut W {
93        self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8);
94        self.w
95    }
96}
97#[doc = "Reader of field `AFSEL1`"]
98pub type AFSEL1_R = crate::R<u8, u8>;
99#[doc = "Write proxy for field `AFSEL1`"]
100pub struct AFSEL1_W<'a> {
101    w: &'a mut W,
102}
103impl<'a> AFSEL1_W<'a> {
104    #[doc = r"Writes raw bits to the field"]
105    #[inline(always)]
106    pub unsafe fn bits(self, value: u8) -> &'a mut W {
107        self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4);
108        self.w
109    }
110}
111#[doc = "Reader of field `AFSEL0`"]
112pub type AFSEL0_R = crate::R<u8, u8>;
113#[doc = "Write proxy for field `AFSEL0`"]
114pub struct AFSEL0_W<'a> {
115    w: &'a mut W,
116}
117impl<'a> AFSEL0_W<'a> {
118    #[doc = r"Writes raw bits to the field"]
119    #[inline(always)]
120    pub unsafe fn bits(self, value: u8) -> &'a mut W {
121        self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f);
122        self.w
123    }
124}
125impl R {
126    #[doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)"]
127    #[inline(always)]
128    pub fn afsel7(&self) -> AFSEL7_R {
129        AFSEL7_R::new(((self.bits >> 28) & 0x0f) as u8)
130    }
131    #[doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)"]
132    #[inline(always)]
133    pub fn afsel6(&self) -> AFSEL6_R {
134        AFSEL6_R::new(((self.bits >> 24) & 0x0f) as u8)
135    }
136    #[doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)"]
137    #[inline(always)]
138    pub fn afsel5(&self) -> AFSEL5_R {
139        AFSEL5_R::new(((self.bits >> 20) & 0x0f) as u8)
140    }
141    #[doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)"]
142    #[inline(always)]
143    pub fn afsel4(&self) -> AFSEL4_R {
144        AFSEL4_R::new(((self.bits >> 16) & 0x0f) as u8)
145    }
146    #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)"]
147    #[inline(always)]
148    pub fn afsel3(&self) -> AFSEL3_R {
149        AFSEL3_R::new(((self.bits >> 12) & 0x0f) as u8)
150    }
151    #[doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)"]
152    #[inline(always)]
153    pub fn afsel2(&self) -> AFSEL2_R {
154        AFSEL2_R::new(((self.bits >> 8) & 0x0f) as u8)
155    }
156    #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)"]
157    #[inline(always)]
158    pub fn afsel1(&self) -> AFSEL1_R {
159        AFSEL1_R::new(((self.bits >> 4) & 0x0f) as u8)
160    }
161    #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)"]
162    #[inline(always)]
163    pub fn afsel0(&self) -> AFSEL0_R {
164        AFSEL0_R::new((self.bits & 0x0f) as u8)
165    }
166}
167impl W {
168    #[doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)"]
169    #[inline(always)]
170    pub fn afsel7(&mut self) -> AFSEL7_W {
171        AFSEL7_W { w: self }
172    }
173    #[doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)"]
174    #[inline(always)]
175    pub fn afsel6(&mut self) -> AFSEL6_W {
176        AFSEL6_W { w: self }
177    }
178    #[doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)"]
179    #[inline(always)]
180    pub fn afsel5(&mut self) -> AFSEL5_W {
181        AFSEL5_W { w: self }
182    }
183    #[doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)"]
184    #[inline(always)]
185    pub fn afsel4(&mut self) -> AFSEL4_W {
186        AFSEL4_W { w: self }
187    }
188    #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)"]
189    #[inline(always)]
190    pub fn afsel3(&mut self) -> AFSEL3_W {
191        AFSEL3_W { w: self }
192    }
193    #[doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)"]
194    #[inline(always)]
195    pub fn afsel2(&mut self) -> AFSEL2_W {
196        AFSEL2_W { w: self }
197    }
198    #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)"]
199    #[inline(always)]
200    pub fn afsel1(&mut self) -> AFSEL1_W {
201        AFSEL1_W { w: self }
202    }
203    #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)"]
204    #[inline(always)]
205    pub fn afsel0(&mut self) -> AFSEL0_W {
206        AFSEL0_W { w: self }
207    }
208}
stm32wb_pac/gpioa/afrl.rs

stm32wb_pac/gpioa/
afrl.rs
