stm32wb_pac/flash/
optr.rs

1#[doc = "Reader of register OPTR"]
2pub type R = crate::R<u32, super::OPTR>;
3#[doc = "Writer for register OPTR"]
4pub type W = crate::W<u32, super::OPTR>;
5#[doc = "Register OPTR `reset()`'s with value 0x1070_8000"]
6impl crate::ResetValue for super::OPTR {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x1070_8000
11    }
12}
13#[doc = "Reader of field `RDP`"]
14pub type RDP_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `RDP`"]
16pub struct RDP_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> RDP_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff);
24        self.w
25    }
26}
27#[doc = "Reader of field `ESE`"]
28pub type ESE_R = crate::R<bool, bool>;
29#[doc = "Write proxy for field `ESE`"]
30pub struct ESE_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> ESE_W<'a> {
34    #[doc = r"Sets the field bit"]
35    #[inline(always)]
36    pub fn set_bit(self) -> &'a mut W {
37        self.bit(true)
38    }
39    #[doc = r"Clears the field bit"]
40    #[inline(always)]
41    pub fn clear_bit(self) -> &'a mut W {
42        self.bit(false)
43    }
44    #[doc = r"Writes raw bits to the field"]
45    #[inline(always)]
46    pub fn bit(self, value: bool) -> &'a mut W {
47        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
48        self.w
49    }
50}
51#[doc = "Reader of field `BOR_LEV`"]
52pub type BOR_LEV_R = crate::R<u8, u8>;
53#[doc = "Write proxy for field `BOR_LEV`"]
54pub struct BOR_LEV_W<'a> {
55    w: &'a mut W,
56}
57impl<'a> BOR_LEV_W<'a> {
58    #[doc = r"Writes raw bits to the field"]
59    #[inline(always)]
60    pub unsafe fn bits(self, value: u8) -> &'a mut W {
61        self.w.bits = (self.w.bits & !(0x07 << 9)) | (((value as u32) & 0x07) << 9);
62        self.w
63    }
64}
65#[doc = "Reader of field `nRST_STOP`"]
66pub type NRST_STOP_R = crate::R<bool, bool>;
67#[doc = "Write proxy for field `nRST_STOP`"]
68pub struct NRST_STOP_W<'a> {
69    w: &'a mut W,
70}
71impl<'a> NRST_STOP_W<'a> {
72    #[doc = r"Sets the field bit"]
73    #[inline(always)]
74    pub fn set_bit(self) -> &'a mut W {
75        self.bit(true)
76    }
77    #[doc = r"Clears the field bit"]
78    #[inline(always)]
79    pub fn clear_bit(self) -> &'a mut W {
80        self.bit(false)
81    }
82    #[doc = r"Writes raw bits to the field"]
83    #[inline(always)]
84    pub fn bit(self, value: bool) -> &'a mut W {
85        self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
86        self.w
87    }
88}
89#[doc = "Reader of field `nRST_STDBY`"]
90pub type NRST_STDBY_R = crate::R<bool, bool>;
91#[doc = "Write proxy for field `nRST_STDBY`"]
92pub struct NRST_STDBY_W<'a> {
93    w: &'a mut W,
94}
95impl<'a> NRST_STDBY_W<'a> {
96    #[doc = r"Sets the field bit"]
97    #[inline(always)]
98    pub fn set_bit(self) -> &'a mut W {
99        self.bit(true)
100    }
101    #[doc = r"Clears the field bit"]
102    #[inline(always)]
103    pub fn clear_bit(self) -> &'a mut W {
104        self.bit(false)
105    }
106    #[doc = r"Writes raw bits to the field"]
107    #[inline(always)]
108    pub fn bit(self, value: bool) -> &'a mut W {
109        self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
110        self.w
111    }
112}
113#[doc = "Reader of field `nRST_SHDW`"]
114pub type NRST_SHDW_R = crate::R<bool, bool>;
115#[doc = "Write proxy for field `nRST_SHDW`"]
116pub struct NRST_SHDW_W<'a> {
117    w: &'a mut W,
118}
119impl<'a> NRST_SHDW_W<'a> {
120    #[doc = r"Sets the field bit"]
121    #[inline(always)]
122    pub fn set_bit(self) -> &'a mut W {
123        self.bit(true)
124    }
125    #[doc = r"Clears the field bit"]
126    #[inline(always)]
127    pub fn clear_bit(self) -> &'a mut W {
128        self.bit(false)
129    }
130    #[doc = r"Writes raw bits to the field"]
131    #[inline(always)]
132    pub fn bit(self, value: bool) -> &'a mut W {
133        self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
134        self.w
135    }
136}
137#[doc = "Reader of field `IDWG_SW`"]
138pub type IDWG_SW_R = crate::R<bool, bool>;
139#[doc = "Write proxy for field `IDWG_SW`"]
140pub struct IDWG_SW_W<'a> {
141    w: &'a mut W,
142}
143impl<'a> IDWG_SW_W<'a> {
144    #[doc = r"Sets the field bit"]
145    #[inline(always)]
146    pub fn set_bit(self) -> &'a mut W {
147        self.bit(true)
148    }
149    #[doc = r"Clears the field bit"]
150    #[inline(always)]
151    pub fn clear_bit(self) -> &'a mut W {
152        self.bit(false)
153    }
154    #[doc = r"Writes raw bits to the field"]
155    #[inline(always)]
156    pub fn bit(self, value: bool) -> &'a mut W {
157        self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
158        self.w
159    }
160}
161#[doc = "Reader of field `IWDG_STOP`"]
162pub type IWDG_STOP_R = crate::R<bool, bool>;
163#[doc = "Write proxy for field `IWDG_STOP`"]
164pub struct IWDG_STOP_W<'a> {
165    w: &'a mut W,
166}
167impl<'a> IWDG_STOP_W<'a> {
168    #[doc = r"Sets the field bit"]
169    #[inline(always)]
170    pub fn set_bit(self) -> &'a mut W {
171        self.bit(true)
172    }
173    #[doc = r"Clears the field bit"]
174    #[inline(always)]
175    pub fn clear_bit(self) -> &'a mut W {
176        self.bit(false)
177    }
178    #[doc = r"Writes raw bits to the field"]
179    #[inline(always)]
180    pub fn bit(self, value: bool) -> &'a mut W {
181        self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
182        self.w
183    }
184}
185#[doc = "Reader of field `IWDG_STDBY`"]
186pub type IWDG_STDBY_R = crate::R<bool, bool>;
187#[doc = "Write proxy for field `IWDG_STDBY`"]
188pub struct IWDG_STDBY_W<'a> {
189    w: &'a mut W,
190}
191impl<'a> IWDG_STDBY_W<'a> {
192    #[doc = r"Sets the field bit"]
193    #[inline(always)]
194    pub fn set_bit(self) -> &'a mut W {
195        self.bit(true)
196    }
197    #[doc = r"Clears the field bit"]
198    #[inline(always)]
199    pub fn clear_bit(self) -> &'a mut W {
200        self.bit(false)
201    }
202    #[doc = r"Writes raw bits to the field"]
203    #[inline(always)]
204    pub fn bit(self, value: bool) -> &'a mut W {
205        self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
206        self.w
207    }
208}
209#[doc = "Reader of field `WWDG_SW`"]
210pub type WWDG_SW_R = crate::R<bool, bool>;
211#[doc = "Write proxy for field `WWDG_SW`"]
212pub struct WWDG_SW_W<'a> {
213    w: &'a mut W,
214}
215impl<'a> WWDG_SW_W<'a> {
216    #[doc = r"Sets the field bit"]
217    #[inline(always)]
218    pub fn set_bit(self) -> &'a mut W {
219        self.bit(true)
220    }
221    #[doc = r"Clears the field bit"]
222    #[inline(always)]
223    pub fn clear_bit(self) -> &'a mut W {
224        self.bit(false)
225    }
226    #[doc = r"Writes raw bits to the field"]
227    #[inline(always)]
228    pub fn bit(self, value: bool) -> &'a mut W {
229        self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
230        self.w
231    }
232}
233#[doc = "Reader of field `nBOOT1`"]
234pub type NBOOT1_R = crate::R<bool, bool>;
235#[doc = "Write proxy for field `nBOOT1`"]
236pub struct NBOOT1_W<'a> {
237    w: &'a mut W,
238}
239impl<'a> NBOOT1_W<'a> {
240    #[doc = r"Sets the field bit"]
241    #[inline(always)]
242    pub fn set_bit(self) -> &'a mut W {
243        self.bit(true)
244    }
245    #[doc = r"Clears the field bit"]
246    #[inline(always)]
247    pub fn clear_bit(self) -> &'a mut W {
248        self.bit(false)
249    }
250    #[doc = r"Writes raw bits to the field"]
251    #[inline(always)]
252    pub fn bit(self, value: bool) -> &'a mut W {
253        self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
254        self.w
255    }
256}
257#[doc = "Reader of field `SRAM2_PE`"]
258pub type SRAM2_PE_R = crate::R<bool, bool>;
259#[doc = "Write proxy for field `SRAM2_PE`"]
260pub struct SRAM2_PE_W<'a> {
261    w: &'a mut W,
262}
263impl<'a> SRAM2_PE_W<'a> {
264    #[doc = r"Sets the field bit"]
265    #[inline(always)]
266    pub fn set_bit(self) -> &'a mut W {
267        self.bit(true)
268    }
269    #[doc = r"Clears the field bit"]
270    #[inline(always)]
271    pub fn clear_bit(self) -> &'a mut W {
272        self.bit(false)
273    }
274    #[doc = r"Writes raw bits to the field"]
275    #[inline(always)]
276    pub fn bit(self, value: bool) -> &'a mut W {
277        self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
278        self.w
279    }
280}
281#[doc = "Reader of field `SRAM2_RST`"]
282pub type SRAM2_RST_R = crate::R<bool, bool>;
283#[doc = "Write proxy for field `SRAM2_RST`"]
284pub struct SRAM2_RST_W<'a> {
285    w: &'a mut W,
286}
287impl<'a> SRAM2_RST_W<'a> {
288    #[doc = r"Sets the field bit"]
289    #[inline(always)]
290    pub fn set_bit(self) -> &'a mut W {
291        self.bit(true)
292    }
293    #[doc = r"Clears the field bit"]
294    #[inline(always)]
295    pub fn clear_bit(self) -> &'a mut W {
296        self.bit(false)
297    }
298    #[doc = r"Writes raw bits to the field"]
299    #[inline(always)]
300    pub fn bit(self, value: bool) -> &'a mut W {
301        self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
302        self.w
303    }
304}
305#[doc = "Reader of field `nSWBOOT0`"]
306pub type NSWBOOT0_R = crate::R<bool, bool>;
307#[doc = "Write proxy for field `nSWBOOT0`"]
308pub struct NSWBOOT0_W<'a> {
309    w: &'a mut W,
310}
311impl<'a> NSWBOOT0_W<'a> {
312    #[doc = r"Sets the field bit"]
313    #[inline(always)]
314    pub fn set_bit(self) -> &'a mut W {
315        self.bit(true)
316    }
317    #[doc = r"Clears the field bit"]
318    #[inline(always)]
319    pub fn clear_bit(self) -> &'a mut W {
320        self.bit(false)
321    }
322    #[doc = r"Writes raw bits to the field"]
323    #[inline(always)]
324    pub fn bit(self, value: bool) -> &'a mut W {
325        self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
326        self.w
327    }
328}
329#[doc = "Reader of field `nBOOT0`"]
330pub type NBOOT0_R = crate::R<bool, bool>;
331#[doc = "Write proxy for field `nBOOT0`"]
332pub struct NBOOT0_W<'a> {
333    w: &'a mut W,
334}
335impl<'a> NBOOT0_W<'a> {
336    #[doc = r"Sets the field bit"]
337    #[inline(always)]
338    pub fn set_bit(self) -> &'a mut W {
339        self.bit(true)
340    }
341    #[doc = r"Clears the field bit"]
342    #[inline(always)]
343    pub fn clear_bit(self) -> &'a mut W {
344        self.bit(false)
345    }
346    #[doc = r"Writes raw bits to the field"]
347    #[inline(always)]
348    pub fn bit(self, value: bool) -> &'a mut W {
349        self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27);
350        self.w
351    }
352}
353#[doc = "Reader of field `AGC_TRIM`"]
354pub type AGC_TRIM_R = crate::R<u8, u8>;
355#[doc = "Write proxy for field `AGC_TRIM`"]
356pub struct AGC_TRIM_W<'a> {
357    w: &'a mut W,
358}
359impl<'a> AGC_TRIM_W<'a> {
360    #[doc = r"Writes raw bits to the field"]
361    #[inline(always)]
362    pub unsafe fn bits(self, value: u8) -> &'a mut W {
363        self.w.bits = (self.w.bits & !(0x07 << 29)) | (((value as u32) & 0x07) << 29);
364        self.w
365    }
366}
367impl R {
368    #[doc = "Bits 0:7 - Read protection level"]
369    #[inline(always)]
370    pub fn rdp(&self) -> RDP_R {
371        RDP_R::new((self.bits & 0xff) as u8)
372    }
373    #[doc = "Bit 8 - Security enabled"]
374    #[inline(always)]
375    pub fn ese(&self) -> ESE_R {
376        ESE_R::new(((self.bits >> 8) & 0x01) != 0)
377    }
378    #[doc = "Bits 9:11 - BOR reset Level"]
379    #[inline(always)]
380    pub fn bor_lev(&self) -> BOR_LEV_R {
381        BOR_LEV_R::new(((self.bits >> 9) & 0x07) as u8)
382    }
383    #[doc = "Bit 12 - nRST_STOP"]
384    #[inline(always)]
385    pub fn n_rst_stop(&self) -> NRST_STOP_R {
386        NRST_STOP_R::new(((self.bits >> 12) & 0x01) != 0)
387    }
388    #[doc = "Bit 13 - nRST_STDBY"]
389    #[inline(always)]
390    pub fn n_rst_stdby(&self) -> NRST_STDBY_R {
391        NRST_STDBY_R::new(((self.bits >> 13) & 0x01) != 0)
392    }
393    #[doc = "Bit 14 - nRST_SHDW"]
394    #[inline(always)]
395    pub fn n_rst_shdw(&self) -> NRST_SHDW_R {
396        NRST_SHDW_R::new(((self.bits >> 14) & 0x01) != 0)
397    }
398    #[doc = "Bit 16 - Independent watchdog selection"]
399    #[inline(always)]
400    pub fn idwg_sw(&self) -> IDWG_SW_R {
401        IDWG_SW_R::new(((self.bits >> 16) & 0x01) != 0)
402    }
403    #[doc = "Bit 17 - Independent watchdog counter freeze in Stop mode"]
404    #[inline(always)]
405    pub fn iwdg_stop(&self) -> IWDG_STOP_R {
406        IWDG_STOP_R::new(((self.bits >> 17) & 0x01) != 0)
407    }
408    #[doc = "Bit 18 - Independent watchdog counter freeze in Standby mode"]
409    #[inline(always)]
410    pub fn iwdg_stdby(&self) -> IWDG_STDBY_R {
411        IWDG_STDBY_R::new(((self.bits >> 18) & 0x01) != 0)
412    }
413    #[doc = "Bit 19 - Window watchdog selection"]
414    #[inline(always)]
415    pub fn wwdg_sw(&self) -> WWDG_SW_R {
416        WWDG_SW_R::new(((self.bits >> 19) & 0x01) != 0)
417    }
418    #[doc = "Bit 23 - Boot configuration"]
419    #[inline(always)]
420    pub fn n_boot1(&self) -> NBOOT1_R {
421        NBOOT1_R::new(((self.bits >> 23) & 0x01) != 0)
422    }
423    #[doc = "Bit 24 - SRAM2 parity check enable"]
424    #[inline(always)]
425    pub fn sram2_pe(&self) -> SRAM2_PE_R {
426        SRAM2_PE_R::new(((self.bits >> 24) & 0x01) != 0)
427    }
428    #[doc = "Bit 25 - SRAM2 Erase when system reset"]
429    #[inline(always)]
430    pub fn sram2_rst(&self) -> SRAM2_RST_R {
431        SRAM2_RST_R::new(((self.bits >> 25) & 0x01) != 0)
432    }
433    #[doc = "Bit 26 - Software Boot0"]
434    #[inline(always)]
435    pub fn n_swboot0(&self) -> NSWBOOT0_R {
436        NSWBOOT0_R::new(((self.bits >> 26) & 0x01) != 0)
437    }
438    #[doc = "Bit 27 - nBoot0 option bit"]
439    #[inline(always)]
440    pub fn n_boot0(&self) -> NBOOT0_R {
441        NBOOT0_R::new(((self.bits >> 27) & 0x01) != 0)
442    }
443    #[doc = "Bits 29:31 - Radio Automatic Gain Control Trimming"]
444    #[inline(always)]
445    pub fn agc_trim(&self) -> AGC_TRIM_R {
446        AGC_TRIM_R::new(((self.bits >> 29) & 0x07) as u8)
447    }
448}
449impl W {
450    #[doc = "Bits 0:7 - Read protection level"]
451    #[inline(always)]
452    pub fn rdp(&mut self) -> RDP_W {
453        RDP_W { w: self }
454    }
455    #[doc = "Bit 8 - Security enabled"]
456    #[inline(always)]
457    pub fn ese(&mut self) -> ESE_W {
458        ESE_W { w: self }
459    }
460    #[doc = "Bits 9:11 - BOR reset Level"]
461    #[inline(always)]
462    pub fn bor_lev(&mut self) -> BOR_LEV_W {
463        BOR_LEV_W { w: self }
464    }
465    #[doc = "Bit 12 - nRST_STOP"]
466    #[inline(always)]
467    pub fn n_rst_stop(&mut self) -> NRST_STOP_W {
468        NRST_STOP_W { w: self }
469    }
470    #[doc = "Bit 13 - nRST_STDBY"]
471    #[inline(always)]
472    pub fn n_rst_stdby(&mut self) -> NRST_STDBY_W {
473        NRST_STDBY_W { w: self }
474    }
475    #[doc = "Bit 14 - nRST_SHDW"]
476    #[inline(always)]
477    pub fn n_rst_shdw(&mut self) -> NRST_SHDW_W {
478        NRST_SHDW_W { w: self }
479    }
480    #[doc = "Bit 16 - Independent watchdog selection"]
481    #[inline(always)]
482    pub fn idwg_sw(&mut self) -> IDWG_SW_W {
483        IDWG_SW_W { w: self }
484    }
485    #[doc = "Bit 17 - Independent watchdog counter freeze in Stop mode"]
486    #[inline(always)]
487    pub fn iwdg_stop(&mut self) -> IWDG_STOP_W {
488        IWDG_STOP_W { w: self }
489    }
490    #[doc = "Bit 18 - Independent watchdog counter freeze in Standby mode"]
491    #[inline(always)]
492    pub fn iwdg_stdby(&mut self) -> IWDG_STDBY_W {
493        IWDG_STDBY_W { w: self }
494    }
495    #[doc = "Bit 19 - Window watchdog selection"]
496    #[inline(always)]
497    pub fn wwdg_sw(&mut self) -> WWDG_SW_W {
498        WWDG_SW_W { w: self }
499    }
500    #[doc = "Bit 23 - Boot configuration"]
501    #[inline(always)]
502    pub fn n_boot1(&mut self) -> NBOOT1_W {
503        NBOOT1_W { w: self }
504    }
505    #[doc = "Bit 24 - SRAM2 parity check enable"]
506    #[inline(always)]
507    pub fn sram2_pe(&mut self) -> SRAM2_PE_W {
508        SRAM2_PE_W { w: self }
509    }
510    #[doc = "Bit 25 - SRAM2 Erase when system reset"]
511    #[inline(always)]
512    pub fn sram2_rst(&mut self) -> SRAM2_RST_W {
513        SRAM2_RST_W { w: self }
514    }
515    #[doc = "Bit 26 - Software Boot0"]
516    #[inline(always)]
517    pub fn n_swboot0(&mut self) -> NSWBOOT0_W {
518        NSWBOOT0_W { w: self }
519    }
520    #[doc = "Bit 27 - nBoot0 option bit"]
521    #[inline(always)]
522    pub fn n_boot0(&mut self) -> NBOOT0_W {
523        NBOOT0_W { w: self }
524    }
525    #[doc = "Bits 29:31 - Radio Automatic Gain Control Trimming"]
526    #[inline(always)]
527    pub fn agc_trim(&mut self) -> AGC_TRIM_W {
528        AGC_TRIM_W { w: self }
529    }
530}
stm32wb_pac/flash/optr.rs

stm32wb_pac/flash/
optr.rs
