stm32wb_pac/flash/
eccr.rs1#[doc = "Reader of register ECCR"]
2pub type R = crate::R<u32, super::ECCR>;
3#[doc = "Writer for register ECCR"]
4pub type W = crate::W<u32, super::ECCR>;
5#[doc = "Register ECCR `reset()`'s with value 0"]
6impl crate::ResetValue for super::ECCR {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `ADDR_ECC`"]
14pub type ADDR_ECC_R = crate::R<u32, u32>;
15#[doc = "Reader of field `SYSF_ECC`"]
16pub type SYSF_ECC_R = crate::R<bool, bool>;
17#[doc = "Reader of field `ECCCIE`"]
18pub type ECCCIE_R = crate::R<bool, bool>;
19#[doc = "Write proxy for field `ECCCIE`"]
20pub struct ECCCIE_W<'a> {
21 w: &'a mut W,
22}
23impl<'a> ECCCIE_W<'a> {
24 #[doc = r"Sets the field bit"]
25 #[inline(always)]
26 pub fn set_bit(self) -> &'a mut W {
27 self.bit(true)
28 }
29 #[doc = r"Clears the field bit"]
30 #[inline(always)]
31 pub fn clear_bit(self) -> &'a mut W {
32 self.bit(false)
33 }
34 #[doc = r"Writes raw bits to the field"]
35 #[inline(always)]
36 pub fn bit(self, value: bool) -> &'a mut W {
37 self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
38 self.w
39 }
40}
41#[doc = "Reader of field `CPUID`"]
42pub type CPUID_R = crate::R<u8, u8>;
43#[doc = "Reader of field `ECCC`"]
44pub type ECCC_R = crate::R<bool, bool>;
45#[doc = "Write proxy for field `ECCC`"]
46pub struct ECCC_W<'a> {
47 w: &'a mut W,
48}
49impl<'a> ECCC_W<'a> {
50 #[doc = r"Sets the field bit"]
51 #[inline(always)]
52 pub fn set_bit(self) -> &'a mut W {
53 self.bit(true)
54 }
55 #[doc = r"Clears the field bit"]
56 #[inline(always)]
57 pub fn clear_bit(self) -> &'a mut W {
58 self.bit(false)
59 }
60 #[doc = r"Writes raw bits to the field"]
61 #[inline(always)]
62 pub fn bit(self, value: bool) -> &'a mut W {
63 self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
64 self.w
65 }
66}
67#[doc = "Reader of field `ECCD`"]
68pub type ECCD_R = crate::R<bool, bool>;
69#[doc = "Write proxy for field `ECCD`"]
70pub struct ECCD_W<'a> {
71 w: &'a mut W,
72}
73impl<'a> ECCD_W<'a> {
74 #[doc = r"Sets the field bit"]
75 #[inline(always)]
76 pub fn set_bit(self) -> &'a mut W {
77 self.bit(true)
78 }
79 #[doc = r"Clears the field bit"]
80 #[inline(always)]
81 pub fn clear_bit(self) -> &'a mut W {
82 self.bit(false)
83 }
84 #[doc = r"Writes raw bits to the field"]
85 #[inline(always)]
86 pub fn bit(self, value: bool) -> &'a mut W {
87 self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
88 self.w
89 }
90}
91impl R {
92 #[doc = "Bits 0:16 - ECC fail address"]
93 #[inline(always)]
94 pub fn addr_ecc(&self) -> ADDR_ECC_R {
95 ADDR_ECC_R::new((self.bits & 0x0001_ffff) as u32)
96 }
97 #[doc = "Bit 20 - System Flash ECC fail"]
98 #[inline(always)]
99 pub fn sysf_ecc(&self) -> SYSF_ECC_R {
100 SYSF_ECC_R::new(((self.bits >> 20) & 0x01) != 0)
101 }
102 #[doc = "Bit 24 - ECC correction interrupt enable"]
103 #[inline(always)]
104 pub fn ecccie(&self) -> ECCCIE_R {
105 ECCCIE_R::new(((self.bits >> 24) & 0x01) != 0)
106 }
107 #[doc = "Bits 26:28 - CPU identification"]
108 #[inline(always)]
109 pub fn cpuid(&self) -> CPUID_R {
110 CPUID_R::new(((self.bits >> 26) & 0x07) as u8)
111 }
112 #[doc = "Bit 30 - ECC correction"]
113 #[inline(always)]
114 pub fn eccc(&self) -> ECCC_R {
115 ECCC_R::new(((self.bits >> 30) & 0x01) != 0)
116 }
117 #[doc = "Bit 31 - ECC detection"]
118 #[inline(always)]
119 pub fn eccd(&self) -> ECCD_R {
120 ECCD_R::new(((self.bits >> 31) & 0x01) != 0)
121 }
122}
123impl W {
124 #[doc = "Bit 24 - ECC correction interrupt enable"]
125 #[inline(always)]
126 pub fn ecccie(&mut self) -> ECCCIE_W {
127 ECCCIE_W { w: self }
128 }
129 #[doc = "Bit 30 - ECC correction"]
130 #[inline(always)]
131 pub fn eccc(&mut self) -> ECCC_W {
132 ECCC_W { w: self }
133 }
134 #[doc = "Bit 31 - ECC detection"]
135 #[inline(always)]
136 pub fn eccd(&mut self) -> ECCD_W {
137 ECCD_W { w: self }
138 }
139}