stm32wb_pac/exti/
c2emr1.rs1#[doc = "Reader of register C2EMR1"]
2pub type R = crate::R<u32, super::C2EMR1>;
3#[doc = "Writer for register C2EMR1"]
4pub type W = crate::W<u32, super::C2EMR1>;
5#[doc = "Register C2EMR1 `reset()`'s with value 0"]
6impl crate::ResetValue for super::C2EMR1 {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `EM0_15`"]
14pub type EM0_15_R = crate::R<u16, u16>;
15#[doc = "Write proxy for field `EM0_15`"]
16pub struct EM0_15_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> EM0_15_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u16) -> &'a mut W {
23 self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
24 self.w
25 }
26}
27#[doc = "Reader of field `EM17_21`"]
28pub type EM17_21_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `EM17_21`"]
30pub struct EM17_21_W<'a> {
31 w: &'a mut W,
32}
33impl<'a> EM17_21_W<'a> {
34 #[doc = r"Writes raw bits to the field"]
35 #[inline(always)]
36 pub unsafe fn bits(self, value: u8) -> &'a mut W {
37 self.w.bits = (self.w.bits & !(0x1f << 17)) | (((value as u32) & 0x1f) << 17);
38 self.w
39 }
40}
41impl R {
42 #[doc = "Bits 0:15 - CPU(m) Wakeup with event generation Mask on Event input"]
43 #[inline(always)]
44 pub fn em0_15(&self) -> EM0_15_R {
45 EM0_15_R::new((self.bits & 0xffff) as u16)
46 }
47 #[doc = "Bits 17:21 - CPU(m) Wakeup with event generation Mask on Event input"]
48 #[inline(always)]
49 pub fn em17_21(&self) -> EM17_21_R {
50 EM17_21_R::new(((self.bits >> 17) & 0x1f) as u8)
51 }
52}
53impl W {
54 #[doc = "Bits 0:15 - CPU(m) Wakeup with event generation Mask on Event input"]
55 #[inline(always)]
56 pub fn em0_15(&mut self) -> EM0_15_W {
57 EM0_15_W { w: self }
58 }
59 #[doc = "Bits 17:21 - CPU(m) Wakeup with event generation Mask on Event input"]
60 #[inline(always)]
61 pub fn em17_21(&mut self) -> EM17_21_W {
62 EM17_21_W { w: self }
63 }
64}