stm32wb_pac/crs/
isr.rs

1#[doc = "Reader of register ISR"]
2pub type R = crate::R<u32, super::ISR>;
3#[doc = "Reader of field `SYNCOKF`"]
4pub type SYNCOKF_R = crate::R<bool, bool>;
5#[doc = "Reader of field `SYNCWARNF`"]
6pub type SYNCWARNF_R = crate::R<bool, bool>;
7#[doc = "Reader of field `ERRF`"]
8pub type ERRF_R = crate::R<bool, bool>;
9#[doc = "Reader of field `ESYNCF`"]
10pub type ESYNCF_R = crate::R<bool, bool>;
11#[doc = "Reader of field `SYNCERR`"]
12pub type SYNCERR_R = crate::R<bool, bool>;
13#[doc = "Reader of field `SYNCMISS`"]
14pub type SYNCMISS_R = crate::R<bool, bool>;
15#[doc = "Reader of field `TRIMOVF`"]
16pub type TRIMOVF_R = crate::R<bool, bool>;
17#[doc = "Reader of field `FEDIR`"]
18pub type FEDIR_R = crate::R<bool, bool>;
19#[doc = "Reader of field `FECAP`"]
20pub type FECAP_R = crate::R<u16, u16>;
21impl R {
22    #[doc = "Bit 0 - SYNC event OK flag"]
23    #[inline(always)]
24    pub fn syncokf(&self) -> SYNCOKF_R {
25        SYNCOKF_R::new((self.bits & 0x01) != 0)
26    }
27    #[doc = "Bit 1 - SYNC warning flag"]
28    #[inline(always)]
29    pub fn syncwarnf(&self) -> SYNCWARNF_R {
30        SYNCWARNF_R::new(((self.bits >> 1) & 0x01) != 0)
31    }
32    #[doc = "Bit 2 - Error flag"]
33    #[inline(always)]
34    pub fn errf(&self) -> ERRF_R {
35        ERRF_R::new(((self.bits >> 2) & 0x01) != 0)
36    }
37    #[doc = "Bit 3 - Expected SYNC flag"]
38    #[inline(always)]
39    pub fn esyncf(&self) -> ESYNCF_R {
40        ESYNCF_R::new(((self.bits >> 3) & 0x01) != 0)
41    }
42    #[doc = "Bit 8 - SYNC error"]
43    #[inline(always)]
44    pub fn syncerr(&self) -> SYNCERR_R {
45        SYNCERR_R::new(((self.bits >> 8) & 0x01) != 0)
46    }
47    #[doc = "Bit 9 - SYNC missed"]
48    #[inline(always)]
49    pub fn syncmiss(&self) -> SYNCMISS_R {
50        SYNCMISS_R::new(((self.bits >> 9) & 0x01) != 0)
51    }
52    #[doc = "Bit 10 - Trimming overflow or underflow"]
53    #[inline(always)]
54    pub fn trimovf(&self) -> TRIMOVF_R {
55        TRIMOVF_R::new(((self.bits >> 10) & 0x01) != 0)
56    }
57    #[doc = "Bit 15 - Frequency error direction"]
58    #[inline(always)]
59    pub fn fedir(&self) -> FEDIR_R {
60        FEDIR_R::new(((self.bits >> 15) & 0x01) != 0)
61    }
62    #[doc = "Bits 16:31 - Frequency error capture"]
63    #[inline(always)]
64    pub fn fecap(&self) -> FECAP_R {
65        FECAP_R::new(((self.bits >> 16) & 0xffff) as u16)
66    }
67}
stm32wb_pac/crs/isr.rs

stm32wb_pac/crs/
isr.rs
