stm32wb_pac/adc/
sqr2.rs

1#[doc = "Reader of register SQR2"]
2pub type R = crate::R<u32, super::SQR2>;
3#[doc = "Writer for register SQR2"]
4pub type W = crate::W<u32, super::SQR2>;
5#[doc = "Register SQR2 `reset()`'s with value 0"]
6impl crate::ResetValue for super::SQR2 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `SQ9`"]
14pub type SQ9_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `SQ9`"]
16pub struct SQ9_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> SQ9_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !(0x1f << 24)) | (((value as u32) & 0x1f) << 24);
24        self.w
25    }
26}
27#[doc = "Reader of field `SQ8`"]
28pub type SQ8_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `SQ8`"]
30pub struct SQ8_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> SQ8_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0x1f << 18)) | (((value as u32) & 0x1f) << 18);
38        self.w
39    }
40}
41#[doc = "Reader of field `SQ7`"]
42pub type SQ7_R = crate::R<u8, u8>;
43#[doc = "Write proxy for field `SQ7`"]
44pub struct SQ7_W<'a> {
45    w: &'a mut W,
46}
47impl<'a> SQ7_W<'a> {
48    #[doc = r"Writes raw bits to the field"]
49    #[inline(always)]
50    pub unsafe fn bits(self, value: u8) -> &'a mut W {
51        self.w.bits = (self.w.bits & !(0x1f << 12)) | (((value as u32) & 0x1f) << 12);
52        self.w
53    }
54}
55#[doc = "Reader of field `SQ6`"]
56pub type SQ6_R = crate::R<u8, u8>;
57#[doc = "Write proxy for field `SQ6`"]
58pub struct SQ6_W<'a> {
59    w: &'a mut W,
60}
61impl<'a> SQ6_W<'a> {
62    #[doc = r"Writes raw bits to the field"]
63    #[inline(always)]
64    pub unsafe fn bits(self, value: u8) -> &'a mut W {
65        self.w.bits = (self.w.bits & !(0x1f << 6)) | (((value as u32) & 0x1f) << 6);
66        self.w
67    }
68}
69#[doc = "Reader of field `SQ5`"]
70pub type SQ5_R = crate::R<u8, u8>;
71#[doc = "Write proxy for field `SQ5`"]
72pub struct SQ5_W<'a> {
73    w: &'a mut W,
74}
75impl<'a> SQ5_W<'a> {
76    #[doc = r"Writes raw bits to the field"]
77    #[inline(always)]
78    pub unsafe fn bits(self, value: u8) -> &'a mut W {
79        self.w.bits = (self.w.bits & !0x1f) | ((value as u32) & 0x1f);
80        self.w
81    }
82}
83impl R {
84    #[doc = "Bits 24:28 - ADC group regular sequencer rank 9"]
85    #[inline(always)]
86    pub fn sq9(&self) -> SQ9_R {
87        SQ9_R::new(((self.bits >> 24) & 0x1f) as u8)
88    }
89    #[doc = "Bits 18:22 - ADC group regular sequencer rank 8"]
90    #[inline(always)]
91    pub fn sq8(&self) -> SQ8_R {
92        SQ8_R::new(((self.bits >> 18) & 0x1f) as u8)
93    }
94    #[doc = "Bits 12:16 - ADC group regular sequencer rank 7"]
95    #[inline(always)]
96    pub fn sq7(&self) -> SQ7_R {
97        SQ7_R::new(((self.bits >> 12) & 0x1f) as u8)
98    }
99    #[doc = "Bits 6:10 - ADC group regular sequencer rank 6"]
100    #[inline(always)]
101    pub fn sq6(&self) -> SQ6_R {
102        SQ6_R::new(((self.bits >> 6) & 0x1f) as u8)
103    }
104    #[doc = "Bits 0:4 - ADC group regular sequencer rank 5"]
105    #[inline(always)]
106    pub fn sq5(&self) -> SQ5_R {
107        SQ5_R::new((self.bits & 0x1f) as u8)
108    }
109}
110impl W {
111    #[doc = "Bits 24:28 - ADC group regular sequencer rank 9"]
112    #[inline(always)]
113    pub fn sq9(&mut self) -> SQ9_W {
114        SQ9_W { w: self }
115    }
116    #[doc = "Bits 18:22 - ADC group regular sequencer rank 8"]
117    #[inline(always)]
118    pub fn sq8(&mut self) -> SQ8_W {
119        SQ8_W { w: self }
120    }
121    #[doc = "Bits 12:16 - ADC group regular sequencer rank 7"]
122    #[inline(always)]
123    pub fn sq7(&mut self) -> SQ7_W {
124        SQ7_W { w: self }
125    }
126    #[doc = "Bits 6:10 - ADC group regular sequencer rank 6"]
127    #[inline(always)]
128    pub fn sq6(&mut self) -> SQ6_W {
129        SQ6_W { w: self }
130    }
131    #[doc = "Bits 0:4 - ADC group regular sequencer rank 5"]
132    #[inline(always)]
133    pub fn sq5(&mut self) -> SQ5_W {
134        SQ5_W { w: self }
135    }
136}
stm32wb_pac/adc/sqr2.rs

stm32wb_pac/adc/
sqr2.rs
