stm32wb_pac/adc/
sqr1.rs

1#[doc = "Reader of register SQR1"]
2pub type R = crate::R<u32, super::SQR1>;
3#[doc = "Writer for register SQR1"]
4pub type W = crate::W<u32, super::SQR1>;
5#[doc = "Register SQR1 `reset()`'s with value 0"]
6impl crate::ResetValue for super::SQR1 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `SQ4`"]
14pub type SQ4_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `SQ4`"]
16pub struct SQ4_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> SQ4_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !(0x1f << 24)) | (((value as u32) & 0x1f) << 24);
24        self.w
25    }
26}
27#[doc = "Reader of field `SQ3`"]
28pub type SQ3_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `SQ3`"]
30pub struct SQ3_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> SQ3_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0x1f << 18)) | (((value as u32) & 0x1f) << 18);
38        self.w
39    }
40}
41#[doc = "Reader of field `SQ2`"]
42pub type SQ2_R = crate::R<u8, u8>;
43#[doc = "Write proxy for field `SQ2`"]
44pub struct SQ2_W<'a> {
45    w: &'a mut W,
46}
47impl<'a> SQ2_W<'a> {
48    #[doc = r"Writes raw bits to the field"]
49    #[inline(always)]
50    pub unsafe fn bits(self, value: u8) -> &'a mut W {
51        self.w.bits = (self.w.bits & !(0x1f << 12)) | (((value as u32) & 0x1f) << 12);
52        self.w
53    }
54}
55#[doc = "Reader of field `SQ1`"]
56pub type SQ1_R = crate::R<u8, u8>;
57#[doc = "Write proxy for field `SQ1`"]
58pub struct SQ1_W<'a> {
59    w: &'a mut W,
60}
61impl<'a> SQ1_W<'a> {
62    #[doc = r"Writes raw bits to the field"]
63    #[inline(always)]
64    pub unsafe fn bits(self, value: u8) -> &'a mut W {
65        self.w.bits = (self.w.bits & !(0x1f << 6)) | (((value as u32) & 0x1f) << 6);
66        self.w
67    }
68}
69#[doc = "Reader of field `L3`"]
70pub type L3_R = crate::R<u8, u8>;
71#[doc = "Write proxy for field `L3`"]
72pub struct L3_W<'a> {
73    w: &'a mut W,
74}
75impl<'a> L3_W<'a> {
76    #[doc = r"Writes raw bits to the field"]
77    #[inline(always)]
78    pub unsafe fn bits(self, value: u8) -> &'a mut W {
79        self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f);
80        self.w
81    }
82}
83impl R {
84    #[doc = "Bits 24:28 - ADC group regular sequencer rank 4"]
85    #[inline(always)]
86    pub fn sq4(&self) -> SQ4_R {
87        SQ4_R::new(((self.bits >> 24) & 0x1f) as u8)
88    }
89    #[doc = "Bits 18:22 - ADC group regular sequencer rank 3"]
90    #[inline(always)]
91    pub fn sq3(&self) -> SQ3_R {
92        SQ3_R::new(((self.bits >> 18) & 0x1f) as u8)
93    }
94    #[doc = "Bits 12:16 - ADC group regular sequencer rank 2"]
95    #[inline(always)]
96    pub fn sq2(&self) -> SQ2_R {
97        SQ2_R::new(((self.bits >> 12) & 0x1f) as u8)
98    }
99    #[doc = "Bits 6:10 - ADC group regular sequencer rank 1"]
100    #[inline(always)]
101    pub fn sq1(&self) -> SQ1_R {
102        SQ1_R::new(((self.bits >> 6) & 0x1f) as u8)
103    }
104    #[doc = "Bits 0:3 - L3"]
105    #[inline(always)]
106    pub fn l3(&self) -> L3_R {
107        L3_R::new((self.bits & 0x0f) as u8)
108    }
109}
110impl W {
111    #[doc = "Bits 24:28 - ADC group regular sequencer rank 4"]
112    #[inline(always)]
113    pub fn sq4(&mut self) -> SQ4_W {
114        SQ4_W { w: self }
115    }
116    #[doc = "Bits 18:22 - ADC group regular sequencer rank 3"]
117    #[inline(always)]
118    pub fn sq3(&mut self) -> SQ3_W {
119        SQ3_W { w: self }
120    }
121    #[doc = "Bits 12:16 - ADC group regular sequencer rank 2"]
122    #[inline(always)]
123    pub fn sq2(&mut self) -> SQ2_W {
124        SQ2_W { w: self }
125    }
126    #[doc = "Bits 6:10 - ADC group regular sequencer rank 1"]
127    #[inline(always)]
128    pub fn sq1(&mut self) -> SQ1_W {
129        SQ1_W { w: self }
130    }
131    #[doc = "Bits 0:3 - L3"]
132    #[inline(always)]
133    pub fn l3(&mut self) -> L3_W {
134        L3_W { w: self }
135    }
136}
stm32wb_pac/adc/sqr1.rs

stm32wb_pac/adc/
sqr1.rs
