1#[doc = "Reader of register JSQR"]
2pub type R = crate::R<u32, super::JSQR>;
3#[doc = "Writer for register JSQR"]
4pub type W = crate::W<u32, super::JSQR>;
5#[doc = "Register JSQR `reset()`'s with value 0"]
6impl crate::ResetValue for super::JSQR {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `JSQ4`"]
14pub type JSQ4_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `JSQ4`"]
16pub struct JSQ4_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> JSQ4_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u8) -> &'a mut W {
23 self.w.bits = (self.w.bits & !(0x1f << 26)) | (((value as u32) & 0x1f) << 26);
24 self.w
25 }
26}
27#[doc = "Reader of field `JSQ3`"]
28pub type JSQ3_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `JSQ3`"]
30pub struct JSQ3_W<'a> {
31 w: &'a mut W,
32}
33impl<'a> JSQ3_W<'a> {
34 #[doc = r"Writes raw bits to the field"]
35 #[inline(always)]
36 pub unsafe fn bits(self, value: u8) -> &'a mut W {
37 self.w.bits = (self.w.bits & !(0x1f << 20)) | (((value as u32) & 0x1f) << 20);
38 self.w
39 }
40}
41#[doc = "Reader of field `JSQ2`"]
42pub type JSQ2_R = crate::R<u8, u8>;
43#[doc = "Write proxy for field `JSQ2`"]
44pub struct JSQ2_W<'a> {
45 w: &'a mut W,
46}
47impl<'a> JSQ2_W<'a> {
48 #[doc = r"Writes raw bits to the field"]
49 #[inline(always)]
50 pub unsafe fn bits(self, value: u8) -> &'a mut W {
51 self.w.bits = (self.w.bits & !(0x1f << 14)) | (((value as u32) & 0x1f) << 14);
52 self.w
53 }
54}
55#[doc = "Reader of field `JSQ1`"]
56pub type JSQ1_R = crate::R<u8, u8>;
57#[doc = "Write proxy for field `JSQ1`"]
58pub struct JSQ1_W<'a> {
59 w: &'a mut W,
60}
61impl<'a> JSQ1_W<'a> {
62 #[doc = r"Writes raw bits to the field"]
63 #[inline(always)]
64 pub unsafe fn bits(self, value: u8) -> &'a mut W {
65 self.w.bits = (self.w.bits & !(0x1f << 8)) | (((value as u32) & 0x1f) << 8);
66 self.w
67 }
68}
69#[doc = "Reader of field `JEXTEN`"]
70pub type JEXTEN_R = crate::R<u8, u8>;
71#[doc = "Write proxy for field `JEXTEN`"]
72pub struct JEXTEN_W<'a> {
73 w: &'a mut W,
74}
75impl<'a> JEXTEN_W<'a> {
76 #[doc = r"Writes raw bits to the field"]
77 #[inline(always)]
78 pub unsafe fn bits(self, value: u8) -> &'a mut W {
79 self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u32) & 0x03) << 6);
80 self.w
81 }
82}
83#[doc = "Reader of field `JEXTSEL`"]
84pub type JEXTSEL_R = crate::R<u8, u8>;
85#[doc = "Write proxy for field `JEXTSEL`"]
86pub struct JEXTSEL_W<'a> {
87 w: &'a mut W,
88}
89impl<'a> JEXTSEL_W<'a> {
90 #[doc = r"Writes raw bits to the field"]
91 #[inline(always)]
92 pub unsafe fn bits(self, value: u8) -> &'a mut W {
93 self.w.bits = (self.w.bits & !(0x0f << 2)) | (((value as u32) & 0x0f) << 2);
94 self.w
95 }
96}
97#[doc = "Reader of field `JL`"]
98pub type JL_R = crate::R<u8, u8>;
99#[doc = "Write proxy for field `JL`"]
100pub struct JL_W<'a> {
101 w: &'a mut W,
102}
103impl<'a> JL_W<'a> {
104 #[doc = r"Writes raw bits to the field"]
105 #[inline(always)]
106 pub unsafe fn bits(self, value: u8) -> &'a mut W {
107 self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
108 self.w
109 }
110}
111impl R {
112 #[doc = "Bits 26:30 - ADC group injected sequencer rank 4"]
113 #[inline(always)]
114 pub fn jsq4(&self) -> JSQ4_R {
115 JSQ4_R::new(((self.bits >> 26) & 0x1f) as u8)
116 }
117 #[doc = "Bits 20:24 - ADC group injected sequencer rank 3"]
118 #[inline(always)]
119 pub fn jsq3(&self) -> JSQ3_R {
120 JSQ3_R::new(((self.bits >> 20) & 0x1f) as u8)
121 }
122 #[doc = "Bits 14:18 - ADC group injected sequencer rank 2"]
123 #[inline(always)]
124 pub fn jsq2(&self) -> JSQ2_R {
125 JSQ2_R::new(((self.bits >> 14) & 0x1f) as u8)
126 }
127 #[doc = "Bits 8:12 - ADC group injected sequencer rank 1"]
128 #[inline(always)]
129 pub fn jsq1(&self) -> JSQ1_R {
130 JSQ1_R::new(((self.bits >> 8) & 0x1f) as u8)
131 }
132 #[doc = "Bits 6:7 - ADC group injected external trigger polarity"]
133 #[inline(always)]
134 pub fn jexten(&self) -> JEXTEN_R {
135 JEXTEN_R::new(((self.bits >> 6) & 0x03) as u8)
136 }
137 #[doc = "Bits 2:5 - ADC group injected external trigger source"]
138 #[inline(always)]
139 pub fn jextsel(&self) -> JEXTSEL_R {
140 JEXTSEL_R::new(((self.bits >> 2) & 0x0f) as u8)
141 }
142 #[doc = "Bits 0:1 - ADC group injected sequencer scan length"]
143 #[inline(always)]
144 pub fn jl(&self) -> JL_R {
145 JL_R::new((self.bits & 0x03) as u8)
146 }
147}
148impl W {
149 #[doc = "Bits 26:30 - ADC group injected sequencer rank 4"]
150 #[inline(always)]
151 pub fn jsq4(&mut self) -> JSQ4_W {
152 JSQ4_W { w: self }
153 }
154 #[doc = "Bits 20:24 - ADC group injected sequencer rank 3"]
155 #[inline(always)]
156 pub fn jsq3(&mut self) -> JSQ3_W {
157 JSQ3_W { w: self }
158 }
159 #[doc = "Bits 14:18 - ADC group injected sequencer rank 2"]
160 #[inline(always)]
161 pub fn jsq2(&mut self) -> JSQ2_W {
162 JSQ2_W { w: self }
163 }
164 #[doc = "Bits 8:12 - ADC group injected sequencer rank 1"]
165 #[inline(always)]
166 pub fn jsq1(&mut self) -> JSQ1_W {
167 JSQ1_W { w: self }
168 }
169 #[doc = "Bits 6:7 - ADC group injected external trigger polarity"]
170 #[inline(always)]
171 pub fn jexten(&mut self) -> JEXTEN_W {
172 JEXTEN_W { w: self }
173 }
174 #[doc = "Bits 2:5 - ADC group injected external trigger source"]
175 #[inline(always)]
176 pub fn jextsel(&mut self) -> JEXTSEL_W {
177 JEXTSEL_W { w: self }
178 }
179 #[doc = "Bits 0:1 - ADC group injected sequencer scan length"]
180 #[inline(always)]
181 pub fn jl(&mut self) -> JL_W {
182 JL_W { w: self }
183 }
184}