1#[doc = "Reader of register CFGR"]
2pub type R = crate::R<u32, super::CFGR>;
3#[doc = "Writer for register CFGR"]
4pub type W = crate::W<u32, super::CFGR>;
5#[doc = "Register CFGR `reset()`'s with value 0x8000_0000"]
6impl crate::ResetValue for super::CFGR {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0x8000_0000
11 }
12}
13#[doc = "Reader of field `JQDIS`"]
14pub type JQDIS_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `JQDIS`"]
16pub struct JQDIS_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> JQDIS_W<'a> {
20 #[doc = r"Sets the field bit"]
21 #[inline(always)]
22 pub fn set_bit(self) -> &'a mut W {
23 self.bit(true)
24 }
25 #[doc = r"Clears the field bit"]
26 #[inline(always)]
27 pub fn clear_bit(self) -> &'a mut W {
28 self.bit(false)
29 }
30 #[doc = r"Writes raw bits to the field"]
31 #[inline(always)]
32 pub fn bit(self, value: bool) -> &'a mut W {
33 self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
34 self.w
35 }
36}
37#[doc = "Reader of field `AWDCH1CH`"]
38pub type AWDCH1CH_R = crate::R<u8, u8>;
39#[doc = "Write proxy for field `AWDCH1CH`"]
40pub struct AWDCH1CH_W<'a> {
41 w: &'a mut W,
42}
43impl<'a> AWDCH1CH_W<'a> {
44 #[doc = r"Writes raw bits to the field"]
45 #[inline(always)]
46 pub unsafe fn bits(self, value: u8) -> &'a mut W {
47 self.w.bits = (self.w.bits & !(0x1f << 26)) | (((value as u32) & 0x1f) << 26);
48 self.w
49 }
50}
51#[doc = "Reader of field `JAUTO`"]
52pub type JAUTO_R = crate::R<bool, bool>;
53#[doc = "Write proxy for field `JAUTO`"]
54pub struct JAUTO_W<'a> {
55 w: &'a mut W,
56}
57impl<'a> JAUTO_W<'a> {
58 #[doc = r"Sets the field bit"]
59 #[inline(always)]
60 pub fn set_bit(self) -> &'a mut W {
61 self.bit(true)
62 }
63 #[doc = r"Clears the field bit"]
64 #[inline(always)]
65 pub fn clear_bit(self) -> &'a mut W {
66 self.bit(false)
67 }
68 #[doc = r"Writes raw bits to the field"]
69 #[inline(always)]
70 pub fn bit(self, value: bool) -> &'a mut W {
71 self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
72 self.w
73 }
74}
75#[doc = "Reader of field `JAWD1EN`"]
76pub type JAWD1EN_R = crate::R<bool, bool>;
77#[doc = "Write proxy for field `JAWD1EN`"]
78pub struct JAWD1EN_W<'a> {
79 w: &'a mut W,
80}
81impl<'a> JAWD1EN_W<'a> {
82 #[doc = r"Sets the field bit"]
83 #[inline(always)]
84 pub fn set_bit(self) -> &'a mut W {
85 self.bit(true)
86 }
87 #[doc = r"Clears the field bit"]
88 #[inline(always)]
89 pub fn clear_bit(self) -> &'a mut W {
90 self.bit(false)
91 }
92 #[doc = r"Writes raw bits to the field"]
93 #[inline(always)]
94 pub fn bit(self, value: bool) -> &'a mut W {
95 self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
96 self.w
97 }
98}
99#[doc = "Reader of field `AWD1EN`"]
100pub type AWD1EN_R = crate::R<bool, bool>;
101#[doc = "Write proxy for field `AWD1EN`"]
102pub struct AWD1EN_W<'a> {
103 w: &'a mut W,
104}
105impl<'a> AWD1EN_W<'a> {
106 #[doc = r"Sets the field bit"]
107 #[inline(always)]
108 pub fn set_bit(self) -> &'a mut W {
109 self.bit(true)
110 }
111 #[doc = r"Clears the field bit"]
112 #[inline(always)]
113 pub fn clear_bit(self) -> &'a mut W {
114 self.bit(false)
115 }
116 #[doc = r"Writes raw bits to the field"]
117 #[inline(always)]
118 pub fn bit(self, value: bool) -> &'a mut W {
119 self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
120 self.w
121 }
122}
123#[doc = "Reader of field `AWD1SGL`"]
124pub type AWD1SGL_R = crate::R<bool, bool>;
125#[doc = "Write proxy for field `AWD1SGL`"]
126pub struct AWD1SGL_W<'a> {
127 w: &'a mut W,
128}
129impl<'a> AWD1SGL_W<'a> {
130 #[doc = r"Sets the field bit"]
131 #[inline(always)]
132 pub fn set_bit(self) -> &'a mut W {
133 self.bit(true)
134 }
135 #[doc = r"Clears the field bit"]
136 #[inline(always)]
137 pub fn clear_bit(self) -> &'a mut W {
138 self.bit(false)
139 }
140 #[doc = r"Writes raw bits to the field"]
141 #[inline(always)]
142 pub fn bit(self, value: bool) -> &'a mut W {
143 self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
144 self.w
145 }
146}
147#[doc = "Reader of field `JQM`"]
148pub type JQM_R = crate::R<bool, bool>;
149#[doc = "Write proxy for field `JQM`"]
150pub struct JQM_W<'a> {
151 w: &'a mut W,
152}
153impl<'a> JQM_W<'a> {
154 #[doc = r"Sets the field bit"]
155 #[inline(always)]
156 pub fn set_bit(self) -> &'a mut W {
157 self.bit(true)
158 }
159 #[doc = r"Clears the field bit"]
160 #[inline(always)]
161 pub fn clear_bit(self) -> &'a mut W {
162 self.bit(false)
163 }
164 #[doc = r"Writes raw bits to the field"]
165 #[inline(always)]
166 pub fn bit(self, value: bool) -> &'a mut W {
167 self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
168 self.w
169 }
170}
171#[doc = "Reader of field `JDISCEN`"]
172pub type JDISCEN_R = crate::R<bool, bool>;
173#[doc = "Write proxy for field `JDISCEN`"]
174pub struct JDISCEN_W<'a> {
175 w: &'a mut W,
176}
177impl<'a> JDISCEN_W<'a> {
178 #[doc = r"Sets the field bit"]
179 #[inline(always)]
180 pub fn set_bit(self) -> &'a mut W {
181 self.bit(true)
182 }
183 #[doc = r"Clears the field bit"]
184 #[inline(always)]
185 pub fn clear_bit(self) -> &'a mut W {
186 self.bit(false)
187 }
188 #[doc = r"Writes raw bits to the field"]
189 #[inline(always)]
190 pub fn bit(self, value: bool) -> &'a mut W {
191 self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
192 self.w
193 }
194}
195#[doc = "Reader of field `DISCNUM`"]
196pub type DISCNUM_R = crate::R<u8, u8>;
197#[doc = "Write proxy for field `DISCNUM`"]
198pub struct DISCNUM_W<'a> {
199 w: &'a mut W,
200}
201impl<'a> DISCNUM_W<'a> {
202 #[doc = r"Writes raw bits to the field"]
203 #[inline(always)]
204 pub unsafe fn bits(self, value: u8) -> &'a mut W {
205 self.w.bits = (self.w.bits & !(0x07 << 17)) | (((value as u32) & 0x07) << 17);
206 self.w
207 }
208}
209#[doc = "Reader of field `DISCEN`"]
210pub type DISCEN_R = crate::R<bool, bool>;
211#[doc = "Write proxy for field `DISCEN`"]
212pub struct DISCEN_W<'a> {
213 w: &'a mut W,
214}
215impl<'a> DISCEN_W<'a> {
216 #[doc = r"Sets the field bit"]
217 #[inline(always)]
218 pub fn set_bit(self) -> &'a mut W {
219 self.bit(true)
220 }
221 #[doc = r"Clears the field bit"]
222 #[inline(always)]
223 pub fn clear_bit(self) -> &'a mut W {
224 self.bit(false)
225 }
226 #[doc = r"Writes raw bits to the field"]
227 #[inline(always)]
228 pub fn bit(self, value: bool) -> &'a mut W {
229 self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
230 self.w
231 }
232}
233#[doc = "Reader of field `AUTDLY`"]
234pub type AUTDLY_R = crate::R<bool, bool>;
235#[doc = "Write proxy for field `AUTDLY`"]
236pub struct AUTDLY_W<'a> {
237 w: &'a mut W,
238}
239impl<'a> AUTDLY_W<'a> {
240 #[doc = r"Sets the field bit"]
241 #[inline(always)]
242 pub fn set_bit(self) -> &'a mut W {
243 self.bit(true)
244 }
245 #[doc = r"Clears the field bit"]
246 #[inline(always)]
247 pub fn clear_bit(self) -> &'a mut W {
248 self.bit(false)
249 }
250 #[doc = r"Writes raw bits to the field"]
251 #[inline(always)]
252 pub fn bit(self, value: bool) -> &'a mut W {
253 self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
254 self.w
255 }
256}
257#[doc = "Reader of field `CONT`"]
258pub type CONT_R = crate::R<bool, bool>;
259#[doc = "Write proxy for field `CONT`"]
260pub struct CONT_W<'a> {
261 w: &'a mut W,
262}
263impl<'a> CONT_W<'a> {
264 #[doc = r"Sets the field bit"]
265 #[inline(always)]
266 pub fn set_bit(self) -> &'a mut W {
267 self.bit(true)
268 }
269 #[doc = r"Clears the field bit"]
270 #[inline(always)]
271 pub fn clear_bit(self) -> &'a mut W {
272 self.bit(false)
273 }
274 #[doc = r"Writes raw bits to the field"]
275 #[inline(always)]
276 pub fn bit(self, value: bool) -> &'a mut W {
277 self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
278 self.w
279 }
280}
281#[doc = "Reader of field `OVRMOD`"]
282pub type OVRMOD_R = crate::R<bool, bool>;
283#[doc = "Write proxy for field `OVRMOD`"]
284pub struct OVRMOD_W<'a> {
285 w: &'a mut W,
286}
287impl<'a> OVRMOD_W<'a> {
288 #[doc = r"Sets the field bit"]
289 #[inline(always)]
290 pub fn set_bit(self) -> &'a mut W {
291 self.bit(true)
292 }
293 #[doc = r"Clears the field bit"]
294 #[inline(always)]
295 pub fn clear_bit(self) -> &'a mut W {
296 self.bit(false)
297 }
298 #[doc = r"Writes raw bits to the field"]
299 #[inline(always)]
300 pub fn bit(self, value: bool) -> &'a mut W {
301 self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
302 self.w
303 }
304}
305#[doc = "Reader of field `EXTEN`"]
306pub type EXTEN_R = crate::R<u8, u8>;
307#[doc = "Write proxy for field `EXTEN`"]
308pub struct EXTEN_W<'a> {
309 w: &'a mut W,
310}
311impl<'a> EXTEN_W<'a> {
312 #[doc = r"Writes raw bits to the field"]
313 #[inline(always)]
314 pub unsafe fn bits(self, value: u8) -> &'a mut W {
315 self.w.bits = (self.w.bits & !(0x03 << 10)) | (((value as u32) & 0x03) << 10);
316 self.w
317 }
318}
319#[doc = "Reader of field `EXTSEL`"]
320pub type EXTSEL_R = crate::R<u8, u8>;
321#[doc = "Write proxy for field `EXTSEL`"]
322pub struct EXTSEL_W<'a> {
323 w: &'a mut W,
324}
325impl<'a> EXTSEL_W<'a> {
326 #[doc = r"Writes raw bits to the field"]
327 #[inline(always)]
328 pub unsafe fn bits(self, value: u8) -> &'a mut W {
329 self.w.bits = (self.w.bits & !(0x0f << 6)) | (((value as u32) & 0x0f) << 6);
330 self.w
331 }
332}
333#[doc = "Reader of field `ALIGN`"]
334pub type ALIGN_R = crate::R<bool, bool>;
335#[doc = "Write proxy for field `ALIGN`"]
336pub struct ALIGN_W<'a> {
337 w: &'a mut W,
338}
339impl<'a> ALIGN_W<'a> {
340 #[doc = r"Sets the field bit"]
341 #[inline(always)]
342 pub fn set_bit(self) -> &'a mut W {
343 self.bit(true)
344 }
345 #[doc = r"Clears the field bit"]
346 #[inline(always)]
347 pub fn clear_bit(self) -> &'a mut W {
348 self.bit(false)
349 }
350 #[doc = r"Writes raw bits to the field"]
351 #[inline(always)]
352 pub fn bit(self, value: bool) -> &'a mut W {
353 self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
354 self.w
355 }
356}
357#[doc = "Reader of field `RES`"]
358pub type RES_R = crate::R<u8, u8>;
359#[doc = "Write proxy for field `RES`"]
360pub struct RES_W<'a> {
361 w: &'a mut W,
362}
363impl<'a> RES_W<'a> {
364 #[doc = r"Writes raw bits to the field"]
365 #[inline(always)]
366 pub unsafe fn bits(self, value: u8) -> &'a mut W {
367 self.w.bits = (self.w.bits & !(0x03 << 3)) | (((value as u32) & 0x03) << 3);
368 self.w
369 }
370}
371#[doc = "Reader of field `DMACFG`"]
372pub type DMACFG_R = crate::R<bool, bool>;
373#[doc = "Write proxy for field `DMACFG`"]
374pub struct DMACFG_W<'a> {
375 w: &'a mut W,
376}
377impl<'a> DMACFG_W<'a> {
378 #[doc = r"Sets the field bit"]
379 #[inline(always)]
380 pub fn set_bit(self) -> &'a mut W {
381 self.bit(true)
382 }
383 #[doc = r"Clears the field bit"]
384 #[inline(always)]
385 pub fn clear_bit(self) -> &'a mut W {
386 self.bit(false)
387 }
388 #[doc = r"Writes raw bits to the field"]
389 #[inline(always)]
390 pub fn bit(self, value: bool) -> &'a mut W {
391 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
392 self.w
393 }
394}
395#[doc = "Reader of field `DMAEN`"]
396pub type DMAEN_R = crate::R<bool, bool>;
397#[doc = "Write proxy for field `DMAEN`"]
398pub struct DMAEN_W<'a> {
399 w: &'a mut W,
400}
401impl<'a> DMAEN_W<'a> {
402 #[doc = r"Sets the field bit"]
403 #[inline(always)]
404 pub fn set_bit(self) -> &'a mut W {
405 self.bit(true)
406 }
407 #[doc = r"Clears the field bit"]
408 #[inline(always)]
409 pub fn clear_bit(self) -> &'a mut W {
410 self.bit(false)
411 }
412 #[doc = r"Writes raw bits to the field"]
413 #[inline(always)]
414 pub fn bit(self, value: bool) -> &'a mut W {
415 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
416 self.w
417 }
418}
419impl R {
420 #[doc = "Bit 31 - ADC group injected contexts queue disable"]
421 #[inline(always)]
422 pub fn jqdis(&self) -> JQDIS_R {
423 JQDIS_R::new(((self.bits >> 31) & 0x01) != 0)
424 }
425 #[doc = "Bits 26:30 - ADC analog watchdog 1 monitored channel selection"]
426 #[inline(always)]
427 pub fn awdch1ch(&self) -> AWDCH1CH_R {
428 AWDCH1CH_R::new(((self.bits >> 26) & 0x1f) as u8)
429 }
430 #[doc = "Bit 25 - ADC group injected automatic trigger mode"]
431 #[inline(always)]
432 pub fn jauto(&self) -> JAUTO_R {
433 JAUTO_R::new(((self.bits >> 25) & 0x01) != 0)
434 }
435 #[doc = "Bit 24 - ADC analog watchdog 1 enable on scope ADC group injected"]
436 #[inline(always)]
437 pub fn jawd1en(&self) -> JAWD1EN_R {
438 JAWD1EN_R::new(((self.bits >> 24) & 0x01) != 0)
439 }
440 #[doc = "Bit 23 - ADC analog watchdog 1 enable on scope ADC group regular"]
441 #[inline(always)]
442 pub fn awd1en(&self) -> AWD1EN_R {
443 AWD1EN_R::new(((self.bits >> 23) & 0x01) != 0)
444 }
445 #[doc = "Bit 22 - ADC analog watchdog 1 monitoring a single channel or all channels"]
446 #[inline(always)]
447 pub fn awd1sgl(&self) -> AWD1SGL_R {
448 AWD1SGL_R::new(((self.bits >> 22) & 0x01) != 0)
449 }
450 #[doc = "Bit 21 - ADC group injected contexts queue mode"]
451 #[inline(always)]
452 pub fn jqm(&self) -> JQM_R {
453 JQM_R::new(((self.bits >> 21) & 0x01) != 0)
454 }
455 #[doc = "Bit 20 - ADC group injected sequencer discontinuous mode"]
456 #[inline(always)]
457 pub fn jdiscen(&self) -> JDISCEN_R {
458 JDISCEN_R::new(((self.bits >> 20) & 0x01) != 0)
459 }
460 #[doc = "Bits 17:19 - ADC group regular sequencer discontinuous number of ranks"]
461 #[inline(always)]
462 pub fn discnum(&self) -> DISCNUM_R {
463 DISCNUM_R::new(((self.bits >> 17) & 0x07) as u8)
464 }
465 #[doc = "Bit 16 - ADC group regular sequencer discontinuous mode"]
466 #[inline(always)]
467 pub fn discen(&self) -> DISCEN_R {
468 DISCEN_R::new(((self.bits >> 16) & 0x01) != 0)
469 }
470 #[doc = "Bit 14 - ADC low power auto wait"]
471 #[inline(always)]
472 pub fn autdly(&self) -> AUTDLY_R {
473 AUTDLY_R::new(((self.bits >> 14) & 0x01) != 0)
474 }
475 #[doc = "Bit 13 - ADC group regular continuous conversion mode"]
476 #[inline(always)]
477 pub fn cont(&self) -> CONT_R {
478 CONT_R::new(((self.bits >> 13) & 0x01) != 0)
479 }
480 #[doc = "Bit 12 - ADC group regular overrun configuration"]
481 #[inline(always)]
482 pub fn ovrmod(&self) -> OVRMOD_R {
483 OVRMOD_R::new(((self.bits >> 12) & 0x01) != 0)
484 }
485 #[doc = "Bits 10:11 - ADC group regular external trigger polarity"]
486 #[inline(always)]
487 pub fn exten(&self) -> EXTEN_R {
488 EXTEN_R::new(((self.bits >> 10) & 0x03) as u8)
489 }
490 #[doc = "Bits 6:9 - ADC group regular external trigger source"]
491 #[inline(always)]
492 pub fn extsel(&self) -> EXTSEL_R {
493 EXTSEL_R::new(((self.bits >> 6) & 0x0f) as u8)
494 }
495 #[doc = "Bit 5 - ADC data alignement"]
496 #[inline(always)]
497 pub fn align(&self) -> ALIGN_R {
498 ALIGN_R::new(((self.bits >> 5) & 0x01) != 0)
499 }
500 #[doc = "Bits 3:4 - ADC data resolution"]
501 #[inline(always)]
502 pub fn res(&self) -> RES_R {
503 RES_R::new(((self.bits >> 3) & 0x03) as u8)
504 }
505 #[doc = "Bit 1 - ADC DMA transfer configuration"]
506 #[inline(always)]
507 pub fn dmacfg(&self) -> DMACFG_R {
508 DMACFG_R::new(((self.bits >> 1) & 0x01) != 0)
509 }
510 #[doc = "Bit 0 - ADC DMA transfer enable"]
511 #[inline(always)]
512 pub fn dmaen(&self) -> DMAEN_R {
513 DMAEN_R::new((self.bits & 0x01) != 0)
514 }
515}
516impl W {
517 #[doc = "Bit 31 - ADC group injected contexts queue disable"]
518 #[inline(always)]
519 pub fn jqdis(&mut self) -> JQDIS_W {
520 JQDIS_W { w: self }
521 }
522 #[doc = "Bits 26:30 - ADC analog watchdog 1 monitored channel selection"]
523 #[inline(always)]
524 pub fn awdch1ch(&mut self) -> AWDCH1CH_W {
525 AWDCH1CH_W { w: self }
526 }
527 #[doc = "Bit 25 - ADC group injected automatic trigger mode"]
528 #[inline(always)]
529 pub fn jauto(&mut self) -> JAUTO_W {
530 JAUTO_W { w: self }
531 }
532 #[doc = "Bit 24 - ADC analog watchdog 1 enable on scope ADC group injected"]
533 #[inline(always)]
534 pub fn jawd1en(&mut self) -> JAWD1EN_W {
535 JAWD1EN_W { w: self }
536 }
537 #[doc = "Bit 23 - ADC analog watchdog 1 enable on scope ADC group regular"]
538 #[inline(always)]
539 pub fn awd1en(&mut self) -> AWD1EN_W {
540 AWD1EN_W { w: self }
541 }
542 #[doc = "Bit 22 - ADC analog watchdog 1 monitoring a single channel or all channels"]
543 #[inline(always)]
544 pub fn awd1sgl(&mut self) -> AWD1SGL_W {
545 AWD1SGL_W { w: self }
546 }
547 #[doc = "Bit 21 - ADC group injected contexts queue mode"]
548 #[inline(always)]
549 pub fn jqm(&mut self) -> JQM_W {
550 JQM_W { w: self }
551 }
552 #[doc = "Bit 20 - ADC group injected sequencer discontinuous mode"]
553 #[inline(always)]
554 pub fn jdiscen(&mut self) -> JDISCEN_W {
555 JDISCEN_W { w: self }
556 }
557 #[doc = "Bits 17:19 - ADC group regular sequencer discontinuous number of ranks"]
558 #[inline(always)]
559 pub fn discnum(&mut self) -> DISCNUM_W {
560 DISCNUM_W { w: self }
561 }
562 #[doc = "Bit 16 - ADC group regular sequencer discontinuous mode"]
563 #[inline(always)]
564 pub fn discen(&mut self) -> DISCEN_W {
565 DISCEN_W { w: self }
566 }
567 #[doc = "Bit 14 - ADC low power auto wait"]
568 #[inline(always)]
569 pub fn autdly(&mut self) -> AUTDLY_W {
570 AUTDLY_W { w: self }
571 }
572 #[doc = "Bit 13 - ADC group regular continuous conversion mode"]
573 #[inline(always)]
574 pub fn cont(&mut self) -> CONT_W {
575 CONT_W { w: self }
576 }
577 #[doc = "Bit 12 - ADC group regular overrun configuration"]
578 #[inline(always)]
579 pub fn ovrmod(&mut self) -> OVRMOD_W {
580 OVRMOD_W { w: self }
581 }
582 #[doc = "Bits 10:11 - ADC group regular external trigger polarity"]
583 #[inline(always)]
584 pub fn exten(&mut self) -> EXTEN_W {
585 EXTEN_W { w: self }
586 }
587 #[doc = "Bits 6:9 - ADC group regular external trigger source"]
588 #[inline(always)]
589 pub fn extsel(&mut self) -> EXTSEL_W {
590 EXTSEL_W { w: self }
591 }
592 #[doc = "Bit 5 - ADC data alignement"]
593 #[inline(always)]
594 pub fn align(&mut self) -> ALIGN_W {
595 ALIGN_W { w: self }
596 }
597 #[doc = "Bits 3:4 - ADC data resolution"]
598 #[inline(always)]
599 pub fn res(&mut self) -> RES_W {
600 RES_W { w: self }
601 }
602 #[doc = "Bit 1 - ADC DMA transfer configuration"]
603 #[inline(always)]
604 pub fn dmacfg(&mut self) -> DMACFG_W {
605 DMACFG_W { w: self }
606 }
607 #[doc = "Bit 0 - ADC DMA transfer enable"]
608 #[inline(always)]
609 pub fn dmaen(&mut self) -> DMAEN_W {
610 DMAEN_W { w: self }
611 }
612}