stm32wb_pac/adc/
ccr.rs

1#[doc = "Reader of register CCR"]
2pub type R = crate::R<u32, super::CCR>;
3#[doc = "Writer for register CCR"]
4pub type W = crate::W<u32, super::CCR>;
5#[doc = "Register CCR `reset()`'s with value 0"]
6impl crate::ResetValue for super::CCR {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `VBATEN`"]
14pub type VBATEN_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `VBATEN`"]
16pub struct VBATEN_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> VBATEN_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
34        self.w
35    }
36}
37#[doc = "Reader of field `TSEN`"]
38pub type TSEN_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `TSEN`"]
40pub struct TSEN_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> TSEN_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
58        self.w
59    }
60}
61#[doc = "Reader of field `VREFEN`"]
62pub type VREFEN_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `VREFEN`"]
64pub struct VREFEN_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> VREFEN_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
82        self.w
83    }
84}
85#[doc = "Reader of field `PRESC`"]
86pub type PRESC_R = crate::R<u8, u8>;
87#[doc = "Write proxy for field `PRESC`"]
88pub struct PRESC_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> PRESC_W<'a> {
92    #[doc = r"Writes raw bits to the field"]
93    #[inline(always)]
94    pub unsafe fn bits(self, value: u8) -> &'a mut W {
95        self.w.bits = (self.w.bits & !(0x0f << 18)) | (((value as u32) & 0x0f) << 18);
96        self.w
97    }
98}
99#[doc = "Reader of field `CKMODE`"]
100pub type CKMODE_R = crate::R<u8, u8>;
101#[doc = "Write proxy for field `CKMODE`"]
102pub struct CKMODE_W<'a> {
103    w: &'a mut W,
104}
105impl<'a> CKMODE_W<'a> {
106    #[doc = r"Writes raw bits to the field"]
107    #[inline(always)]
108    pub unsafe fn bits(self, value: u8) -> &'a mut W {
109        self.w.bits = (self.w.bits & !(0x03 << 16)) | (((value as u32) & 0x03) << 16);
110        self.w
111    }
112}
113impl R {
114    #[doc = "Bit 24 - VBAT enable"]
115    #[inline(always)]
116    pub fn vbaten(&self) -> VBATEN_R {
117        VBATEN_R::new(((self.bits >> 24) & 0x01) != 0)
118    }
119    #[doc = "Bit 23 - Temperature sensor enable"]
120    #[inline(always)]
121    pub fn tsen(&self) -> TSEN_R {
122        TSEN_R::new(((self.bits >> 23) & 0x01) != 0)
123    }
124    #[doc = "Bit 22 - VREFEN"]
125    #[inline(always)]
126    pub fn vrefen(&self) -> VREFEN_R {
127        VREFEN_R::new(((self.bits >> 22) & 0x01) != 0)
128    }
129    #[doc = "Bits 18:21 - ADC prescaler"]
130    #[inline(always)]
131    pub fn presc(&self) -> PRESC_R {
132        PRESC_R::new(((self.bits >> 18) & 0x0f) as u8)
133    }
134    #[doc = "Bits 16:17 - ADC clock mode"]
135    #[inline(always)]
136    pub fn ckmode(&self) -> CKMODE_R {
137        CKMODE_R::new(((self.bits >> 16) & 0x03) as u8)
138    }
139}
140impl W {
141    #[doc = "Bit 24 - VBAT enable"]
142    #[inline(always)]
143    pub fn vbaten(&mut self) -> VBATEN_W {
144        VBATEN_W { w: self }
145    }
146    #[doc = "Bit 23 - Temperature sensor enable"]
147    #[inline(always)]
148    pub fn tsen(&mut self) -> TSEN_W {
149        TSEN_W { w: self }
150    }
151    #[doc = "Bit 22 - VREFEN"]
152    #[inline(always)]
153    pub fn vrefen(&mut self) -> VREFEN_W {
154        VREFEN_W { w: self }
155    }
156    #[doc = "Bits 18:21 - ADC prescaler"]
157    #[inline(always)]
158    pub fn presc(&mut self) -> PRESC_W {
159        PRESC_W { w: self }
160    }
161    #[doc = "Bits 16:17 - ADC clock mode"]
162    #[inline(always)]
163    pub fn ckmode(&mut self) -> CKMODE_W {
164        CKMODE_W { w: self }
165    }
166}
stm32wb_pac/adc/ccr.rs

stm32wb_pac/adc/
ccr.rs
