stm32wb_pac/adc/
awd3cr.rs1#[doc = "Reader of register AWD3CR"]
2pub type R = crate::R<u32, super::AWD3CR>;
3#[doc = "Writer for register AWD3CR"]
4pub type W = crate::W<u32, super::AWD3CR>;
5#[doc = "Register AWD3CR `reset()`'s with value 0"]
6impl crate::ResetValue for super::AWD3CR {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `AWD3CH`"]
14pub type AWD3CH_R = crate::R<u32, u32>;
15#[doc = "Write proxy for field `AWD3CH`"]
16pub struct AWD3CH_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> AWD3CH_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u32) -> &'a mut W {
23 self.w.bits = (self.w.bits & !0x0007_ffff) | ((value as u32) & 0x0007_ffff);
24 self.w
25 }
26}
27impl R {
28 #[doc = "Bits 0:18 - ADC analog watchdog 3 monitored channel selection"]
29 #[inline(always)]
30 pub fn awd3ch(&self) -> AWD3CH_R {
31 AWD3CH_R::new((self.bits & 0x0007_ffff) as u32)
32 }
33}
34impl W {
35 #[doc = "Bits 0:18 - ADC analog watchdog 3 monitored channel selection"]
36 #[inline(always)]
37 pub fn awd3ch(&mut self) -> AWD3CH_W {
38 AWD3CH_W { w: self }
39 }
40}