stm32wb_pac/
rcc.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    #[doc = "0x00 - Clock control register"]
5    pub cr: CR,
6    #[doc = "0x04 - Internal clock sources calibration register"]
7    pub icscr: ICSCR,
8    #[doc = "0x08 - Clock configuration register"]
9    pub cfgr: CFGR,
10    #[doc = "0x0c - PLLSYS configuration register"]
11    pub pllcfgr: PLLCFGR,
12    #[doc = "0x10 - PLLSAI1 configuration register"]
13    pub pllsai1cfgr: PLLSAI1CFGR,
14    _reserved5: [u8; 4usize],
15    #[doc = "0x18 - Clock interrupt enable register"]
16    pub cier: CIER,
17    #[doc = "0x1c - Clock interrupt flag register"]
18    pub cifr: CIFR,
19    #[doc = "0x20 - Clock interrupt clear register"]
20    pub cicr: CICR,
21    #[doc = "0x24 - Step Down converter control register"]
22    pub smpscr: SMPSCR,
23    #[doc = "0x28 - AHB1 peripheral reset register"]
24    pub ahb1rstr: AHB1RSTR,
25    #[doc = "0x2c - AHB2 peripheral reset register"]
26    pub ahb2rstr: AHB2RSTR,
27    #[doc = "0x30 - AHB3 peripheral reset register"]
28    pub ahb3rstr: AHB3RSTR,
29    _reserved12: [u8; 4usize],
30    #[doc = "0x38 - APB1 peripheral reset register 1"]
31    pub apb1rstr1: APB1RSTR1,
32    #[doc = "0x3c - APB1 peripheral reset register 2"]
33    pub apb1rstr2: APB1RSTR2,
34    #[doc = "0x40 - APB2 peripheral reset register"]
35    pub apb2rstr: APB2RSTR,
36    #[doc = "0x44 - APB3 peripheral reset register"]
37    pub apb3rstr: APB3RSTR,
38    #[doc = "0x48 - AHB1 peripheral clock enable register"]
39    pub ahb1enr: AHB1ENR,
40    #[doc = "0x4c - AHB2 peripheral clock enable register"]
41    pub ahb2enr: AHB2ENR,
42    #[doc = "0x50 - AHB3 peripheral clock enable register"]
43    pub ahb3enr: AHB3ENR,
44    _reserved19: [u8; 4usize],
45    #[doc = "0x58 - APB1ENR1"]
46    pub apb1enr1: APB1ENR1,
47    #[doc = "0x5c - APB1 peripheral clock enable register 2"]
48    pub apb1enr2: APB1ENR2,
49    #[doc = "0x60 - APB2ENR"]
50    pub apb2enr: APB2ENR,
51    _reserved22: [u8; 4usize],
52    #[doc = "0x68 - AHB1 peripheral clocks enable in Sleep and Stop modes register"]
53    pub ahb1smenr: AHB1SMENR,
54    #[doc = "0x6c - AHB2 peripheral clocks enable in Sleep and Stop modes register"]
55    pub ahb2smenr: AHB2SMENR,
56    #[doc = "0x70 - AHB3 peripheral clocks enable in Sleep and Stop modes register"]
57    pub ahb3smenr: AHB3SMENR,
58    _reserved25: [u8; 4usize],
59    #[doc = "0x78 - APB1SMENR1"]
60    pub apb1smenr1: APB1SMENR1,
61    #[doc = "0x7c - APB1 peripheral clocks enable in Sleep and Stop modes register 2"]
62    pub apb1smenr2: APB1SMENR2,
63    #[doc = "0x80 - APB2SMENR"]
64    pub apb2smenr: APB2SMENR,
65    _reserved28: [u8; 4usize],
66    #[doc = "0x88 - CCIPR"]
67    pub ccipr: CCIPR,
68    _reserved29: [u8; 4usize],
69    #[doc = "0x90 - BDCR"]
70    pub bdcr: BDCR,
71    #[doc = "0x94 - CSR"]
72    pub csr: CSR,
73    #[doc = "0x98 - Clock recovery RC register"]
74    pub crrcr: CRRCR,
75    #[doc = "0x9c - Clock HSE register"]
76    pub hsecr: HSECR,
77    _reserved33: [u8; 104usize],
78    #[doc = "0x108 - Extended clock recovery register"]
79    pub extcfgr: EXTCFGR,
80    _reserved34: [u8; 60usize],
81    #[doc = "0x148 - CPU2 AHB1 peripheral clock enable register"]
82    pub c2ahb1enr: C2AHB1ENR,
83    #[doc = "0x14c - CPU2 AHB2 peripheral clock enable register"]
84    pub c2ahb2enr: C2AHB2ENR,
85    #[doc = "0x150 - CPU2 AHB3 peripheral clock enable register"]
86    pub c2ahb3enr: C2AHB3ENR,
87    _reserved37: [u8; 4usize],
88    #[doc = "0x158 - CPU2 APB1ENR1"]
89    pub c2apb1enr1: C2APB1ENR1,
90    #[doc = "0x15c - CPU2 APB1 peripheral clock enable register 2"]
91    pub c2apb1enr2: C2APB1ENR2,
92    #[doc = "0x160 - CPU2 APB2ENR"]
93    pub c2apb2enr: C2APB2ENR,
94    #[doc = "0x164 - CPU2 APB3ENR"]
95    pub c2apb3enr: C2APB3ENR,
96    #[doc = "0x168 - CPU2 AHB1 peripheral clocks enable in Sleep and Stop modes register"]
97    pub c2ahb1smenr: C2AHB1SMENR,
98    #[doc = "0x16c - CPU2 AHB2 peripheral clocks enable in Sleep and Stop modes register"]
99    pub c2ahb2smenr: C2AHB2SMENR,
100    #[doc = "0x170 - CPU2 AHB3 peripheral clocks enable in Sleep and Stop modes register"]
101    pub c2ahb3smenr: C2AHB3SMENR,
102    _reserved44: [u8; 4usize],
103    #[doc = "0x178 - CPU2 APB1SMENR1"]
104    pub c2apb1smenr1: C2APB1SMENR1,
105    #[doc = "0x17c - CPU2 APB1 peripheral clocks enable in Sleep and Stop modes register 2"]
106    pub c2apb1smenr2: C2APB1SMENR2,
107    #[doc = "0x180 - CPU2 APB2SMENR"]
108    pub c2apb2smenr: C2APB2SMENR,
109    #[doc = "0x184 - CPU2 APB3SMENR"]
110    pub c2apb3smenr: C2APB3SMENR,
111}
112#[doc = "Clock control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](cr) module"]
113pub type CR = crate::Reg<u32, _CR>;
114#[allow(missing_docs)]
115#[doc(hidden)]
116pub struct _CR;
117#[doc = "`read()` method returns [cr::R](cr::R) reader structure"]
118impl crate::Readable for CR {}
119#[doc = "`write(|w| ..)` method takes [cr::W](cr::W) writer structure"]
120impl crate::Writable for CR {}
121#[doc = "Clock control register"]
122pub mod cr;
123#[doc = "Internal clock sources calibration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [icscr](icscr) module"]
124pub type ICSCR = crate::Reg<u32, _ICSCR>;
125#[allow(missing_docs)]
126#[doc(hidden)]
127pub struct _ICSCR;
128#[doc = "`read()` method returns [icscr::R](icscr::R) reader structure"]
129impl crate::Readable for ICSCR {}
130#[doc = "`write(|w| ..)` method takes [icscr::W](icscr::W) writer structure"]
131impl crate::Writable for ICSCR {}
132#[doc = "Internal clock sources calibration register"]
133pub mod icscr;
134#[doc = "Clock configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgr](cfgr) module"]
135pub type CFGR = crate::Reg<u32, _CFGR>;
136#[allow(missing_docs)]
137#[doc(hidden)]
138pub struct _CFGR;
139#[doc = "`read()` method returns [cfgr::R](cfgr::R) reader structure"]
140impl crate::Readable for CFGR {}
141#[doc = "`write(|w| ..)` method takes [cfgr::W](cfgr::W) writer structure"]
142impl crate::Writable for CFGR {}
143#[doc = "Clock configuration register"]
144pub mod cfgr;
145#[doc = "PLLSYS configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pllcfgr](pllcfgr) module"]
146pub type PLLCFGR = crate::Reg<u32, _PLLCFGR>;
147#[allow(missing_docs)]
148#[doc(hidden)]
149pub struct _PLLCFGR;
150#[doc = "`read()` method returns [pllcfgr::R](pllcfgr::R) reader structure"]
151impl crate::Readable for PLLCFGR {}
152#[doc = "`write(|w| ..)` method takes [pllcfgr::W](pllcfgr::W) writer structure"]
153impl crate::Writable for PLLCFGR {}
154#[doc = "PLLSYS configuration register"]
155pub mod pllcfgr;
156#[doc = "PLLSAI1 configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pllsai1cfgr](pllsai1cfgr) module"]
157pub type PLLSAI1CFGR = crate::Reg<u32, _PLLSAI1CFGR>;
158#[allow(missing_docs)]
159#[doc(hidden)]
160pub struct _PLLSAI1CFGR;
161#[doc = "`read()` method returns [pllsai1cfgr::R](pllsai1cfgr::R) reader structure"]
162impl crate::Readable for PLLSAI1CFGR {}
163#[doc = "`write(|w| ..)` method takes [pllsai1cfgr::W](pllsai1cfgr::W) writer structure"]
164impl crate::Writable for PLLSAI1CFGR {}
165#[doc = "PLLSAI1 configuration register"]
166pub mod pllsai1cfgr;
167#[doc = "Clock interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cier](cier) module"]
168pub type CIER = crate::Reg<u32, _CIER>;
169#[allow(missing_docs)]
170#[doc(hidden)]
171pub struct _CIER;
172#[doc = "`read()` method returns [cier::R](cier::R) reader structure"]
173impl crate::Readable for CIER {}
174#[doc = "`write(|w| ..)` method takes [cier::W](cier::W) writer structure"]
175impl crate::Writable for CIER {}
176#[doc = "Clock interrupt enable register"]
177pub mod cier;
178#[doc = "Clock interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cifr](cifr) module"]
179pub type CIFR = crate::Reg<u32, _CIFR>;
180#[allow(missing_docs)]
181#[doc(hidden)]
182pub struct _CIFR;
183#[doc = "`read()` method returns [cifr::R](cifr::R) reader structure"]
184impl crate::Readable for CIFR {}
185#[doc = "Clock interrupt flag register"]
186pub mod cifr;
187#[doc = "Clock interrupt clear register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cicr](cicr) module"]
188pub type CICR = crate::Reg<u32, _CICR>;
189#[allow(missing_docs)]
190#[doc(hidden)]
191pub struct _CICR;
192#[doc = "`write(|w| ..)` method takes [cicr::W](cicr::W) writer structure"]
193impl crate::Writable for CICR {}
194#[doc = "Clock interrupt clear register"]
195pub mod cicr;
196#[doc = "Step Down converter control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [smpscr](smpscr) module"]
197pub type SMPSCR = crate::Reg<u32, _SMPSCR>;
198#[allow(missing_docs)]
199#[doc(hidden)]
200pub struct _SMPSCR;
201#[doc = "`read()` method returns [smpscr::R](smpscr::R) reader structure"]
202impl crate::Readable for SMPSCR {}
203#[doc = "`write(|w| ..)` method takes [smpscr::W](smpscr::W) writer structure"]
204impl crate::Writable for SMPSCR {}
205#[doc = "Step Down converter control register"]
206pub mod smpscr;
207#[doc = "AHB1 peripheral reset register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahb1rstr](ahb1rstr) module"]
208pub type AHB1RSTR = crate::Reg<u32, _AHB1RSTR>;
209#[allow(missing_docs)]
210#[doc(hidden)]
211pub struct _AHB1RSTR;
212#[doc = "`read()` method returns [ahb1rstr::R](ahb1rstr::R) reader structure"]
213impl crate::Readable for AHB1RSTR {}
214#[doc = "`write(|w| ..)` method takes [ahb1rstr::W](ahb1rstr::W) writer structure"]
215impl crate::Writable for AHB1RSTR {}
216#[doc = "AHB1 peripheral reset register"]
217pub mod ahb1rstr;
218#[doc = "AHB2 peripheral reset register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahb2rstr](ahb2rstr) module"]
219pub type AHB2RSTR = crate::Reg<u32, _AHB2RSTR>;
220#[allow(missing_docs)]
221#[doc(hidden)]
222pub struct _AHB2RSTR;
223#[doc = "`read()` method returns [ahb2rstr::R](ahb2rstr::R) reader structure"]
224impl crate::Readable for AHB2RSTR {}
225#[doc = "`write(|w| ..)` method takes [ahb2rstr::W](ahb2rstr::W) writer structure"]
226impl crate::Writable for AHB2RSTR {}
227#[doc = "AHB2 peripheral reset register"]
228pub mod ahb2rstr;
229#[doc = "AHB3 peripheral reset register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahb3rstr](ahb3rstr) module"]
230pub type AHB3RSTR = crate::Reg<u32, _AHB3RSTR>;
231#[allow(missing_docs)]
232#[doc(hidden)]
233pub struct _AHB3RSTR;
234#[doc = "`read()` method returns [ahb3rstr::R](ahb3rstr::R) reader structure"]
235impl crate::Readable for AHB3RSTR {}
236#[doc = "`write(|w| ..)` method takes [ahb3rstr::W](ahb3rstr::W) writer structure"]
237impl crate::Writable for AHB3RSTR {}
238#[doc = "AHB3 peripheral reset register"]
239pub mod ahb3rstr;
240#[doc = "APB1 peripheral reset register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb1rstr1](apb1rstr1) module"]
241pub type APB1RSTR1 = crate::Reg<u32, _APB1RSTR1>;
242#[allow(missing_docs)]
243#[doc(hidden)]
244pub struct _APB1RSTR1;
245#[doc = "`read()` method returns [apb1rstr1::R](apb1rstr1::R) reader structure"]
246impl crate::Readable for APB1RSTR1 {}
247#[doc = "`write(|w| ..)` method takes [apb1rstr1::W](apb1rstr1::W) writer structure"]
248impl crate::Writable for APB1RSTR1 {}
249#[doc = "APB1 peripheral reset register 1"]
250pub mod apb1rstr1;
251#[doc = "APB1 peripheral reset register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb1rstr2](apb1rstr2) module"]
252pub type APB1RSTR2 = crate::Reg<u32, _APB1RSTR2>;
253#[allow(missing_docs)]
254#[doc(hidden)]
255pub struct _APB1RSTR2;
256#[doc = "`read()` method returns [apb1rstr2::R](apb1rstr2::R) reader structure"]
257impl crate::Readable for APB1RSTR2 {}
258#[doc = "`write(|w| ..)` method takes [apb1rstr2::W](apb1rstr2::W) writer structure"]
259impl crate::Writable for APB1RSTR2 {}
260#[doc = "APB1 peripheral reset register 2"]
261pub mod apb1rstr2;
262#[doc = "APB2 peripheral reset register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb2rstr](apb2rstr) module"]
263pub type APB2RSTR = crate::Reg<u32, _APB2RSTR>;
264#[allow(missing_docs)]
265#[doc(hidden)]
266pub struct _APB2RSTR;
267#[doc = "`read()` method returns [apb2rstr::R](apb2rstr::R) reader structure"]
268impl crate::Readable for APB2RSTR {}
269#[doc = "`write(|w| ..)` method takes [apb2rstr::W](apb2rstr::W) writer structure"]
270impl crate::Writable for APB2RSTR {}
271#[doc = "APB2 peripheral reset register"]
272pub mod apb2rstr;
273#[doc = "APB3 peripheral reset register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb3rstr](apb3rstr) module"]
274pub type APB3RSTR = crate::Reg<u32, _APB3RSTR>;
275#[allow(missing_docs)]
276#[doc(hidden)]
277pub struct _APB3RSTR;
278#[doc = "`read()` method returns [apb3rstr::R](apb3rstr::R) reader structure"]
279impl crate::Readable for APB3RSTR {}
280#[doc = "`write(|w| ..)` method takes [apb3rstr::W](apb3rstr::W) writer structure"]
281impl crate::Writable for APB3RSTR {}
282#[doc = "APB3 peripheral reset register"]
283pub mod apb3rstr;
284#[doc = "AHB1 peripheral clock enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahb1enr](ahb1enr) module"]
285pub type AHB1ENR = crate::Reg<u32, _AHB1ENR>;
286#[allow(missing_docs)]
287#[doc(hidden)]
288pub struct _AHB1ENR;
289#[doc = "`read()` method returns [ahb1enr::R](ahb1enr::R) reader structure"]
290impl crate::Readable for AHB1ENR {}
291#[doc = "`write(|w| ..)` method takes [ahb1enr::W](ahb1enr::W) writer structure"]
292impl crate::Writable for AHB1ENR {}
293#[doc = "AHB1 peripheral clock enable register"]
294pub mod ahb1enr;
295#[doc = "AHB2 peripheral clock enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahb2enr](ahb2enr) module"]
296pub type AHB2ENR = crate::Reg<u32, _AHB2ENR>;
297#[allow(missing_docs)]
298#[doc(hidden)]
299pub struct _AHB2ENR;
300#[doc = "`read()` method returns [ahb2enr::R](ahb2enr::R) reader structure"]
301impl crate::Readable for AHB2ENR {}
302#[doc = "`write(|w| ..)` method takes [ahb2enr::W](ahb2enr::W) writer structure"]
303impl crate::Writable for AHB2ENR {}
304#[doc = "AHB2 peripheral clock enable register"]
305pub mod ahb2enr;
306#[doc = "AHB3 peripheral clock enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahb3enr](ahb3enr) module"]
307pub type AHB3ENR = crate::Reg<u32, _AHB3ENR>;
308#[allow(missing_docs)]
309#[doc(hidden)]
310pub struct _AHB3ENR;
311#[doc = "`read()` method returns [ahb3enr::R](ahb3enr::R) reader structure"]
312impl crate::Readable for AHB3ENR {}
313#[doc = "`write(|w| ..)` method takes [ahb3enr::W](ahb3enr::W) writer structure"]
314impl crate::Writable for AHB3ENR {}
315#[doc = "AHB3 peripheral clock enable register"]
316pub mod ahb3enr;
317#[doc = "APB1ENR1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb1enr1](apb1enr1) module"]
318pub type APB1ENR1 = crate::Reg<u32, _APB1ENR1>;
319#[allow(missing_docs)]
320#[doc(hidden)]
321pub struct _APB1ENR1;
322#[doc = "`read()` method returns [apb1enr1::R](apb1enr1::R) reader structure"]
323impl crate::Readable for APB1ENR1 {}
324#[doc = "`write(|w| ..)` method takes [apb1enr1::W](apb1enr1::W) writer structure"]
325impl crate::Writable for APB1ENR1 {}
326#[doc = "APB1ENR1"]
327pub mod apb1enr1;
328#[doc = "APB1 peripheral clock enable register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb1enr2](apb1enr2) module"]
329pub type APB1ENR2 = crate::Reg<u32, _APB1ENR2>;
330#[allow(missing_docs)]
331#[doc(hidden)]
332pub struct _APB1ENR2;
333#[doc = "`read()` method returns [apb1enr2::R](apb1enr2::R) reader structure"]
334impl crate::Readable for APB1ENR2 {}
335#[doc = "`write(|w| ..)` method takes [apb1enr2::W](apb1enr2::W) writer structure"]
336impl crate::Writable for APB1ENR2 {}
337#[doc = "APB1 peripheral clock enable register 2"]
338pub mod apb1enr2;
339#[doc = "APB2ENR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb2enr](apb2enr) module"]
340pub type APB2ENR = crate::Reg<u32, _APB2ENR>;
341#[allow(missing_docs)]
342#[doc(hidden)]
343pub struct _APB2ENR;
344#[doc = "`read()` method returns [apb2enr::R](apb2enr::R) reader structure"]
345impl crate::Readable for APB2ENR {}
346#[doc = "`write(|w| ..)` method takes [apb2enr::W](apb2enr::W) writer structure"]
347impl crate::Writable for APB2ENR {}
348#[doc = "APB2ENR"]
349pub mod apb2enr;
350#[doc = "AHB1 peripheral clocks enable in Sleep and Stop modes register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahb1smenr](ahb1smenr) module"]
351pub type AHB1SMENR = crate::Reg<u32, _AHB1SMENR>;
352#[allow(missing_docs)]
353#[doc(hidden)]
354pub struct _AHB1SMENR;
355#[doc = "`read()` method returns [ahb1smenr::R](ahb1smenr::R) reader structure"]
356impl crate::Readable for AHB1SMENR {}
357#[doc = "`write(|w| ..)` method takes [ahb1smenr::W](ahb1smenr::W) writer structure"]
358impl crate::Writable for AHB1SMENR {}
359#[doc = "AHB1 peripheral clocks enable in Sleep and Stop modes register"]
360pub mod ahb1smenr;
361#[doc = "AHB2 peripheral clocks enable in Sleep and Stop modes register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahb2smenr](ahb2smenr) module"]
362pub type AHB2SMENR = crate::Reg<u32, _AHB2SMENR>;
363#[allow(missing_docs)]
364#[doc(hidden)]
365pub struct _AHB2SMENR;
366#[doc = "`read()` method returns [ahb2smenr::R](ahb2smenr::R) reader structure"]
367impl crate::Readable for AHB2SMENR {}
368#[doc = "`write(|w| ..)` method takes [ahb2smenr::W](ahb2smenr::W) writer structure"]
369impl crate::Writable for AHB2SMENR {}
370#[doc = "AHB2 peripheral clocks enable in Sleep and Stop modes register"]
371pub mod ahb2smenr;
372#[doc = "AHB3 peripheral clocks enable in Sleep and Stop modes register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahb3smenr](ahb3smenr) module"]
373pub type AHB3SMENR = crate::Reg<u32, _AHB3SMENR>;
374#[allow(missing_docs)]
375#[doc(hidden)]
376pub struct _AHB3SMENR;
377#[doc = "`read()` method returns [ahb3smenr::R](ahb3smenr::R) reader structure"]
378impl crate::Readable for AHB3SMENR {}
379#[doc = "`write(|w| ..)` method takes [ahb3smenr::W](ahb3smenr::W) writer structure"]
380impl crate::Writable for AHB3SMENR {}
381#[doc = "AHB3 peripheral clocks enable in Sleep and Stop modes register"]
382pub mod ahb3smenr;
383#[doc = "APB1SMENR1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb1smenr1](apb1smenr1) module"]
384pub type APB1SMENR1 = crate::Reg<u32, _APB1SMENR1>;
385#[allow(missing_docs)]
386#[doc(hidden)]
387pub struct _APB1SMENR1;
388#[doc = "`read()` method returns [apb1smenr1::R](apb1smenr1::R) reader structure"]
389impl crate::Readable for APB1SMENR1 {}
390#[doc = "`write(|w| ..)` method takes [apb1smenr1::W](apb1smenr1::W) writer structure"]
391impl crate::Writable for APB1SMENR1 {}
392#[doc = "APB1SMENR1"]
393pub mod apb1smenr1;
394#[doc = "APB1 peripheral clocks enable in Sleep and Stop modes register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb1smenr2](apb1smenr2) module"]
395pub type APB1SMENR2 = crate::Reg<u32, _APB1SMENR2>;
396#[allow(missing_docs)]
397#[doc(hidden)]
398pub struct _APB1SMENR2;
399#[doc = "`read()` method returns [apb1smenr2::R](apb1smenr2::R) reader structure"]
400impl crate::Readable for APB1SMENR2 {}
401#[doc = "`write(|w| ..)` method takes [apb1smenr2::W](apb1smenr2::W) writer structure"]
402impl crate::Writable for APB1SMENR2 {}
403#[doc = "APB1 peripheral clocks enable in Sleep and Stop modes register 2"]
404pub mod apb1smenr2;
405#[doc = "APB2SMENR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb2smenr](apb2smenr) module"]
406pub type APB2SMENR = crate::Reg<u32, _APB2SMENR>;
407#[allow(missing_docs)]
408#[doc(hidden)]
409pub struct _APB2SMENR;
410#[doc = "`read()` method returns [apb2smenr::R](apb2smenr::R) reader structure"]
411impl crate::Readable for APB2SMENR {}
412#[doc = "`write(|w| ..)` method takes [apb2smenr::W](apb2smenr::W) writer structure"]
413impl crate::Writable for APB2SMENR {}
414#[doc = "APB2SMENR"]
415pub mod apb2smenr;
416#[doc = "CCIPR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccipr](ccipr) module"]
417pub type CCIPR = crate::Reg<u32, _CCIPR>;
418#[allow(missing_docs)]
419#[doc(hidden)]
420pub struct _CCIPR;
421#[doc = "`read()` method returns [ccipr::R](ccipr::R) reader structure"]
422impl crate::Readable for CCIPR {}
423#[doc = "`write(|w| ..)` method takes [ccipr::W](ccipr::W) writer structure"]
424impl crate::Writable for CCIPR {}
425#[doc = "CCIPR"]
426pub mod ccipr;
427#[doc = "BDCR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bdcr](bdcr) module"]
428pub type BDCR = crate::Reg<u32, _BDCR>;
429#[allow(missing_docs)]
430#[doc(hidden)]
431pub struct _BDCR;
432#[doc = "`read()` method returns [bdcr::R](bdcr::R) reader structure"]
433impl crate::Readable for BDCR {}
434#[doc = "`write(|w| ..)` method takes [bdcr::W](bdcr::W) writer structure"]
435impl crate::Writable for BDCR {}
436#[doc = "BDCR"]
437pub mod bdcr;
438#[doc = "CSR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [csr](csr) module"]
439pub type CSR = crate::Reg<u32, _CSR>;
440#[allow(missing_docs)]
441#[doc(hidden)]
442pub struct _CSR;
443#[doc = "`read()` method returns [csr::R](csr::R) reader structure"]
444impl crate::Readable for CSR {}
445#[doc = "`write(|w| ..)` method takes [csr::W](csr::W) writer structure"]
446impl crate::Writable for CSR {}
447#[doc = "CSR"]
448pub mod csr;
449#[doc = "Clock recovery RC register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [crrcr](crrcr) module"]
450pub type CRRCR = crate::Reg<u32, _CRRCR>;
451#[allow(missing_docs)]
452#[doc(hidden)]
453pub struct _CRRCR;
454#[doc = "`read()` method returns [crrcr::R](crrcr::R) reader structure"]
455impl crate::Readable for CRRCR {}
456#[doc = "`write(|w| ..)` method takes [crrcr::W](crrcr::W) writer structure"]
457impl crate::Writable for CRRCR {}
458#[doc = "Clock recovery RC register"]
459pub mod crrcr;
460#[doc = "Clock HSE register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hsecr](hsecr) module"]
461pub type HSECR = crate::Reg<u32, _HSECR>;
462#[allow(missing_docs)]
463#[doc(hidden)]
464pub struct _HSECR;
465#[doc = "`read()` method returns [hsecr::R](hsecr::R) reader structure"]
466impl crate::Readable for HSECR {}
467#[doc = "`write(|w| ..)` method takes [hsecr::W](hsecr::W) writer structure"]
468impl crate::Writable for HSECR {}
469#[doc = "Clock HSE register"]
470pub mod hsecr;
471#[doc = "Extended clock recovery register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extcfgr](extcfgr) module"]
472pub type EXTCFGR = crate::Reg<u32, _EXTCFGR>;
473#[allow(missing_docs)]
474#[doc(hidden)]
475pub struct _EXTCFGR;
476#[doc = "`read()` method returns [extcfgr::R](extcfgr::R) reader structure"]
477impl crate::Readable for EXTCFGR {}
478#[doc = "`write(|w| ..)` method takes [extcfgr::W](extcfgr::W) writer structure"]
479impl crate::Writable for EXTCFGR {}
480#[doc = "Extended clock recovery register"]
481pub mod extcfgr;
482#[doc = "CPU2 AHB1 peripheral clock enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2ahb1enr](c2ahb1enr) module"]
483pub type C2AHB1ENR = crate::Reg<u32, _C2AHB1ENR>;
484#[allow(missing_docs)]
485#[doc(hidden)]
486pub struct _C2AHB1ENR;
487#[doc = "`read()` method returns [c2ahb1enr::R](c2ahb1enr::R) reader structure"]
488impl crate::Readable for C2AHB1ENR {}
489#[doc = "`write(|w| ..)` method takes [c2ahb1enr::W](c2ahb1enr::W) writer structure"]
490impl crate::Writable for C2AHB1ENR {}
491#[doc = "CPU2 AHB1 peripheral clock enable register"]
492pub mod c2ahb1enr;
493#[doc = "CPU2 AHB2 peripheral clock enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2ahb2enr](c2ahb2enr) module"]
494pub type C2AHB2ENR = crate::Reg<u32, _C2AHB2ENR>;
495#[allow(missing_docs)]
496#[doc(hidden)]
497pub struct _C2AHB2ENR;
498#[doc = "`read()` method returns [c2ahb2enr::R](c2ahb2enr::R) reader structure"]
499impl crate::Readable for C2AHB2ENR {}
500#[doc = "`write(|w| ..)` method takes [c2ahb2enr::W](c2ahb2enr::W) writer structure"]
501impl crate::Writable for C2AHB2ENR {}
502#[doc = "CPU2 AHB2 peripheral clock enable register"]
503pub mod c2ahb2enr;
504#[doc = "CPU2 AHB3 peripheral clock enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2ahb3enr](c2ahb3enr) module"]
505pub type C2AHB3ENR = crate::Reg<u32, _C2AHB3ENR>;
506#[allow(missing_docs)]
507#[doc(hidden)]
508pub struct _C2AHB3ENR;
509#[doc = "`read()` method returns [c2ahb3enr::R](c2ahb3enr::R) reader structure"]
510impl crate::Readable for C2AHB3ENR {}
511#[doc = "`write(|w| ..)` method takes [c2ahb3enr::W](c2ahb3enr::W) writer structure"]
512impl crate::Writable for C2AHB3ENR {}
513#[doc = "CPU2 AHB3 peripheral clock enable register"]
514pub mod c2ahb3enr;
515#[doc = "CPU2 APB1ENR1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2apb1enr1](c2apb1enr1) module"]
516pub type C2APB1ENR1 = crate::Reg<u32, _C2APB1ENR1>;
517#[allow(missing_docs)]
518#[doc(hidden)]
519pub struct _C2APB1ENR1;
520#[doc = "`read()` method returns [c2apb1enr1::R](c2apb1enr1::R) reader structure"]
521impl crate::Readable for C2APB1ENR1 {}
522#[doc = "`write(|w| ..)` method takes [c2apb1enr1::W](c2apb1enr1::W) writer structure"]
523impl crate::Writable for C2APB1ENR1 {}
524#[doc = "CPU2 APB1ENR1"]
525pub mod c2apb1enr1;
526#[doc = "CPU2 APB1 peripheral clock enable register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2apb1enr2](c2apb1enr2) module"]
527pub type C2APB1ENR2 = crate::Reg<u32, _C2APB1ENR2>;
528#[allow(missing_docs)]
529#[doc(hidden)]
530pub struct _C2APB1ENR2;
531#[doc = "`read()` method returns [c2apb1enr2::R](c2apb1enr2::R) reader structure"]
532impl crate::Readable for C2APB1ENR2 {}
533#[doc = "`write(|w| ..)` method takes [c2apb1enr2::W](c2apb1enr2::W) writer structure"]
534impl crate::Writable for C2APB1ENR2 {}
535#[doc = "CPU2 APB1 peripheral clock enable register 2"]
536pub mod c2apb1enr2;
537#[doc = "CPU2 APB2ENR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2apb2enr](c2apb2enr) module"]
538pub type C2APB2ENR = crate::Reg<u32, _C2APB2ENR>;
539#[allow(missing_docs)]
540#[doc(hidden)]
541pub struct _C2APB2ENR;
542#[doc = "`read()` method returns [c2apb2enr::R](c2apb2enr::R) reader structure"]
543impl crate::Readable for C2APB2ENR {}
544#[doc = "`write(|w| ..)` method takes [c2apb2enr::W](c2apb2enr::W) writer structure"]
545impl crate::Writable for C2APB2ENR {}
546#[doc = "CPU2 APB2ENR"]
547pub mod c2apb2enr;
548#[doc = "CPU2 APB3ENR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2apb3enr](c2apb3enr) module"]
549pub type C2APB3ENR = crate::Reg<u32, _C2APB3ENR>;
550#[allow(missing_docs)]
551#[doc(hidden)]
552pub struct _C2APB3ENR;
553#[doc = "`read()` method returns [c2apb3enr::R](c2apb3enr::R) reader structure"]
554impl crate::Readable for C2APB3ENR {}
555#[doc = "`write(|w| ..)` method takes [c2apb3enr::W](c2apb3enr::W) writer structure"]
556impl crate::Writable for C2APB3ENR {}
557#[doc = "CPU2 APB3ENR"]
558pub mod c2apb3enr;
559#[doc = "CPU2 AHB1 peripheral clocks enable in Sleep and Stop modes register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2ahb1smenr](c2ahb1smenr) module"]
560pub type C2AHB1SMENR = crate::Reg<u32, _C2AHB1SMENR>;
561#[allow(missing_docs)]
562#[doc(hidden)]
563pub struct _C2AHB1SMENR;
564#[doc = "`read()` method returns [c2ahb1smenr::R](c2ahb1smenr::R) reader structure"]
565impl crate::Readable for C2AHB1SMENR {}
566#[doc = "`write(|w| ..)` method takes [c2ahb1smenr::W](c2ahb1smenr::W) writer structure"]
567impl crate::Writable for C2AHB1SMENR {}
568#[doc = "CPU2 AHB1 peripheral clocks enable in Sleep and Stop modes register"]
569pub mod c2ahb1smenr;
570#[doc = "CPU2 AHB2 peripheral clocks enable in Sleep and Stop modes register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2ahb2smenr](c2ahb2smenr) module"]
571pub type C2AHB2SMENR = crate::Reg<u32, _C2AHB2SMENR>;
572#[allow(missing_docs)]
573#[doc(hidden)]
574pub struct _C2AHB2SMENR;
575#[doc = "`read()` method returns [c2ahb2smenr::R](c2ahb2smenr::R) reader structure"]
576impl crate::Readable for C2AHB2SMENR {}
577#[doc = "`write(|w| ..)` method takes [c2ahb2smenr::W](c2ahb2smenr::W) writer structure"]
578impl crate::Writable for C2AHB2SMENR {}
579#[doc = "CPU2 AHB2 peripheral clocks enable in Sleep and Stop modes register"]
580pub mod c2ahb2smenr;
581#[doc = "CPU2 AHB3 peripheral clocks enable in Sleep and Stop modes register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2ahb3smenr](c2ahb3smenr) module"]
582pub type C2AHB3SMENR = crate::Reg<u32, _C2AHB3SMENR>;
583#[allow(missing_docs)]
584#[doc(hidden)]
585pub struct _C2AHB3SMENR;
586#[doc = "`read()` method returns [c2ahb3smenr::R](c2ahb3smenr::R) reader structure"]
587impl crate::Readable for C2AHB3SMENR {}
588#[doc = "`write(|w| ..)` method takes [c2ahb3smenr::W](c2ahb3smenr::W) writer structure"]
589impl crate::Writable for C2AHB3SMENR {}
590#[doc = "CPU2 AHB3 peripheral clocks enable in Sleep and Stop modes register"]
591pub mod c2ahb3smenr;
592#[doc = "CPU2 APB1SMENR1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2apb1smenr1](c2apb1smenr1) module"]
593pub type C2APB1SMENR1 = crate::Reg<u32, _C2APB1SMENR1>;
594#[allow(missing_docs)]
595#[doc(hidden)]
596pub struct _C2APB1SMENR1;
597#[doc = "`read()` method returns [c2apb1smenr1::R](c2apb1smenr1::R) reader structure"]
598impl crate::Readable for C2APB1SMENR1 {}
599#[doc = "`write(|w| ..)` method takes [c2apb1smenr1::W](c2apb1smenr1::W) writer structure"]
600impl crate::Writable for C2APB1SMENR1 {}
601#[doc = "CPU2 APB1SMENR1"]
602pub mod c2apb1smenr1;
603#[doc = "CPU2 APB1 peripheral clocks enable in Sleep and Stop modes register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2apb1smenr2](c2apb1smenr2) module"]
604pub type C2APB1SMENR2 = crate::Reg<u32, _C2APB1SMENR2>;
605#[allow(missing_docs)]
606#[doc(hidden)]
607pub struct _C2APB1SMENR2;
608#[doc = "`read()` method returns [c2apb1smenr2::R](c2apb1smenr2::R) reader structure"]
609impl crate::Readable for C2APB1SMENR2 {}
610#[doc = "`write(|w| ..)` method takes [c2apb1smenr2::W](c2apb1smenr2::W) writer structure"]
611impl crate::Writable for C2APB1SMENR2 {}
612#[doc = "CPU2 APB1 peripheral clocks enable in Sleep and Stop modes register 2"]
613pub mod c2apb1smenr2;
614#[doc = "CPU2 APB2SMENR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2apb2smenr](c2apb2smenr) module"]
615pub type C2APB2SMENR = crate::Reg<u32, _C2APB2SMENR>;
616#[allow(missing_docs)]
617#[doc(hidden)]
618pub struct _C2APB2SMENR;
619#[doc = "`read()` method returns [c2apb2smenr::R](c2apb2smenr::R) reader structure"]
620impl crate::Readable for C2APB2SMENR {}
621#[doc = "`write(|w| ..)` method takes [c2apb2smenr::W](c2apb2smenr::W) writer structure"]
622impl crate::Writable for C2APB2SMENR {}
623#[doc = "CPU2 APB2SMENR"]
624pub mod c2apb2smenr;
625#[doc = "CPU2 APB3SMENR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2apb3smenr](c2apb3smenr) module"]
626pub type C2APB3SMENR = crate::Reg<u32, _C2APB3SMENR>;
627#[allow(missing_docs)]
628#[doc(hidden)]
629pub struct _C2APB3SMENR;
630#[doc = "`read()` method returns [c2apb3smenr::R](c2apb3smenr::R) reader structure"]
631impl crate::Readable for C2APB3SMENR {}
632#[doc = "`write(|w| ..)` method takes [c2apb3smenr::W](c2apb3smenr::W) writer structure"]
633impl crate::Writable for C2APB3SMENR {}
634#[doc = "CPU2 APB3SMENR"]
635pub mod c2apb3smenr;
stm32wb_pac/rcc.rs

stm32wb_pac/
rcc.rs
