1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - interrupt status register"]
5 pub isr: ISR,
6 #[doc = "0x04 - interrupt flag clear register"]
7 pub ifcr: IFCR,
8 #[doc = "0x08 - channel x configuration register"]
9 pub ccr1: CCR1,
10 #[doc = "0x0c - channel x number of data register"]
11 pub cndtr1: CNDTR1,
12 #[doc = "0x10 - channel x peripheral address register"]
13 pub cpar1: CPAR1,
14 #[doc = "0x14 - channel x memory address register"]
15 pub cmar1: CMAR1,
16 _reserved6: [u8; 4usize],
17 #[doc = "0x1c - channel x configuration register"]
18 pub ccr2: CCR2,
19 #[doc = "0x20 - channel x number of data register"]
20 pub cndtr2: CNDTR2,
21 #[doc = "0x24 - channel x peripheral address register"]
22 pub cpar2: CPAR2,
23 #[doc = "0x28 - channel x memory address register"]
24 pub cmar2: CMAR2,
25 _reserved10: [u8; 4usize],
26 #[doc = "0x30 - channel x configuration register"]
27 pub ccr3: CCR3,
28 #[doc = "0x34 - channel x number of data register"]
29 pub cndtr3: CNDTR3,
30 #[doc = "0x38 - channel x peripheral address register"]
31 pub cpar3: CPAR3,
32 #[doc = "0x3c - channel x memory address register"]
33 pub cmar3: CMAR3,
34 _reserved14: [u8; 4usize],
35 #[doc = "0x44 - channel x configuration register"]
36 pub ccr4: CCR4,
37 #[doc = "0x48 - channel x number of data register"]
38 pub cndtr4: CNDTR4,
39 #[doc = "0x4c - channel x peripheral address register"]
40 pub cpar4: CPAR4,
41 #[doc = "0x50 - channel x memory address register"]
42 pub cmar4: CMAR4,
43 _reserved18: [u8; 4usize],
44 #[doc = "0x58 - channel x configuration register"]
45 pub ccr5: CCR5,
46 #[doc = "0x5c - channel x number of data register"]
47 pub cndtr5: CNDTR5,
48 #[doc = "0x60 - channel x peripheral address register"]
49 pub cpar5: CPAR5,
50 #[doc = "0x64 - channel x memory address register"]
51 pub cmar5: CMAR5,
52 _reserved22: [u8; 4usize],
53 #[doc = "0x6c - channel x configuration register"]
54 pub ccr6: CCR6,
55 #[doc = "0x70 - channel x number of data register"]
56 pub cndtr6: CNDTR6,
57 #[doc = "0x74 - channel x peripheral address register"]
58 pub cpar6: CPAR6,
59 #[doc = "0x78 - channel x memory address register"]
60 pub cmar6: CMAR6,
61 _reserved26: [u8; 4usize],
62 #[doc = "0x80 - channel x configuration register"]
63 pub ccr7: CCR7,
64 #[doc = "0x84 - channel x number of data register"]
65 pub cndtr7: CNDTR7,
66 #[doc = "0x88 - channel x peripheral address register"]
67 pub cpar7: CPAR7,
68 #[doc = "0x8c - channel x memory address register"]
69 pub cmar7: CMAR7,
70 _reserved30: [u8; 24usize],
71 #[doc = "0xa8 - channel selection register"]
72 pub cselr: CSELR,
73}
74#[doc = "interrupt status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](isr) module"]
75pub type ISR = crate::Reg<u32, _ISR>;
76#[allow(missing_docs)]
77#[doc(hidden)]
78pub struct _ISR;
79#[doc = "`read()` method returns [isr::R](isr::R) reader structure"]
80impl crate::Readable for ISR {}
81#[doc = "interrupt status register"]
82pub mod isr;
83#[doc = "interrupt flag clear register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifcr](ifcr) module"]
84pub type IFCR = crate::Reg<u32, _IFCR>;
85#[allow(missing_docs)]
86#[doc(hidden)]
87pub struct _IFCR;
88#[doc = "`write(|w| ..)` method takes [ifcr::W](ifcr::W) writer structure"]
89impl crate::Writable for IFCR {}
90#[doc = "interrupt flag clear register"]
91pub mod ifcr;
92#[doc = "channel x configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr1](ccr1) module"]
93pub type CCR1 = crate::Reg<u32, _CCR1>;
94#[allow(missing_docs)]
95#[doc(hidden)]
96pub struct _CCR1;
97#[doc = "`read()` method returns [ccr1::R](ccr1::R) reader structure"]
98impl crate::Readable for CCR1 {}
99#[doc = "`write(|w| ..)` method takes [ccr1::W](ccr1::W) writer structure"]
100impl crate::Writable for CCR1 {}
101#[doc = "channel x configuration register"]
102pub mod ccr1;
103#[doc = "channel x number of data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cndtr1](cndtr1) module"]
104pub type CNDTR1 = crate::Reg<u32, _CNDTR1>;
105#[allow(missing_docs)]
106#[doc(hidden)]
107pub struct _CNDTR1;
108#[doc = "`read()` method returns [cndtr1::R](cndtr1::R) reader structure"]
109impl crate::Readable for CNDTR1 {}
110#[doc = "`write(|w| ..)` method takes [cndtr1::W](cndtr1::W) writer structure"]
111impl crate::Writable for CNDTR1 {}
112#[doc = "channel x number of data register"]
113pub mod cndtr1;
114#[doc = "channel x peripheral address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cpar1](cpar1) module"]
115pub type CPAR1 = crate::Reg<u32, _CPAR1>;
116#[allow(missing_docs)]
117#[doc(hidden)]
118pub struct _CPAR1;
119#[doc = "`read()` method returns [cpar1::R](cpar1::R) reader structure"]
120impl crate::Readable for CPAR1 {}
121#[doc = "`write(|w| ..)` method takes [cpar1::W](cpar1::W) writer structure"]
122impl crate::Writable for CPAR1 {}
123#[doc = "channel x peripheral address register"]
124pub mod cpar1;
125#[doc = "channel x memory address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmar1](cmar1) module"]
126pub type CMAR1 = crate::Reg<u32, _CMAR1>;
127#[allow(missing_docs)]
128#[doc(hidden)]
129pub struct _CMAR1;
130#[doc = "`read()` method returns [cmar1::R](cmar1::R) reader structure"]
131impl crate::Readable for CMAR1 {}
132#[doc = "`write(|w| ..)` method takes [cmar1::W](cmar1::W) writer structure"]
133impl crate::Writable for CMAR1 {}
134#[doc = "channel x memory address register"]
135pub mod cmar1;
136#[doc = "channel x configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr2](ccr2) module"]
137pub type CCR2 = crate::Reg<u32, _CCR2>;
138#[allow(missing_docs)]
139#[doc(hidden)]
140pub struct _CCR2;
141#[doc = "`read()` method returns [ccr2::R](ccr2::R) reader structure"]
142impl crate::Readable for CCR2 {}
143#[doc = "`write(|w| ..)` method takes [ccr2::W](ccr2::W) writer structure"]
144impl crate::Writable for CCR2 {}
145#[doc = "channel x configuration register"]
146pub mod ccr2;
147#[doc = "channel x number of data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cndtr2](cndtr2) module"]
148pub type CNDTR2 = crate::Reg<u32, _CNDTR2>;
149#[allow(missing_docs)]
150#[doc(hidden)]
151pub struct _CNDTR2;
152#[doc = "`read()` method returns [cndtr2::R](cndtr2::R) reader structure"]
153impl crate::Readable for CNDTR2 {}
154#[doc = "`write(|w| ..)` method takes [cndtr2::W](cndtr2::W) writer structure"]
155impl crate::Writable for CNDTR2 {}
156#[doc = "channel x number of data register"]
157pub mod cndtr2;
158#[doc = "channel x peripheral address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cpar2](cpar2) module"]
159pub type CPAR2 = crate::Reg<u32, _CPAR2>;
160#[allow(missing_docs)]
161#[doc(hidden)]
162pub struct _CPAR2;
163#[doc = "`read()` method returns [cpar2::R](cpar2::R) reader structure"]
164impl crate::Readable for CPAR2 {}
165#[doc = "`write(|w| ..)` method takes [cpar2::W](cpar2::W) writer structure"]
166impl crate::Writable for CPAR2 {}
167#[doc = "channel x peripheral address register"]
168pub mod cpar2;
169#[doc = "channel x memory address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmar2](cmar2) module"]
170pub type CMAR2 = crate::Reg<u32, _CMAR2>;
171#[allow(missing_docs)]
172#[doc(hidden)]
173pub struct _CMAR2;
174#[doc = "`read()` method returns [cmar2::R](cmar2::R) reader structure"]
175impl crate::Readable for CMAR2 {}
176#[doc = "`write(|w| ..)` method takes [cmar2::W](cmar2::W) writer structure"]
177impl crate::Writable for CMAR2 {}
178#[doc = "channel x memory address register"]
179pub mod cmar2;
180#[doc = "channel x configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr3](ccr3) module"]
181pub type CCR3 = crate::Reg<u32, _CCR3>;
182#[allow(missing_docs)]
183#[doc(hidden)]
184pub struct _CCR3;
185#[doc = "`read()` method returns [ccr3::R](ccr3::R) reader structure"]
186impl crate::Readable for CCR3 {}
187#[doc = "`write(|w| ..)` method takes [ccr3::W](ccr3::W) writer structure"]
188impl crate::Writable for CCR3 {}
189#[doc = "channel x configuration register"]
190pub mod ccr3;
191#[doc = "channel x number of data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cndtr3](cndtr3) module"]
192pub type CNDTR3 = crate::Reg<u32, _CNDTR3>;
193#[allow(missing_docs)]
194#[doc(hidden)]
195pub struct _CNDTR3;
196#[doc = "`read()` method returns [cndtr3::R](cndtr3::R) reader structure"]
197impl crate::Readable for CNDTR3 {}
198#[doc = "`write(|w| ..)` method takes [cndtr3::W](cndtr3::W) writer structure"]
199impl crate::Writable for CNDTR3 {}
200#[doc = "channel x number of data register"]
201pub mod cndtr3;
202#[doc = "channel x peripheral address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cpar3](cpar3) module"]
203pub type CPAR3 = crate::Reg<u32, _CPAR3>;
204#[allow(missing_docs)]
205#[doc(hidden)]
206pub struct _CPAR3;
207#[doc = "`read()` method returns [cpar3::R](cpar3::R) reader structure"]
208impl crate::Readable for CPAR3 {}
209#[doc = "`write(|w| ..)` method takes [cpar3::W](cpar3::W) writer structure"]
210impl crate::Writable for CPAR3 {}
211#[doc = "channel x peripheral address register"]
212pub mod cpar3;
213#[doc = "channel x memory address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmar3](cmar3) module"]
214pub type CMAR3 = crate::Reg<u32, _CMAR3>;
215#[allow(missing_docs)]
216#[doc(hidden)]
217pub struct _CMAR3;
218#[doc = "`read()` method returns [cmar3::R](cmar3::R) reader structure"]
219impl crate::Readable for CMAR3 {}
220#[doc = "`write(|w| ..)` method takes [cmar3::W](cmar3::W) writer structure"]
221impl crate::Writable for CMAR3 {}
222#[doc = "channel x memory address register"]
223pub mod cmar3;
224#[doc = "channel x configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr4](ccr4) module"]
225pub type CCR4 = crate::Reg<u32, _CCR4>;
226#[allow(missing_docs)]
227#[doc(hidden)]
228pub struct _CCR4;
229#[doc = "`read()` method returns [ccr4::R](ccr4::R) reader structure"]
230impl crate::Readable for CCR4 {}
231#[doc = "`write(|w| ..)` method takes [ccr4::W](ccr4::W) writer structure"]
232impl crate::Writable for CCR4 {}
233#[doc = "channel x configuration register"]
234pub mod ccr4;
235#[doc = "channel x number of data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cndtr4](cndtr4) module"]
236pub type CNDTR4 = crate::Reg<u32, _CNDTR4>;
237#[allow(missing_docs)]
238#[doc(hidden)]
239pub struct _CNDTR4;
240#[doc = "`read()` method returns [cndtr4::R](cndtr4::R) reader structure"]
241impl crate::Readable for CNDTR4 {}
242#[doc = "`write(|w| ..)` method takes [cndtr4::W](cndtr4::W) writer structure"]
243impl crate::Writable for CNDTR4 {}
244#[doc = "channel x number of data register"]
245pub mod cndtr4;
246#[doc = "channel x peripheral address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cpar4](cpar4) module"]
247pub type CPAR4 = crate::Reg<u32, _CPAR4>;
248#[allow(missing_docs)]
249#[doc(hidden)]
250pub struct _CPAR4;
251#[doc = "`read()` method returns [cpar4::R](cpar4::R) reader structure"]
252impl crate::Readable for CPAR4 {}
253#[doc = "`write(|w| ..)` method takes [cpar4::W](cpar4::W) writer structure"]
254impl crate::Writable for CPAR4 {}
255#[doc = "channel x peripheral address register"]
256pub mod cpar4;
257#[doc = "channel x memory address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmar4](cmar4) module"]
258pub type CMAR4 = crate::Reg<u32, _CMAR4>;
259#[allow(missing_docs)]
260#[doc(hidden)]
261pub struct _CMAR4;
262#[doc = "`read()` method returns [cmar4::R](cmar4::R) reader structure"]
263impl crate::Readable for CMAR4 {}
264#[doc = "`write(|w| ..)` method takes [cmar4::W](cmar4::W) writer structure"]
265impl crate::Writable for CMAR4 {}
266#[doc = "channel x memory address register"]
267pub mod cmar4;
268#[doc = "channel x configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr5](ccr5) module"]
269pub type CCR5 = crate::Reg<u32, _CCR5>;
270#[allow(missing_docs)]
271#[doc(hidden)]
272pub struct _CCR5;
273#[doc = "`read()` method returns [ccr5::R](ccr5::R) reader structure"]
274impl crate::Readable for CCR5 {}
275#[doc = "`write(|w| ..)` method takes [ccr5::W](ccr5::W) writer structure"]
276impl crate::Writable for CCR5 {}
277#[doc = "channel x configuration register"]
278pub mod ccr5;
279#[doc = "channel x number of data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cndtr5](cndtr5) module"]
280pub type CNDTR5 = crate::Reg<u32, _CNDTR5>;
281#[allow(missing_docs)]
282#[doc(hidden)]
283pub struct _CNDTR5;
284#[doc = "`read()` method returns [cndtr5::R](cndtr5::R) reader structure"]
285impl crate::Readable for CNDTR5 {}
286#[doc = "`write(|w| ..)` method takes [cndtr5::W](cndtr5::W) writer structure"]
287impl crate::Writable for CNDTR5 {}
288#[doc = "channel x number of data register"]
289pub mod cndtr5;
290#[doc = "channel x peripheral address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cpar5](cpar5) module"]
291pub type CPAR5 = crate::Reg<u32, _CPAR5>;
292#[allow(missing_docs)]
293#[doc(hidden)]
294pub struct _CPAR5;
295#[doc = "`read()` method returns [cpar5::R](cpar5::R) reader structure"]
296impl crate::Readable for CPAR5 {}
297#[doc = "`write(|w| ..)` method takes [cpar5::W](cpar5::W) writer structure"]
298impl crate::Writable for CPAR5 {}
299#[doc = "channel x peripheral address register"]
300pub mod cpar5;
301#[doc = "channel x memory address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmar5](cmar5) module"]
302pub type CMAR5 = crate::Reg<u32, _CMAR5>;
303#[allow(missing_docs)]
304#[doc(hidden)]
305pub struct _CMAR5;
306#[doc = "`read()` method returns [cmar5::R](cmar5::R) reader structure"]
307impl crate::Readable for CMAR5 {}
308#[doc = "`write(|w| ..)` method takes [cmar5::W](cmar5::W) writer structure"]
309impl crate::Writable for CMAR5 {}
310#[doc = "channel x memory address register"]
311pub mod cmar5;
312#[doc = "channel x configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr6](ccr6) module"]
313pub type CCR6 = crate::Reg<u32, _CCR6>;
314#[allow(missing_docs)]
315#[doc(hidden)]
316pub struct _CCR6;
317#[doc = "`read()` method returns [ccr6::R](ccr6::R) reader structure"]
318impl crate::Readable for CCR6 {}
319#[doc = "`write(|w| ..)` method takes [ccr6::W](ccr6::W) writer structure"]
320impl crate::Writable for CCR6 {}
321#[doc = "channel x configuration register"]
322pub mod ccr6;
323#[doc = "channel x number of data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cndtr6](cndtr6) module"]
324pub type CNDTR6 = crate::Reg<u32, _CNDTR6>;
325#[allow(missing_docs)]
326#[doc(hidden)]
327pub struct _CNDTR6;
328#[doc = "`read()` method returns [cndtr6::R](cndtr6::R) reader structure"]
329impl crate::Readable for CNDTR6 {}
330#[doc = "`write(|w| ..)` method takes [cndtr6::W](cndtr6::W) writer structure"]
331impl crate::Writable for CNDTR6 {}
332#[doc = "channel x number of data register"]
333pub mod cndtr6;
334#[doc = "channel x peripheral address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cpar6](cpar6) module"]
335pub type CPAR6 = crate::Reg<u32, _CPAR6>;
336#[allow(missing_docs)]
337#[doc(hidden)]
338pub struct _CPAR6;
339#[doc = "`read()` method returns [cpar6::R](cpar6::R) reader structure"]
340impl crate::Readable for CPAR6 {}
341#[doc = "`write(|w| ..)` method takes [cpar6::W](cpar6::W) writer structure"]
342impl crate::Writable for CPAR6 {}
343#[doc = "channel x peripheral address register"]
344pub mod cpar6;
345#[doc = "channel x memory address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmar6](cmar6) module"]
346pub type CMAR6 = crate::Reg<u32, _CMAR6>;
347#[allow(missing_docs)]
348#[doc(hidden)]
349pub struct _CMAR6;
350#[doc = "`read()` method returns [cmar6::R](cmar6::R) reader structure"]
351impl crate::Readable for CMAR6 {}
352#[doc = "`write(|w| ..)` method takes [cmar6::W](cmar6::W) writer structure"]
353impl crate::Writable for CMAR6 {}
354#[doc = "channel x memory address register"]
355pub mod cmar6;
356#[doc = "channel x configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr7](ccr7) module"]
357pub type CCR7 = crate::Reg<u32, _CCR7>;
358#[allow(missing_docs)]
359#[doc(hidden)]
360pub struct _CCR7;
361#[doc = "`read()` method returns [ccr7::R](ccr7::R) reader structure"]
362impl crate::Readable for CCR7 {}
363#[doc = "`write(|w| ..)` method takes [ccr7::W](ccr7::W) writer structure"]
364impl crate::Writable for CCR7 {}
365#[doc = "channel x configuration register"]
366pub mod ccr7;
367#[doc = "channel x number of data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cndtr7](cndtr7) module"]
368pub type CNDTR7 = crate::Reg<u32, _CNDTR7>;
369#[allow(missing_docs)]
370#[doc(hidden)]
371pub struct _CNDTR7;
372#[doc = "`read()` method returns [cndtr7::R](cndtr7::R) reader structure"]
373impl crate::Readable for CNDTR7 {}
374#[doc = "`write(|w| ..)` method takes [cndtr7::W](cndtr7::W) writer structure"]
375impl crate::Writable for CNDTR7 {}
376#[doc = "channel x number of data register"]
377pub mod cndtr7;
378#[doc = "channel x peripheral address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cpar7](cpar7) module"]
379pub type CPAR7 = crate::Reg<u32, _CPAR7>;
380#[allow(missing_docs)]
381#[doc(hidden)]
382pub struct _CPAR7;
383#[doc = "`read()` method returns [cpar7::R](cpar7::R) reader structure"]
384impl crate::Readable for CPAR7 {}
385#[doc = "`write(|w| ..)` method takes [cpar7::W](cpar7::W) writer structure"]
386impl crate::Writable for CPAR7 {}
387#[doc = "channel x peripheral address register"]
388pub mod cpar7;
389#[doc = "channel x memory address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmar7](cmar7) module"]
390pub type CMAR7 = crate::Reg<u32, _CMAR7>;
391#[allow(missing_docs)]
392#[doc(hidden)]
393pub struct _CMAR7;
394#[doc = "`read()` method returns [cmar7::R](cmar7::R) reader structure"]
395impl crate::Readable for CMAR7 {}
396#[doc = "`write(|w| ..)` method takes [cmar7::W](cmar7::W) writer structure"]
397impl crate::Writable for CMAR7 {}
398#[doc = "channel x memory address register"]
399pub mod cmar7;
400#[doc = "channel selection register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cselr](cselr) module"]
401pub type CSELR = crate::Reg<u32, _CSELR>;
402#[allow(missing_docs)]
403#[doc(hidden)]
404pub struct _CSELR;
405#[doc = "`read()` method returns [cselr::R](cselr::R) reader structure"]
406impl crate::Readable for CSELR {}
407#[doc = "`write(|w| ..)` method takes [cselr::W](cselr::W) writer structure"]
408impl crate::Writable for CSELR {}
409#[doc = "channel selection register"]
410pub mod cselr;