stm32wb_pac/
tim17.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    #[doc = "0x00 - control register 1"]
5    pub cr1: CR1,
6    #[doc = "0x04 - control register 2"]
7    pub cr2: CR2,
8    #[doc = "0x08 - DMA/Interrupt enable register"]
9    pub dier: DIER,
10    #[doc = "0x0c - status register"]
11    pub sr: SR,
12    #[doc = "0x10 - event generation register"]
13    pub egr: EGR,
14    #[doc = "0x14 - capture/compare mode register (output mode)"]
15    pub ccmr1_output: CCMR1_OUTPUT,
16    #[doc = "0x18 - capture/compare mode register 1 (input mode)"]
17    pub ccmr1_input: CCMR1_INPUT,
18    #[doc = "0x1c - capture/compare enable register"]
19    pub ccer: CCER,
20    #[doc = "0x20 - counter"]
21    pub cnt: CNT,
22    #[doc = "0x24 - prescaler"]
23    pub psc: PSC,
24    #[doc = "0x28 - auto-reload register"]
25    pub arr: ARR,
26    #[doc = "0x2c - repetition counter register"]
27    pub rcr: RCR,
28    #[doc = "0x30 - capture/compare register 1"]
29    pub ccr1: CCR1,
30    #[doc = "0x34 - break and dead-time register"]
31    pub bdtr: BDTR,
32    #[doc = "0x38 - DMA control register"]
33    pub dcr: DCR,
34    #[doc = "0x3c - DMA address for full transfer"]
35    pub dmar: DMAR,
36    #[doc = "0x40 - TIM16 option register 1"]
37    pub or: OR,
38    #[doc = "0x44 - TIM17 option register 1"]
39    pub af1: AF1,
40}
41#[doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module"]
42pub type CR1 = crate::Reg<u32, _CR1>;
43#[allow(missing_docs)]
44#[doc(hidden)]
45pub struct _CR1;
46#[doc = "`read()` method returns [cr1::R](cr1::R) reader structure"]
47impl crate::Readable for CR1 {}
48#[doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure"]
49impl crate::Writable for CR1 {}
50#[doc = "control register 1"]
51pub mod cr1;
52#[doc = "control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](cr2) module"]
53pub type CR2 = crate::Reg<u32, _CR2>;
54#[allow(missing_docs)]
55#[doc(hidden)]
56pub struct _CR2;
57#[doc = "`read()` method returns [cr2::R](cr2::R) reader structure"]
58impl crate::Readable for CR2 {}
59#[doc = "`write(|w| ..)` method takes [cr2::W](cr2::W) writer structure"]
60impl crate::Writable for CR2 {}
61#[doc = "control register 2"]
62pub mod cr2;
63#[doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dier](dier) module"]
64pub type DIER = crate::Reg<u32, _DIER>;
65#[allow(missing_docs)]
66#[doc(hidden)]
67pub struct _DIER;
68#[doc = "`read()` method returns [dier::R](dier::R) reader structure"]
69impl crate::Readable for DIER {}
70#[doc = "`write(|w| ..)` method takes [dier::W](dier::W) writer structure"]
71impl crate::Writable for DIER {}
72#[doc = "DMA/Interrupt enable register"]
73pub mod dier;
74#[doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module"]
75pub type SR = crate::Reg<u32, _SR>;
76#[allow(missing_docs)]
77#[doc(hidden)]
78pub struct _SR;
79#[doc = "`read()` method returns [sr::R](sr::R) reader structure"]
80impl crate::Readable for SR {}
81#[doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure"]
82impl crate::Writable for SR {}
83#[doc = "status register"]
84pub mod sr;
85#[doc = "event generation register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [egr](egr) module"]
86pub type EGR = crate::Reg<u32, _EGR>;
87#[allow(missing_docs)]
88#[doc(hidden)]
89pub struct _EGR;
90#[doc = "`write(|w| ..)` method takes [egr::W](egr::W) writer structure"]
91impl crate::Writable for EGR {}
92#[doc = "event generation register"]
93pub mod egr;
94#[doc = "capture/compare mode register (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_output](ccmr1_output) module"]
95pub type CCMR1_OUTPUT = crate::Reg<u32, _CCMR1_OUTPUT>;
96#[allow(missing_docs)]
97#[doc(hidden)]
98pub struct _CCMR1_OUTPUT;
99#[doc = "`read()` method returns [ccmr1_output::R](ccmr1_output::R) reader structure"]
100impl crate::Readable for CCMR1_OUTPUT {}
101#[doc = "`write(|w| ..)` method takes [ccmr1_output::W](ccmr1_output::W) writer structure"]
102impl crate::Writable for CCMR1_OUTPUT {}
103#[doc = "capture/compare mode register (output mode)"]
104pub mod ccmr1_output;
105#[doc = "capture/compare mode register 1 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_input](ccmr1_input) module"]
106pub type CCMR1_INPUT = crate::Reg<u32, _CCMR1_INPUT>;
107#[allow(missing_docs)]
108#[doc(hidden)]
109pub struct _CCMR1_INPUT;
110#[doc = "`read()` method returns [ccmr1_input::R](ccmr1_input::R) reader structure"]
111impl crate::Readable for CCMR1_INPUT {}
112#[doc = "`write(|w| ..)` method takes [ccmr1_input::W](ccmr1_input::W) writer structure"]
113impl crate::Writable for CCMR1_INPUT {}
114#[doc = "capture/compare mode register 1 (input mode)"]
115pub mod ccmr1_input;
116#[doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccer](ccer) module"]
117pub type CCER = crate::Reg<u32, _CCER>;
118#[allow(missing_docs)]
119#[doc(hidden)]
120pub struct _CCER;
121#[doc = "`read()` method returns [ccer::R](ccer::R) reader structure"]
122impl crate::Readable for CCER {}
123#[doc = "`write(|w| ..)` method takes [ccer::W](ccer::W) writer structure"]
124impl crate::Writable for CCER {}
125#[doc = "capture/compare enable register"]
126pub mod ccer;
127#[doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](cnt) module"]
128pub type CNT = crate::Reg<u32, _CNT>;
129#[allow(missing_docs)]
130#[doc(hidden)]
131pub struct _CNT;
132#[doc = "`read()` method returns [cnt::R](cnt::R) reader structure"]
133impl crate::Readable for CNT {}
134#[doc = "`write(|w| ..)` method takes [cnt::W](cnt::W) writer structure"]
135impl crate::Writable for CNT {}
136#[doc = "counter"]
137pub mod cnt;
138#[doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](psc) module"]
139pub type PSC = crate::Reg<u32, _PSC>;
140#[allow(missing_docs)]
141#[doc(hidden)]
142pub struct _PSC;
143#[doc = "`read()` method returns [psc::R](psc::R) reader structure"]
144impl crate::Readable for PSC {}
145#[doc = "`write(|w| ..)` method takes [psc::W](psc::W) writer structure"]
146impl crate::Writable for PSC {}
147#[doc = "prescaler"]
148pub mod psc;
149#[doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [arr](arr) module"]
150pub type ARR = crate::Reg<u32, _ARR>;
151#[allow(missing_docs)]
152#[doc(hidden)]
153pub struct _ARR;
154#[doc = "`read()` method returns [arr::R](arr::R) reader structure"]
155impl crate::Readable for ARR {}
156#[doc = "`write(|w| ..)` method takes [arr::W](arr::W) writer structure"]
157impl crate::Writable for ARR {}
158#[doc = "auto-reload register"]
159pub mod arr;
160#[doc = "repetition counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rcr](rcr) module"]
161pub type RCR = crate::Reg<u32, _RCR>;
162#[allow(missing_docs)]
163#[doc(hidden)]
164pub struct _RCR;
165#[doc = "`read()` method returns [rcr::R](rcr::R) reader structure"]
166impl crate::Readable for RCR {}
167#[doc = "`write(|w| ..)` method takes [rcr::W](rcr::W) writer structure"]
168impl crate::Writable for RCR {}
169#[doc = "repetition counter register"]
170pub mod rcr;
171#[doc = "capture/compare register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr1](ccr1) module"]
172pub type CCR1 = crate::Reg<u32, _CCR1>;
173#[allow(missing_docs)]
174#[doc(hidden)]
175pub struct _CCR1;
176#[doc = "`read()` method returns [ccr1::R](ccr1::R) reader structure"]
177impl crate::Readable for CCR1 {}
178#[doc = "`write(|w| ..)` method takes [ccr1::W](ccr1::W) writer structure"]
179impl crate::Writable for CCR1 {}
180#[doc = "capture/compare register 1"]
181pub mod ccr1;
182#[doc = "break and dead-time register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bdtr](bdtr) module"]
183pub type BDTR = crate::Reg<u32, _BDTR>;
184#[allow(missing_docs)]
185#[doc(hidden)]
186pub struct _BDTR;
187#[doc = "`read()` method returns [bdtr::R](bdtr::R) reader structure"]
188impl crate::Readable for BDTR {}
189#[doc = "`write(|w| ..)` method takes [bdtr::W](bdtr::W) writer structure"]
190impl crate::Writable for BDTR {}
191#[doc = "break and dead-time register"]
192pub mod bdtr;
193#[doc = "DMA control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcr](dcr) module"]
194pub type DCR = crate::Reg<u32, _DCR>;
195#[allow(missing_docs)]
196#[doc(hidden)]
197pub struct _DCR;
198#[doc = "`read()` method returns [dcr::R](dcr::R) reader structure"]
199impl crate::Readable for DCR {}
200#[doc = "`write(|w| ..)` method takes [dcr::W](dcr::W) writer structure"]
201impl crate::Writable for DCR {}
202#[doc = "DMA control register"]
203pub mod dcr;
204#[doc = "DMA address for full transfer\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmar](dmar) module"]
205pub type DMAR = crate::Reg<u32, _DMAR>;
206#[allow(missing_docs)]
207#[doc(hidden)]
208pub struct _DMAR;
209#[doc = "`read()` method returns [dmar::R](dmar::R) reader structure"]
210impl crate::Readable for DMAR {}
211#[doc = "`write(|w| ..)` method takes [dmar::W](dmar::W) writer structure"]
212impl crate::Writable for DMAR {}
213#[doc = "DMA address for full transfer"]
214pub mod dmar;
215#[doc = "TIM16 option register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [or](or) module"]
216pub type OR = crate::Reg<u32, _OR>;
217#[allow(missing_docs)]
218#[doc(hidden)]
219pub struct _OR;
220#[doc = "`read()` method returns [or::R](or::R) reader structure"]
221impl crate::Readable for OR {}
222#[doc = "`write(|w| ..)` method takes [or::W](or::W) writer structure"]
223impl crate::Writable for OR {}
224#[doc = "TIM16 option register 1"]
225pub mod or;
226#[doc = "TIM17 option register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [af1](af1) module"]
227pub type AF1 = crate::Reg<u32, _AF1>;
228#[allow(missing_docs)]
229#[doc(hidden)]
230pub struct _AF1;
231#[doc = "`read()` method returns [af1::R](af1::R) reader structure"]
232impl crate::Readable for AF1 {}
233#[doc = "`write(|w| ..)` method takes [af1::W](af1::W) writer structure"]
234impl crate::Writable for AF1 {}
235#[doc = "TIM17 option register 1"]
236pub mod af1;
stm32wb_pac/tim17.rs

stm32wb_pac/
tim17.rs
