stm32wb_pac/i2c1/
oar1.rs

1#[doc = "Reader of register OAR1"]
2pub type R = crate::R<u32, super::OAR1>;
3#[doc = "Writer for register OAR1"]
4pub type W = crate::W<u32, super::OAR1>;
5#[doc = "Register OAR1 `reset()`'s with value 0"]
6impl crate::ResetValue for super::OAR1 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `OA1`"]
14pub type OA1_R = crate::R<u16, u16>;
15#[doc = "Write proxy for field `OA1`"]
16pub struct OA1_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> OA1_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u16) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0x03ff) | ((value as u32) & 0x03ff);
24        self.w
25    }
26}
27#[doc = "Reader of field `OA1MODE`"]
28pub type OA1MODE_R = crate::R<bool, bool>;
29#[doc = "Write proxy for field `OA1MODE`"]
30pub struct OA1MODE_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> OA1MODE_W<'a> {
34    #[doc = r"Sets the field bit"]
35    #[inline(always)]
36    pub fn set_bit(self) -> &'a mut W {
37        self.bit(true)
38    }
39    #[doc = r"Clears the field bit"]
40    #[inline(always)]
41    pub fn clear_bit(self) -> &'a mut W {
42        self.bit(false)
43    }
44    #[doc = r"Writes raw bits to the field"]
45    #[inline(always)]
46    pub fn bit(self, value: bool) -> &'a mut W {
47        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
48        self.w
49    }
50}
51#[doc = "Reader of field `OA1EN`"]
52pub type OA1EN_R = crate::R<bool, bool>;
53#[doc = "Write proxy for field `OA1EN`"]
54pub struct OA1EN_W<'a> {
55    w: &'a mut W,
56}
57impl<'a> OA1EN_W<'a> {
58    #[doc = r"Sets the field bit"]
59    #[inline(always)]
60    pub fn set_bit(self) -> &'a mut W {
61        self.bit(true)
62    }
63    #[doc = r"Clears the field bit"]
64    #[inline(always)]
65    pub fn clear_bit(self) -> &'a mut W {
66        self.bit(false)
67    }
68    #[doc = r"Writes raw bits to the field"]
69    #[inline(always)]
70    pub fn bit(self, value: bool) -> &'a mut W {
71        self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
72        self.w
73    }
74}
75impl R {
76    #[doc = "Bits 0:9 - Interface address"]
77    #[inline(always)]
78    pub fn oa1(&self) -> OA1_R {
79        OA1_R::new((self.bits & 0x03ff) as u16)
80    }
81    #[doc = "Bit 10 - Own Address 1 10-bit mode"]
82    #[inline(always)]
83    pub fn oa1mode(&self) -> OA1MODE_R {
84        OA1MODE_R::new(((self.bits >> 10) & 0x01) != 0)
85    }
86    #[doc = "Bit 15 - Own Address 1 enable"]
87    #[inline(always)]
88    pub fn oa1en(&self) -> OA1EN_R {
89        OA1EN_R::new(((self.bits >> 15) & 0x01) != 0)
90    }
91}
92impl W {
93    #[doc = "Bits 0:9 - Interface address"]
94    #[inline(always)]
95    pub fn oa1(&mut self) -> OA1_W {
96        OA1_W { w: self }
97    }
98    #[doc = "Bit 10 - Own Address 1 10-bit mode"]
99    #[inline(always)]
100    pub fn oa1mode(&mut self) -> OA1MODE_W {
101        OA1MODE_W { w: self }
102    }
103    #[doc = "Bit 15 - Own Address 1 enable"]
104    #[inline(always)]
105    pub fn oa1en(&mut self) -> OA1EN_W {
106        OA1EN_W { w: self }
107    }
108}
stm32wb_pac/i2c1/oar1.rs

stm32wb_pac/i2c1/
oar1.rs
