stm32u5/stm32u535/ramcfg/
m2ecckeyr.rs

1///Register `M2ECCKEYR` writer
2pub type W = crate::W<M2ECCKEYRrs>;
3///Field `ECCKEY` writer - ECCKEY
4pub type ECCKEY_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
5impl core::fmt::Debug for crate::generic::Reg<M2ECCKEYRrs> {
6    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
7        write!(f, "(not readable)")
8    }
9}
10impl W {
11    ///Bits 0:7 - ECCKEY
12    #[inline(always)]
13    pub fn ecckey(&mut self) -> ECCKEY_W<M2ECCKEYRrs> {
14        ECCKEY_W::new(self, 0)
15    }
16}
17/**RAMCFG SRAM x ECC key register
18
19You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`m2ecckeyr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
20
21See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U535.html#RAMCFG:M2ECCKEYR)*/
22pub struct M2ECCKEYRrs;
23impl crate::RegisterSpec for M2ECCKEYRrs {
24    type Ux = u32;
25}
26///`write(|w| ..)` method takes [`m2ecckeyr::W`](W) writer structure
27impl crate::Writable for M2ECCKEYRrs {
28    type Safety = crate::Unsafe;
29}
30///`reset()` method sets M2ECCKEYR to value 0
31impl crate::Resettable for M2ECCKEYRrs {}
stm32u5/stm32u535/ramcfg/m2ecckeyr.rs

stm32u5/stm32u535/ramcfg/
m2ecckeyr.rs
